forked from OSchip/llvm-project
These tests used intrinsics with the wrong prototype. They weren't caught because
the old verifier just checked that something "was a pointer", but not that the pointee was correct. llvm-svn: 157544
This commit is contained in:
Chris Lattner
parent
4cca620c18
commit
f7f59b15aa
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@ -75,12 +75,12 @@ define <8 x i8> @vld2dupi8(i8* %A) nounwind {
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ret <8 x i8> %tmp5
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}
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define <4 x i16> @vld2dupi16(i16* %A) nounwind {
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define <4 x i16> @vld2dupi16(i8* %A) nounwind {
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;CHECK: vld2dupi16:
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;Check that a power-of-two alignment smaller than the total size of the memory
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;being loaded is ignored.
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;CHECK: vld2.16 {d16[], d17[]}, [r0]
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%tmp0 = tail call %struct.__neon_int4x16x2_t @llvm.arm.neon.vld2lane.v4i16(i16* %A, <4 x i16> undef, <4 x i16> undef, i32 0, i32 2)
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%tmp0 = tail call %struct.__neon_int4x16x2_t @llvm.arm.neon.vld2lane.v4i16(i8* %A, <4 x i16> undef, <4 x i16> undef, i32 0, i32 2)
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%tmp1 = extractvalue %struct.__neon_int4x16x2_t %tmp0, 0
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%tmp2 = shufflevector <4 x i16> %tmp1, <4 x i16> undef, <4 x i32> zeroinitializer
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%tmp3 = extractvalue %struct.__neon_int4x16x2_t %tmp0, 1
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@ -94,7 +94,8 @@ define <4 x i16> @vld2dupi16_update(i16** %ptr) nounwind {
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;CHECK: vld2dupi16_update:
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;CHECK: vld2.16 {d16[], d17[]}, [r1]!
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%A = load i16** %ptr
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%tmp0 = tail call %struct.__neon_int4x16x2_t @llvm.arm.neon.vld2lane.v4i16(i16* %A, <4 x i16> undef, <4 x i16> undef, i32 0, i32 2)
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%A2 = bitcast i16* %A to i8*
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%tmp0 = tail call %struct.__neon_int4x16x2_t @llvm.arm.neon.vld2lane.v4i16(i8* %A2, <4 x i16> undef, <4 x i16> undef, i32 0, i32 2)
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%tmp1 = extractvalue %struct.__neon_int4x16x2_t %tmp0, 0
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%tmp2 = shufflevector <4 x i16> %tmp1, <4 x i16> undef, <4 x i32> zeroinitializer
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%tmp3 = extractvalue %struct.__neon_int4x16x2_t %tmp0, 1
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@ -105,11 +106,11 @@ define <4 x i16> @vld2dupi16_update(i16** %ptr) nounwind {
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ret <4 x i16> %tmp5
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}
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define <2 x i32> @vld2dupi32(i32* %A) nounwind {
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define <2 x i32> @vld2dupi32(i8* %A) nounwind {
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;CHECK: vld2dupi32:
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;Check the alignment value. Max for this instruction is 64 bits:
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;CHECK: vld2.32 {d16[], d17[]}, [r0, :64]
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%tmp0 = tail call %struct.__neon_int2x32x2_t @llvm.arm.neon.vld2lane.v2i32(i32* %A, <2 x i32> undef, <2 x i32> undef, i32 0, i32 16)
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%tmp0 = tail call %struct.__neon_int2x32x2_t @llvm.arm.neon.vld2lane.v2i32(i8* %A, <2 x i32> undef, <2 x i32> undef, i32 0, i32 16)
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%tmp1 = extractvalue %struct.__neon_int2x32x2_t %tmp0, 0
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%tmp2 = shufflevector <2 x i32> %tmp1, <2 x i32> undef, <2 x i32> zeroinitializer
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%tmp3 = extractvalue %struct.__neon_int2x32x2_t %tmp0, 1
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@ -119,8 +120,8 @@ define <2 x i32> @vld2dupi32(i32* %A) nounwind {
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}
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declare %struct.__neon_int8x8x2_t @llvm.arm.neon.vld2lane.v8i8(i8*, <8 x i8>, <8 x i8>, i32, i32) nounwind readonly
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declare %struct.__neon_int4x16x2_t @llvm.arm.neon.vld2lane.v4i16(i16*, <4 x i16>, <4 x i16>, i32, i32) nounwind readonly
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declare %struct.__neon_int2x32x2_t @llvm.arm.neon.vld2lane.v2i32(i32*, <2 x i32>, <2 x i32>, i32, i32) nounwind readonly
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declare %struct.__neon_int4x16x2_t @llvm.arm.neon.vld2lane.v4i16(i8*, <4 x i16>, <4 x i16>, i32, i32) nounwind readonly
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declare %struct.__neon_int2x32x2_t @llvm.arm.neon.vld2lane.v2i32(i8*, <2 x i32>, <2 x i32>, i32, i32) nounwind readonly
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%struct.__neon_int8x8x3_t = type { <8 x i8>, <8 x i8>, <8 x i8> }
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%struct.__neon_int16x4x3_t = type { <4 x i16>, <4 x i16>, <4 x i16> }
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@ -144,11 +145,11 @@ define <8 x i8> @vld3dupi8_update(i8** %ptr, i32 %inc) nounwind {
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ret <8 x i8> %tmp8
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}
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define <4 x i16> @vld3dupi16(i16* %A) nounwind {
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define <4 x i16> @vld3dupi16(i8* %A) nounwind {
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;CHECK: vld3dupi16:
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;Check the (default) alignment value. VLD3 does not support alignment.
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;CHECK: vld3.16 {d16[], d17[], d18[]}, [r0]
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%tmp0 = tail call %struct.__neon_int16x4x3_t @llvm.arm.neon.vld3lane.v4i16(i16* %A, <4 x i16> undef, <4 x i16> undef, <4 x i16> undef, i32 0, i32 8)
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%tmp0 = tail call %struct.__neon_int16x4x3_t @llvm.arm.neon.vld3lane.v4i16(i8* %A, <4 x i16> undef, <4 x i16> undef, <4 x i16> undef, i32 0, i32 8)
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%tmp1 = extractvalue %struct.__neon_int16x4x3_t %tmp0, 0
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%tmp2 = shufflevector <4 x i16> %tmp1, <4 x i16> undef, <4 x i32> zeroinitializer
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%tmp3 = extractvalue %struct.__neon_int16x4x3_t %tmp0, 1
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@ -161,7 +162,7 @@ define <4 x i16> @vld3dupi16(i16* %A) nounwind {
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}
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declare %struct.__neon_int8x8x3_t @llvm.arm.neon.vld3lane.v8i8(i8*, <8 x i8>, <8 x i8>, <8 x i8>, i32, i32) nounwind readonly
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declare %struct.__neon_int16x4x3_t @llvm.arm.neon.vld3lane.v4i16(i16*, <4 x i16>, <4 x i16>, <4 x i16>, i32, i32) nounwind readonly
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declare %struct.__neon_int16x4x3_t @llvm.arm.neon.vld3lane.v4i16(i8*, <4 x i16>, <4 x i16>, <4 x i16>, i32, i32) nounwind readonly
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%struct.__neon_int16x4x4_t = type { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> }
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%struct.__neon_int32x2x4_t = type { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> }
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@ -171,7 +172,8 @@ define <4 x i16> @vld4dupi16_update(i16** %ptr) nounwind {
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;CHECK: vld4dupi16_update:
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;CHECK: vld4.16 {d16[], d17[], d18[], d19[]}, [r1]!
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%A = load i16** %ptr
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%tmp0 = tail call %struct.__neon_int16x4x4_t @llvm.arm.neon.vld4lane.v4i16(i16* %A, <4 x i16> undef, <4 x i16> undef, <4 x i16> undef, <4 x i16> undef, i32 0, i32 1)
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%A2 = bitcast i16* %A to i8*
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%tmp0 = tail call %struct.__neon_int16x4x4_t @llvm.arm.neon.vld4lane.v4i16(i8* %A2, <4 x i16> undef, <4 x i16> undef, <4 x i16> undef, <4 x i16> undef, i32 0, i32 1)
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%tmp1 = extractvalue %struct.__neon_int16x4x4_t %tmp0, 0
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%tmp2 = shufflevector <4 x i16> %tmp1, <4 x i16> undef, <4 x i32> zeroinitializer
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%tmp3 = extractvalue %struct.__neon_int16x4x4_t %tmp0, 1
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@ -188,12 +190,12 @@ define <4 x i16> @vld4dupi16_update(i16** %ptr) nounwind {
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ret <4 x i16> %tmp11
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}
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define <2 x i32> @vld4dupi32(i32* %A) nounwind {
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define <2 x i32> @vld4dupi32(i8* %A) nounwind {
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;CHECK: vld4dupi32:
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;Check the alignment value. An 8-byte alignment is allowed here even though
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;it is smaller than the total size of the memory being loaded.
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;CHECK: vld4.32 {d16[], d17[], d18[], d19[]}, [r0, :64]
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%tmp0 = tail call %struct.__neon_int32x2x4_t @llvm.arm.neon.vld4lane.v2i32(i32* %A, <2 x i32> undef, <2 x i32> undef, <2 x i32> undef, <2 x i32> undef, i32 0, i32 8)
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%tmp0 = tail call %struct.__neon_int32x2x4_t @llvm.arm.neon.vld4lane.v2i32(i8* %A, <2 x i32> undef, <2 x i32> undef, <2 x i32> undef, <2 x i32> undef, i32 0, i32 8)
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%tmp1 = extractvalue %struct.__neon_int32x2x4_t %tmp0, 0
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%tmp2 = shufflevector <2 x i32> %tmp1, <2 x i32> undef, <2 x i32> zeroinitializer
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%tmp3 = extractvalue %struct.__neon_int32x2x4_t %tmp0, 1
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@ -208,5 +210,5 @@ define <2 x i32> @vld4dupi32(i32* %A) nounwind {
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ret <2 x i32> %tmp11
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}
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declare %struct.__neon_int16x4x4_t @llvm.arm.neon.vld4lane.v4i16(i16*, <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16>, i32, i32) nounwind readonly
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declare %struct.__neon_int32x2x4_t @llvm.arm.neon.vld4lane.v2i32(i32*, <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, i32, i32) nounwind readonly
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declare %struct.__neon_int16x4x4_t @llvm.arm.neon.vld4lane.v4i16(i8*, <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16>, i32, i32) nounwind readonly
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declare %struct.__neon_int32x2x4_t @llvm.arm.neon.vld4lane.v2i32(i8*, <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, i32, i32) nounwind readonly
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@ -5,9 +5,9 @@ target triple = "msp430-unknown-linux-gnu"
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define msp430_intrcc void @foo() nounwind {
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entry:
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%fa = call i16* @llvm.frameaddress(i32 0)
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store i16 0, i16* %fa
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%fa = call i8* @llvm.frameaddress(i32 0)
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store i8 0, i8* %fa
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ret void
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}
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declare i16* @llvm.frameaddress(i32)
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declare i8* @llvm.frameaddress(i32)
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@ -1,19 +1,19 @@
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; RUN: llc < %s -mtriple=i686-apple-darwin9 -mattr=sse4a | FileCheck %s
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define void @test1(float* %p, <4 x float> %a) nounwind optsize ssp {
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define void @test1(i8* %p, <4 x float> %a) nounwind optsize ssp {
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; CHECK: movntss
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entry:
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tail call void @llvm.x86.sse4a.movnt.ss(float* %p, <4 x float> %a) nounwind
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tail call void @llvm.x86.sse4a.movnt.ss(i8* %p, <4 x float> %a) nounwind
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ret void
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}
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declare void @llvm.x86.sse4a.movnt.ss(float*, <4 x float>)
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declare void @llvm.x86.sse4a.movnt.ss(i8*, <4 x float>)
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define void @test2(double* %p, <2 x double> %a) nounwind optsize ssp {
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define void @test2(i8* %p, <2 x double> %a) nounwind optsize ssp {
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; CHECK: movntsd
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entry:
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tail call void @llvm.x86.sse4a.movnt.sd(double* %p, <2 x double> %a) nounwind
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tail call void @llvm.x86.sse4a.movnt.sd(i8* %p, <2 x double> %a) nounwind
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ret void
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}
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declare void @llvm.x86.sse4a.movnt.sd(double*, <2 x double>)
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declare void @llvm.x86.sse4a.movnt.sd(i8*, <2 x double>)
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@ -3,9 +3,9 @@
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define void @x(i8* %a, i8* %src, i64 %len, i32 %align) nounwind {
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entry:
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tail call void @llvm.memcpy.i64( i8* %a, i8* %src, i64 %len, i32 %align) nounwind
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tail call void @llvm.memcpy.p0i8.p0i8.i64( i8* %a, i8* %src, i64 %len, i32 %align, i1 false) nounwind
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ret void
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}
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declare void @llvm.memcpy.i64( i8* %a, i8* %src, i64 %len, i32)
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declare void @llvm.memcpy.p0i8.p0i8.i64( i8* %a, i8* %src, i64 %len, i32, i1)
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