forked from OSchip/llvm-project
[AArch64] This check is specific to merging instructions. NFC.
llvm-svn: 260283
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@ -1149,10 +1149,6 @@ AArch64LoadStoreOpt::findMatchingInsn(MachineBasicBlock::iterator I,
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int Offset = getLdStOffsetOp(FirstMI).getImm();
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bool IsNarrowStore = isNarrowStore(Opc);
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// For narrow stores, find only the case where the stored value is WZR.
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if (IsNarrowStore && Reg != AArch64::WZR)
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return E;
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// Early exit if the offset is not possible to match. (6 bits of positive
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// range, plus allow an extra one in case we find a later insn that matches
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// with Offset-1)
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@ -1582,6 +1578,10 @@ bool AArch64LoadStoreOpt::tryToMergeLdStInst(
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if (!isCandidateToMergeOrPair(MI))
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return false;
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// For narrow stores, find only the case where the stored value is WZR.
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if (isNarrowStore(MI) && getLdStRegOp(MI).getReg() != AArch64::WZR)
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return false;
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// Look ahead up to LdStLimit instructions for a mergable instruction.
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LdStPairFlags Flags;
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MachineBasicBlock::iterator MergeMI = findMatchingInsn(MBBI, Flags, LdStLimit);
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