forked from OSchip/llvm-project
[X86][SSE] Add isHorizOp helper function. NFCI.
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@ -9209,6 +9209,19 @@ static SDValue LowerBUILD_VECTORvXi1(SDValue Op, SelectionDAG &DAG,
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return DstVec;
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}
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static bool isHorizOp(unsigned Opcode) {
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switch (Opcode) {
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case X86ISD::PACKSS:
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case X86ISD::PACKUS:
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case X86ISD::FHADD:
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case X86ISD::FHSUB:
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case X86ISD::HADD:
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case X86ISD::HSUB:
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return true;
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}
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return false;
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}
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/// This is a helper function of LowerToHorizontalOp().
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/// This function checks that the build_vector \p N in input implements a
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/// 128-bit partial horizontal operation on a 256-bit vector, but that operation
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@ -43295,10 +43308,7 @@ static SDValue combineShiftRightLogical(SDNode *N, SelectionDAG &DAG,
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static SDValue combineHorizOpWithShuffle(SDNode *N, SelectionDAG &DAG,
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const X86Subtarget &Subtarget) {
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unsigned Opcode = N->getOpcode();
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assert((X86ISD::HADD == Opcode || X86ISD::FHADD == Opcode ||
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X86ISD::HSUB == Opcode || X86ISD::FHSUB == Opcode ||
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X86ISD::PACKSS == Opcode || X86ISD::PACKUS == Opcode) &&
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"Unexpected hadd/hsub/pack opcode");
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assert(isHorizOp(Opcode) && "Unexpected hadd/hsub/pack opcode");
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EVT VT = N->getValueType(0);
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SDValue N0 = N->getOperand(0);
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