forked from OSchip/llvm-project
[x86] add more vector ISA variants for memcmp expansion; NFC
...because every swiss cheese has different holes. llvm-svn: 316446
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@ -1,8 +1,10 @@
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=cmov | FileCheck %s --check-prefix=X86 --check-prefix=X86-NOSSE
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; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X86 --check-prefix=X86-SSE2
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=X64 --check-prefix=X64-SSE2
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx2 | FileCheck %s --check-prefix=X64 --check-prefix=X64-AVX2
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; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=cmov | FileCheck %s --check-prefix=X86 --check-prefix=X86-NOSSE
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; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse | FileCheck %s --check-prefix=X86 --check-prefix=SSE --check-prefix=X86-SSE1
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; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X86 --check-prefix=SSE --check-prefix=X86-SSE2
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=X64 --check-prefix=X64-SSE2
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx | FileCheck %s --check-prefix=X64 --check-prefix=X64-AVX --check-prefix=X64-AVX1
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx2 | FileCheck %s --check-prefix=X64 --check-prefix=X64-AVX --check-prefix=X64-AVX2
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; This tests codegen time inlining/optimization of memcmp
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; rdar://6480398
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@ -584,6 +586,18 @@ define i1 @length16_eq(i8* %x, i8* %y) nounwind {
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; X86-NOSSE-NEXT: setne %al
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; X86-NOSSE-NEXT: retl
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;
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; X86-SSE1-LABEL: length16_eq:
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; X86-SSE1: # BB#0:
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; X86-SSE1-NEXT: pushl $0
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; X86-SSE1-NEXT: pushl $16
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; X86-SSE1-NEXT: pushl {{[0-9]+}}(%esp)
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; X86-SSE1-NEXT: pushl {{[0-9]+}}(%esp)
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; X86-SSE1-NEXT: calll memcmp
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; X86-SSE1-NEXT: addl $16, %esp
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; X86-SSE1-NEXT: testl %eax, %eax
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; X86-SSE1-NEXT: setne %al
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; X86-SSE1-NEXT: retl
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;
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; X86-SSE2-LABEL: length16_eq:
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; X86-SSE2: # BB#0:
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; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %eax
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@ -630,6 +644,18 @@ define i1 @length16_eq_const(i8* %X) nounwind {
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; X86-NOSSE-NEXT: sete %al
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; X86-NOSSE-NEXT: retl
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;
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; X86-SSE1-LABEL: length16_eq_const:
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; X86-SSE1: # BB#0:
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; X86-SSE1-NEXT: pushl $0
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; X86-SSE1-NEXT: pushl $16
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; X86-SSE1-NEXT: pushl $.L.str
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; X86-SSE1-NEXT: pushl {{[0-9]+}}(%esp)
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; X86-SSE1-NEXT: calll memcmp
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; X86-SSE1-NEXT: addl $16, %esp
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; X86-SSE1-NEXT: testl %eax, %eax
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; X86-SSE1-NEXT: sete %al
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; X86-SSE1-NEXT: retl
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;
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; X86-SSE2-LABEL: length16_eq_const:
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; X86-SSE2: # BB#0:
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; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %eax
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@ -781,6 +807,22 @@ define i1 @length32_eq(i8* %x, i8* %y) nounwind {
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; X64-SSE2-NEXT: popq %rcx
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; X64-SSE2-NEXT: retq
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;
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; X64-AVX1-LABEL: length32_eq:
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; X64-AVX1: # BB#0:
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; X64-AVX1-NEXT: movq 16(%rdi), %rax
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; X64-AVX1-NEXT: movq (%rdi), %rcx
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; X64-AVX1-NEXT: movq 8(%rdi), %rdx
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; X64-AVX1-NEXT: movq 24(%rdi), %rdi
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; X64-AVX1-NEXT: xorq 24(%rsi), %rdi
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; X64-AVX1-NEXT: xorq 8(%rsi), %rdx
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; X64-AVX1-NEXT: orq %rdi, %rdx
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; X64-AVX1-NEXT: xorq 16(%rsi), %rax
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; X64-AVX1-NEXT: xorq (%rsi), %rcx
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; X64-AVX1-NEXT: orq %rax, %rcx
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; X64-AVX1-NEXT: orq %rdx, %rcx
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; X64-AVX1-NEXT: sete %al
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; X64-AVX1-NEXT: retq
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;
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; X64-AVX2-LABEL: length32_eq:
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; X64-AVX2: # BB#0:
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; X64-AVX2-NEXT: vmovdqu (%rdi), %ymm0
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@ -819,6 +861,22 @@ define i1 @length32_eq_const(i8* %X) nounwind {
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; X64-SSE2-NEXT: popq %rcx
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; X64-SSE2-NEXT: retq
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;
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; X64-AVX1-LABEL: length32_eq_const:
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; X64-AVX1: # BB#0:
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; X64-AVX1-NEXT: movabsq $3544395820347831604, %rax # imm = 0x3130393837363534
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; X64-AVX1-NEXT: xorq 24(%rdi), %rax
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; X64-AVX1-NEXT: movabsq $3833745473465760056, %rcx # imm = 0x3534333231303938
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; X64-AVX1-NEXT: xorq 8(%rdi), %rcx
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; X64-AVX1-NEXT: orq %rax, %rcx
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; X64-AVX1-NEXT: movabsq $3689065127958034230, %rax # imm = 0x3332313039383736
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; X64-AVX1-NEXT: xorq 16(%rdi), %rax
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; X64-AVX1-NEXT: movabsq $3978425819141910832, %rdx # imm = 0x3736353433323130
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; X64-AVX1-NEXT: xorq (%rdi), %rdx
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; X64-AVX1-NEXT: orq %rax, %rdx
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; X64-AVX1-NEXT: orq %rcx, %rdx
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; X64-AVX1-NEXT: setne %al
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; X64-AVX1-NEXT: retq
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;
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; X64-AVX2-LABEL: length32_eq_const:
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; X64-AVX2: # BB#0:
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; X64-AVX2-NEXT: vmovdqu (%rdi), %ymm0
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