forked from OSchip/llvm-project
[MIPS] add overrides for isCheapToSpeculateCttz() and isCheapToSpeculateCtlz()
MIPS32 has instructions for efficient count-leading/trailing-zeros, so this should be considered a cheap operation (and therefore fair game for speculation) for any MIPS32 implementation. The net result of allowing this speculation for the regression tests in this patch is that we get this code: ctlz: jr $ra clz $2, $4 cttz: addiu $1, $4, -1 not $2, $4 and $1, $2, $1 clz $1, $1 addiu $2, $zero, 32 jr $ra subu $2, $2, $1 Instead of: ctlz: beqz $4, $BB0_2 addiu $2, $zero, 32 clz $2, $4 $BB0_2: jr $ra nop cttz: beqz $4, $BB1_2 addiu $2, $zero, 32 addiu $1, $4, -1 not $2, $4 and $1, $2, $1 clz $1, $1 addiu $2, $zero, 32 subu $2, $2, $1 $BB1_2: jr $ra nop See D14469 for the larger motivation. Differential Revision: http://reviews.llvm.org/D14500 llvm-svn: 252755
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@ -834,6 +834,14 @@ SDValue MipsTargetLowering::PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI)
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return SDValue();
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}
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bool MipsTargetLowering::isCheapToSpeculateCttz() const {
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return Subtarget.hasMips32();
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}
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bool MipsTargetLowering::isCheapToSpeculateCtlz() const {
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return Subtarget.hasMips32();
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}
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void
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MipsTargetLowering::LowerOperationWrapper(SDNode *N,
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SmallVectorImpl<SDValue> &Results,
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@ -235,6 +235,9 @@ namespace llvm {
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return MVT::i32;
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}
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bool isCheapToSpeculateCttz() const override;
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bool isCheapToSpeculateCtlz() const override;
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void LowerOperationWrapper(SDNode *N,
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SmallVectorImpl<SDValue> &Results,
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SelectionDAG &DAG) const override;
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@ -0,0 +1,43 @@
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; RUN: opt -S -simplifycfg -mtriple=mips-linux-gnu < %s | FileCheck %s
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define i32 @ctlz(i32 %A) {
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; CHECK-LABEL: @ctlz(
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; CHECK: [[ICMP:%[A-Za-z0-9]+]] = icmp eq i32 %A, 0
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; CHECK-NEXT: [[CTZ:%[A-Za-z0-9]+]] = tail call i32 @llvm.ctlz.i32(i32 %A, i1 true)
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; CHECK-NEXT: [[SEL:%[A-Za-z0-9.]+]] = select i1 [[ICMP]], i32 32, i32 [[CTZ]]
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; CHECK-NEXT: ret i32 [[SEL]]
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entry:
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%tobool = icmp eq i32 %A, 0
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br i1 %tobool, label %cond.end, label %cond.true
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cond.true:
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%0 = tail call i32 @llvm.ctlz.i32(i32 %A, i1 true)
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br label %cond.end
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cond.end:
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%cond = phi i32 [ %0, %cond.true ], [ 32, %entry ]
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ret i32 %cond
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}
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define i32 @cttz(i32 %A) {
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; CHECK-LABEL: @cttz(
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; CHECK: [[ICMP:%[A-Za-z0-9]+]] = icmp eq i32 %A, 0
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; CHECK-NEXT: [[CTZ:%[A-Za-z0-9]+]] = tail call i32 @llvm.cttz.i32(i32 %A, i1 true)
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; CHECK-NEXT: [[SEL:%[A-Za-z0-9.]+]] = select i1 [[ICMP]], i32 32, i32 [[CTZ]]
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; CHECK-NEXT: ret i32 [[SEL]]
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entry:
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%tobool = icmp eq i32 %A, 0
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br i1 %tobool, label %cond.end, label %cond.true
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cond.true:
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%0 = tail call i32 @llvm.cttz.i32(i32 %A, i1 true)
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br label %cond.end
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cond.end:
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%cond = phi i32 [ %0, %cond.true ], [ 32, %entry ]
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ret i32 %cond
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}
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declare i32 @llvm.ctlz.i32(i32, i1)
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declare i32 @llvm.cttz.i32(i32, i1)
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@ -0,0 +1,5 @@
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config.suffixes = ['.ll']
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targets = set(config.root.targets_to_build.split())
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if not 'Mips' in targets:
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config.unsupported = True
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