forked from OSchip/llvm-project
Fix a bug introduced with my previous patch, where it didn't correctly handle
instructions which replace themselves when FI's are rewritten (common on ppc). This fixes CodeGen/PowerPC/2006-10-17-ppc64-alloca.ll llvm-svn: 35789
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4ca9cbb170
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@ -498,20 +498,22 @@ void PEI::replaceFrameIndices(MachineFunction &Fn) {
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for (MachineFunction::iterator BB = Fn.begin(), E = Fn.end(); BB != E; ++BB) {
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if (RS) RS->enterBasicBlock(BB);
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for (MachineBasicBlock::iterator I = BB->begin(); I != BB->end(); ++I) {
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for (unsigned i = 0, e = I->getNumOperands(); i != e; ++i)
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if (I->getOperand(i).isFrameIndex()) {
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for (MachineBasicBlock::iterator I = BB->begin(); I != BB->end(); ) {
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MachineInstr *MI = I++;
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for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i)
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if (MI->getOperand(i).isFrameIndex()) {
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// If this instruction has a FrameIndex operand, we need to use that
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// target machine register info object to eliminate it.
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MRI.eliminateFrameIndex(I, RS);
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MRI.eliminateFrameIndex(MI, RS);
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// Revisit the instruction in full. Some instructions (e.g. inline
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// asm instructions) can have multiple frame indices.
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e = I->getNumOperands();
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i = -1U;
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--I;
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MI = 0;
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break;
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}
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// Update register states.
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if (RS) RS->forward(I);
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if (RS && MI) RS->forward(MI);
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}
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}
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}
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