diff --git a/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp b/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp index 3304900c9f2e..823ae2f10e82 100644 --- a/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp +++ b/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp @@ -988,6 +988,24 @@ SDNode *ARMDAGToDAGISel::Select(SDValue Op) { // Other cases are autogenerated. break; } + case ISD::ConstantFP: { + ConstantFPSDNode *CFP = cast(N); + MVT VT = CFP->getValueType(0); + ConstantFP *LLVMC = const_cast(CFP->getConstantFPValue()); + SDValue CPIdx = CurDAG->getTargetConstantPool(LLVMC, TLI.getPointerTy()); + SDNode *ResNode; + SDValue Ops[] = { + CPIdx, + CurDAG->getTargetConstant(0, MVT::i32), + getAL(CurDAG), + CurDAG->getRegister(0, MVT::i32), + CurDAG->getEntryNode() + }; + unsigned Opc = (VT == MVT::f32) ? ARM::FLDS : ARM::FLDD; + ResNode=CurDAG->getTargetNode(Opc, dl, VT, MVT::Other, Ops, 5); + ReplaceUses(Op, SDValue(ResNode, 0)); + return NULL; + } case ISD::FrameIndex: { // Selects to ADDri FI, 0 which in turn will become ADDri SP, imm. int FI = cast(N)->getIndex(); diff --git a/llvm/test/CodeGen/Thumb2/2009-08-10-ISelBug.ll b/llvm/test/CodeGen/Thumb2/2009-08-10-ISelBug.ll new file mode 100644 index 000000000000..4c07aa0b1519 --- /dev/null +++ b/llvm/test/CodeGen/Thumb2/2009-08-10-ISelBug.ll @@ -0,0 +1,15 @@ +; RUN: llvm-as < %s | llc -mtriple=thumbv7-apple-darwin -mattr=+vfp2 + +define arm_apcscc float @t1(i32 %v0) nounwind { +entry: + store i32 undef, i32* undef, align 4 + %0 = load [4 x i8]** undef, align 4 ; <[4 x i8]*> [#uses=1] + %1 = load i8* undef, align 1 ; [#uses=1] + %2 = zext i8 %1 to i32 ; [#uses=1] + %3 = getelementptr [4 x i8]* %0, i32 %v0, i32 0 ; [#uses=1] + %4 = load i8* %3, align 1 ; [#uses=1] + %5 = zext i8 %4 to i32 ; [#uses=1] + %6 = sub i32 %5, %2 ; [#uses=1] + %7 = sitofp i32 %6 to float ; [#uses=1] + ret float %7 +}