forked from OSchip/llvm-project
[X86] Update test cases to make sure storeu builtins use the storeu instrinsics. We were previously matching on other stores in the IR from this being an -O0 test.
We should probably look into making the storeu builtins just emit a normal store with an alignment of 1. llvm-svn: 270664
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@ -665,7 +665,7 @@ void test_mm_store_ss(float* x, __m128 y) {
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void test_mm_store1_ps(float* x, __m128 y) {
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// CHECK-LABEL: test_mm_store1_ps
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// CHECK: shufflevector <4 x float> %{{.*}}, <4 x float> %{{.*}}, <4 x i32> zeroinitializer
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// CHECK: store <4 x float> %{{.*}}, <4 x float>* {{.*}}, align 16
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// CHECK: call void @llvm.x86.sse.storeu.ps(i8* %{{.*}}, <4 x float> %{{.*}})
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_mm_store1_ps(x, y);
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}
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@ -694,7 +694,7 @@ void test_mm_storer_ps(float* x, __m128 y) {
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void test_mm_storeu_ps(float* x, __m128 y) {
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// CHECK-LABEL: test_mm_storeu_ps
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// CHECK: store <4 x float> %{{.*}}, <4 x float>* {{.*}}, align 1
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// CHECK: call void @llvm.x86.sse.storeu.ps(i8* %{{.*}}, <4 x float> %{{.*}})
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_mm_storeu_ps(x, y);
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}
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@ -1256,13 +1256,13 @@ void test_mm_storer_pd(__m128d A, double* B) {
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void test_mm_storeu_pd(double* A, __m128d B) {
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// CHECK-LABEL: test_mm_storeu_pd
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// CHECK: store <2 x double> %{{.*}}, <2 x double>* %{{.*}}, align 1
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// CHECK: call void @llvm.x86.sse2.storeu.pd(i8* %{{.*}}, <2 x double> %{{.*}})
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_mm_storeu_pd(A, B);
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}
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void test_mm_storeu_si128(__m128i* A, __m128i B) {
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// CHECK-LABEL: test_mm_storeu_si128
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// CHECK: store <2 x i64> %{{.*}}, <2 x i64>* %{{.*}}, align 1
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// CHECK: call void @llvm.x86.sse2.storeu.dq(i8* %{{.*}}, <16 x i8> %{{.*}})
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_mm_storeu_si128(A, B);
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}
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