forked from OSchip/llvm-project
"The MMX_MASKMOVQ and MMX_MASKMOVQ64 instructions are labeled as MRMDestMem
instructions, which implies that there is an explicit memory operand. There is (however) no explicit memory operand; although this is a store, the only memory operand is implicit, indicated by DS:EDI. This causes the table-generation code for the disassembler to report an error." Patch by Sean Callanan! llvm-svn: 73989
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@ -481,11 +481,11 @@ def MMX_PMOVMSKBrr : MMXI<0xD7, MRMSrcReg, (outs GR32:$dst), (ins VR64:$src),
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// Misc.
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let Uses = [EDI] in
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def MMX_MASKMOVQ : MMXI<0xF7, MRMDestMem, (outs), (ins VR64:$src, VR64:$mask),
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def MMX_MASKMOVQ : MMXI<0xF7, MRMSrcReg, (outs), (ins VR64:$src, VR64:$mask),
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"maskmovq\t{$mask, $src|$src, $mask}",
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[(int_x86_mmx_maskmovq VR64:$src, VR64:$mask, EDI)]>;
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let Uses = [RDI] in
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def MMX_MASKMOVQ64: MMXI64<0xF7, MRMDestMem, (outs), (ins VR64:$src, VR64:$mask),
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def MMX_MASKMOVQ64: MMXI64<0xF7, MRMSrcReg, (outs), (ins VR64:$src, VR64:$mask),
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"maskmovq\t{$mask, $src|$src, $mask}",
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[(int_x86_mmx_maskmovq VR64:$src, VR64:$mask, RDI)]>;
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