forked from OSchip/llvm-project
Clean up TargetInfo class hierarchy. Define a base class from which TargetInfos
of Mips32 big and little endian derive. llvm-svn: 140170
This commit is contained in:
parent
7d06f5cdd4
commit
f6da331e15
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@ -2755,26 +2755,18 @@ namespace {
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}
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}
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namespace {
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namespace {
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class MipsTargetInfo : public TargetInfo {
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class MipsTargetInfoBase : public TargetInfo {
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std::string ABI, CPU;
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std::string CPU;
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static const TargetInfo::GCCRegAlias GCCRegAliases[];
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protected:
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static const char * const GCCRegNames[];
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std::string ABI;
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public:
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public:
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MipsTargetInfo(const std::string& triple) : TargetInfo(triple), ABI("o32") {
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MipsTargetInfoBase(const std::string& triple, const std::string& ABIStr)
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DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-"
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: TargetInfo(triple), ABI(ABIStr) {
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"i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32";
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SizeType = UnsignedInt;
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SizeType = UnsignedInt;
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PtrDiffType = SignedInt;
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PtrDiffType = SignedInt;
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}
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}
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virtual const char *getABI() const { return ABI.c_str(); }
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virtual const char *getABI() const { return ABI.c_str(); }
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virtual bool setABI(const std::string &Name) {
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virtual bool setABI(const std::string &Name) = 0;
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if ((Name == "o32") || (Name == "eabi")) {
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ABI = Name;
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return true;
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} else
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return false;
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}
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virtual bool setCPU(const std::string &Name) {
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virtual bool setCPU(const std::string &Name) {
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CPU = Name;
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CPU = Name;
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return true;
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return true;
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@ -2785,35 +2777,9 @@ public:
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Features[CPU] = true;
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Features[CPU] = true;
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}
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}
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virtual void getArchDefines(const LangOptions &Opts,
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virtual void getArchDefines(const LangOptions &Opts,
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MacroBuilder &Builder) const {
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MacroBuilder &Builder) const = 0;
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// NOTE: O64 will not be supported.
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if (ABI == "o32") {
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Builder.defineMacro("__mips_o32");
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Builder.defineMacro("_ABIO32", "1");
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Builder.defineMacro("_MIPS_SIM", "_ABIO32");
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}
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else if (ABI == "n32") {
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Builder.defineMacro("__mips_n32");
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Builder.defineMacro("_ABIN32", "2");
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Builder.defineMacro("_MIPS_SIM", "_ABIN32");
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}
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else if (ABI == "n64") {
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Builder.defineMacro("__mips_n64");
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Builder.defineMacro("_ABI64", "3");
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Builder.defineMacro("_MIPS_SIM", "_ABI64");
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}
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else if (ABI == "eabi")
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Builder.defineMacro("__mips_eabi");
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}
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virtual void getTargetDefines(const LangOptions &Opts,
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virtual void getTargetDefines(const LangOptions &Opts,
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MacroBuilder &Builder) const {
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MacroBuilder &Builder) const = 0;
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DefineStd(Builder, "mips", Opts);
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Builder.defineMacro("_mips");
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DefineStd(Builder, "MIPSEB", Opts);
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Builder.defineMacro("_MIPSEB");
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Builder.defineMacro("__REGISTER_PREFIX__", "");
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getArchDefines(Opts, Builder);
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}
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virtual void getTargetBuiltins(const Builtin::Info *&Records,
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virtual void getTargetBuiltins(const Builtin::Info *&Records,
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unsigned &NumRecords) const {
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unsigned &NumRecords) const {
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// FIXME: Implement!
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// FIXME: Implement!
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@ -2822,9 +2788,24 @@ public:
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return "typedef void* __builtin_va_list;";
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return "typedef void* __builtin_va_list;";
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}
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}
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virtual void getGCCRegNames(const char * const *&Names,
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virtual void getGCCRegNames(const char * const *&Names,
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unsigned &NumNames) const;
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unsigned &NumNames) const {
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static const char * const GCCRegNames[] = {
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"$0", "$1", "$2", "$3", "$4", "$5", "$6", "$7",
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"$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15",
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"$16", "$17", "$18", "$19", "$20", "$21", "$22", "$23",
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"$24", "$25", "$26", "$27", "$28", "$sp", "$fp", "$31",
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"$f0", "$f1", "$f2", "$f3", "$f4", "$f5", "$f6", "$f7",
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"$f8", "$f9", "$f10", "$f11", "$f12", "$f13", "$f14", "$f15",
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"$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23",
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"$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "$f31",
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"hi", "lo", "", "$fcc0","$fcc1","$fcc2","$fcc3","$fcc4",
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"$fcc5","$fcc6","$fcc7"
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};
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Names = GCCRegNames;
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NumNames = llvm::array_lengthof(GCCRegNames);
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}
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virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
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virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
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unsigned &NumAliases) const;
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unsigned &NumAliases) const = 0;
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virtual bool validateAsmConstraint(const char *&Name,
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virtual bool validateAsmConstraint(const char *&Name,
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TargetInfo::ConstraintInfo &Info) const {
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TargetInfo::ConstraintInfo &Info) const {
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switch (*Name) {
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switch (*Name) {
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@ -2845,87 +2826,102 @@ public:
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}
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}
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};
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};
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const char * const MipsTargetInfo::GCCRegNames[] = {
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class Mips32TargetInfoBase : public MipsTargetInfoBase {
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"$0", "$1", "$2", "$3", "$4", "$5", "$6", "$7",
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"$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15",
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"$16", "$17", "$18", "$19", "$20", "$21", "$22", "$23",
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"$24", "$25", "$26", "$27", "$28", "$sp", "$fp", "$31",
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"$f0", "$f1", "$f2", "$f3", "$f4", "$f5", "$f6", "$f7",
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"$f8", "$f9", "$f10", "$f11", "$f12", "$f13", "$f14", "$f15",
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"$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23",
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"$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "$f31",
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"hi", "lo", "", "$fcc0","$fcc1","$fcc2","$fcc3","$fcc4",
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"$fcc5","$fcc6","$fcc7"
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};
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void MipsTargetInfo::getGCCRegNames(const char * const *&Names,
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unsigned &NumNames) const {
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Names = GCCRegNames;
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NumNames = llvm::array_lengthof(GCCRegNames);
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}
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const TargetInfo::GCCRegAlias MipsTargetInfo::GCCRegAliases[] = {
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{ { "at" }, "$1" },
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{ { "v0" }, "$2" },
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{ { "v1" }, "$3" },
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{ { "a0" }, "$4" },
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{ { "a1" }, "$5" },
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{ { "a2" }, "$6" },
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{ { "a3" }, "$7" },
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{ { "t0" }, "$8" },
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{ { "t1" }, "$9" },
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{ { "t2" }, "$10" },
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{ { "t3" }, "$11" },
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{ { "t4" }, "$12" },
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{ { "t5" }, "$13" },
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{ { "t6" }, "$14" },
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{ { "t7" }, "$15" },
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{ { "s0" }, "$16" },
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{ { "s1" }, "$17" },
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{ { "s2" }, "$18" },
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{ { "s3" }, "$19" },
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{ { "s4" }, "$20" },
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{ { "s5" }, "$21" },
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{ { "s6" }, "$22" },
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{ { "s7" }, "$23" },
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{ { "t8" }, "$24" },
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{ { "t9" }, "$25" },
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{ { "k0" }, "$26" },
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{ { "k1" }, "$27" },
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{ { "gp" }, "$28" },
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{ { "sp" }, "$29" },
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{ { "fp" }, "$30" },
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{ { "ra" }, "$31" }
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};
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void MipsTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
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unsigned &NumAliases) const {
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Aliases = GCCRegAliases;
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NumAliases = llvm::array_lengthof(GCCRegAliases);
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}
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} // end anonymous namespace.
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namespace {
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class MipselTargetInfo : public MipsTargetInfo {
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public:
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public:
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MipselTargetInfo(const std::string& triple) : MipsTargetInfo(triple) {
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Mips32TargetInfoBase(const std::string& triple) :
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MipsTargetInfoBase(triple, "o32") {}
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virtual bool setABI(const std::string &Name) {
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if ((Name == "o32") || (Name == "eabi")) {
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ABI = Name;
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return true;
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} else
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return false;
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}
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virtual void getArchDefines(const LangOptions &Opts,
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MacroBuilder &Builder) const {
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if (ABI == "o32") {
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Builder.defineMacro("__mips_o32");
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Builder.defineMacro("_ABIO32", "1");
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Builder.defineMacro("_MIPS_SIM", "_ABIO32");
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}
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else if (ABI == "eabi")
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Builder.defineMacro("__mips_eabi");
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else
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assert(false && "Invalid ABI for Mips32.");
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}
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virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
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unsigned &NumAliases) const {
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static const TargetInfo::GCCRegAlias GCCRegAliases[] = {
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{ { "at" }, "$1" },
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{ { "v0" }, "$2" },
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{ { "v1" }, "$3" },
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{ { "a0" }, "$4" },
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{ { "a1" }, "$5" },
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{ { "a2" }, "$6" },
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{ { "a3" }, "$7" },
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{ { "t0" }, "$8" },
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{ { "t1" }, "$9" },
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{ { "t2" }, "$10" },
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{ { "t3" }, "$11" },
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{ { "t4" }, "$12" },
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{ { "t5" }, "$13" },
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{ { "t6" }, "$14" },
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{ { "t7" }, "$15" },
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{ { "s0" }, "$16" },
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{ { "s1" }, "$17" },
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{ { "s2" }, "$18" },
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{ { "s3" }, "$19" },
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{ { "s4" }, "$20" },
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{ { "s5" }, "$21" },
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{ { "s6" }, "$22" },
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{ { "s7" }, "$23" },
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{ { "t8" }, "$24" },
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{ { "t9" }, "$25" },
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{ { "k0" }, "$26" },
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{ { "k1" }, "$27" },
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{ { "gp" }, "$28" },
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{ { "sp" }, "$29" },
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{ { "fp" }, "$30" },
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{ { "ra" }, "$31" }
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};
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Aliases = GCCRegAliases;
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NumAliases = llvm::array_lengthof(GCCRegAliases);
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}
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};
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class Mips32EBTargetInfo : public Mips32TargetInfoBase {
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public:
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Mips32EBTargetInfo(const std::string& triple) : Mips32TargetInfoBase(triple) {
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DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-"
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"i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32";
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}
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virtual void getTargetDefines(const LangOptions &Opts,
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MacroBuilder &Builder) const {
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DefineStd(Builder, "mips", Opts);
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Builder.defineMacro("_mips");
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DefineStd(Builder, "MIPSEB", Opts);
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Builder.defineMacro("_MIPSEB");
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Builder.defineMacro("__REGISTER_PREFIX__", "");
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getArchDefines(Opts, Builder);
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}
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};
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class Mips32ELTargetInfo : public Mips32TargetInfoBase {
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public:
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Mips32ELTargetInfo(const std::string& triple) : Mips32TargetInfoBase(triple) {
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DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-"
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DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-"
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"i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32";
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"i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32";
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}
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}
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virtual void getTargetDefines(const LangOptions &Opts,
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virtual void getTargetDefines(const LangOptions &Opts,
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MacroBuilder &Builder) const;
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MacroBuilder &Builder) const {
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DefineStd(Builder, "mips", Opts);
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Builder.defineMacro("_mips");
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DefineStd(Builder, "MIPSEL", Opts);
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Builder.defineMacro("_MIPSEL");
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Builder.defineMacro("__REGISTER_PREFIX__", "");
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getArchDefines(Opts, Builder);
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}
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};
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};
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void MipselTargetInfo::getTargetDefines(const LangOptions &Opts,
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MacroBuilder &Builder) const {
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DefineStd(Builder, "mips", Opts);
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Builder.defineMacro("_mips");
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DefineStd(Builder, "MIPSEL", Opts);
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Builder.defineMacro("_MIPSEL");
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Builder.defineMacro("__REGISTER_PREFIX__", "");
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getArchDefines(Opts, Builder);
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}
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} // end anonymous namespace.
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} // end anonymous namespace.
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namespace {
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namespace {
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@ -3045,29 +3041,29 @@ static TargetInfo *AllocateTarget(const std::string &T) {
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case llvm::Triple::mips:
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case llvm::Triple::mips:
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switch (os) {
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switch (os) {
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case llvm::Triple::Linux:
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case llvm::Triple::Linux:
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return new LinuxTargetInfo<MipsTargetInfo>(T);
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return new LinuxTargetInfo<Mips32EBTargetInfo>(T);
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case llvm::Triple::RTEMS:
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case llvm::Triple::RTEMS:
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return new RTEMSTargetInfo<MipsTargetInfo>(T);
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return new RTEMSTargetInfo<Mips32EBTargetInfo>(T);
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case llvm::Triple::FreeBSD:
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case llvm::Triple::FreeBSD:
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return new FreeBSDTargetInfo<MipsTargetInfo>(T);
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return new FreeBSDTargetInfo<Mips32EBTargetInfo>(T);
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case llvm::Triple::NetBSD:
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case llvm::Triple::NetBSD:
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return new NetBSDTargetInfo<MipsTargetInfo>(T);
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return new NetBSDTargetInfo<Mips32EBTargetInfo>(T);
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default:
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default:
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return new MipsTargetInfo(T);
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return new Mips32EBTargetInfo(T);
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}
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}
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case llvm::Triple::mipsel:
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case llvm::Triple::mipsel:
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switch (os) {
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switch (os) {
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case llvm::Triple::Linux:
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case llvm::Triple::Linux:
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return new LinuxTargetInfo<MipselTargetInfo>(T);
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return new LinuxTargetInfo<Mips32ELTargetInfo>(T);
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case llvm::Triple::RTEMS:
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case llvm::Triple::RTEMS:
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return new RTEMSTargetInfo<MipselTargetInfo>(T);
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return new RTEMSTargetInfo<Mips32ELTargetInfo>(T);
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case llvm::Triple::FreeBSD:
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case llvm::Triple::FreeBSD:
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return new FreeBSDTargetInfo<MipselTargetInfo>(T);
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return new FreeBSDTargetInfo<Mips32ELTargetInfo>(T);
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case llvm::Triple::NetBSD:
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case llvm::Triple::NetBSD:
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return new NetBSDTargetInfo<MipselTargetInfo>(T);
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return new NetBSDTargetInfo<Mips32ELTargetInfo>(T);
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default:
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default:
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return new MipsTargetInfo(T);
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return new Mips32ELTargetInfo(T);
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}
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}
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case llvm::Triple::le32:
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case llvm::Triple::le32:
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