forked from OSchip/llvm-project
[X86][SSE] Add bitselect tests where the mask is a broadcasted scalar
Shows issue that the IsNot() test can't see through shuffles/broadcasts
This commit is contained in:
Simon Pilgrim
parent
594be179c9
commit
f6cdcb0a5a
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@ -269,6 +269,164 @@ define <4 x i64> @bitselect_v4i64_mm(<4 x i64>* nocapture readonly, <4 x i64>* n
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ret <4 x i64> %7
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}
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define <4 x i64> @bitselect_v4i64_broadcast_rrr(<4 x i64> %a0, <4 x i64> %a1, i64 %a2) {
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; SSE-LABEL: bitselect_v4i64_broadcast_rrr:
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; SSE: # %bb.0:
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; SSE-NEXT: movq %rdi, %xmm4
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; SSE-NEXT: pshufd {{.*#+}} xmm5 = xmm4[0,1,0,1]
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; SSE-NEXT: pcmpeqd %xmm6, %xmm6
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; SSE-NEXT: pxor %xmm4, %xmm6
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; SSE-NEXT: pshufd {{.*#+}} xmm4 = xmm6[0,1,0,1]
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; SSE-NEXT: pand %xmm5, %xmm1
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; SSE-NEXT: pand %xmm5, %xmm0
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; SSE-NEXT: pand %xmm4, %xmm3
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; SSE-NEXT: por %xmm3, %xmm1
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; SSE-NEXT: pand %xmm4, %xmm2
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; SSE-NEXT: por %xmm2, %xmm0
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; SSE-NEXT: retq
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;
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; XOP-LABEL: bitselect_v4i64_broadcast_rrr:
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; XOP: # %bb.0:
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; XOP-NEXT: vmovq %rdi, %xmm2
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; XOP-NEXT: vmovq %rdi, %xmm3
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; XOP-NEXT: vmovddup {{.*#+}} xmm2 = xmm2[0,0]
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; XOP-NEXT: vinsertf128 $1, %xmm2, %ymm2, %ymm2
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; XOP-NEXT: vpcmpeqd %xmm4, %xmm4, %xmm4
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; XOP-NEXT: vpxor %xmm4, %xmm3, %xmm3
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; XOP-NEXT: vpshufd {{.*#+}} xmm3 = xmm3[0,1,0,1]
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; XOP-NEXT: vinsertf128 $1, %xmm3, %ymm3, %ymm3
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; XOP-NEXT: vandps %ymm2, %ymm0, %ymm0
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; XOP-NEXT: vandps %ymm3, %ymm1, %ymm1
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; XOP-NEXT: vorps %ymm1, %ymm0, %ymm0
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; XOP-NEXT: retq
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;
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; AVX1-LABEL: bitselect_v4i64_broadcast_rrr:
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; AVX1: # %bb.0:
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; AVX1-NEXT: vmovq %rdi, %xmm2
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; AVX1-NEXT: vmovq %rdi, %xmm3
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; AVX1-NEXT: vmovddup {{.*#+}} xmm2 = xmm2[0,0]
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; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm2, %ymm2
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; AVX1-NEXT: vpcmpeqd %xmm4, %xmm4, %xmm4
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; AVX1-NEXT: vpxor %xmm4, %xmm3, %xmm3
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; AVX1-NEXT: vpshufd {{.*#+}} xmm3 = xmm3[0,1,0,1]
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; AVX1-NEXT: vinsertf128 $1, %xmm3, %ymm3, %ymm3
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; AVX1-NEXT: vandps %ymm2, %ymm0, %ymm0
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; AVX1-NEXT: vandps %ymm3, %ymm1, %ymm1
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; AVX1-NEXT: vorps %ymm1, %ymm0, %ymm0
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; AVX1-NEXT: retq
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;
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; AVX2-LABEL: bitselect_v4i64_broadcast_rrr:
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; AVX2: # %bb.0:
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; AVX2-NEXT: vmovq %rdi, %xmm2
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; AVX2-NEXT: vpbroadcastq %xmm2, %ymm3
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; AVX2-NEXT: vpcmpeqd %xmm4, %xmm4, %xmm4
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; AVX2-NEXT: vpxor %xmm4, %xmm2, %xmm2
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; AVX2-NEXT: vpbroadcastq %xmm2, %ymm2
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; AVX2-NEXT: vpand %ymm3, %ymm0, %ymm0
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; AVX2-NEXT: vpand %ymm2, %ymm1, %ymm1
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; AVX2-NEXT: vpor %ymm1, %ymm0, %ymm0
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; AVX2-NEXT: retq
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;
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; AVX512F-LABEL: bitselect_v4i64_broadcast_rrr:
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; AVX512F: # %bb.0:
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; AVX512F-NEXT: vmovq %rdi, %xmm2
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; AVX512F-NEXT: vmovq %rdi, %xmm3
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; AVX512F-NEXT: vpbroadcastq %xmm3, %ymm3
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; AVX512F-NEXT: vpternlogq $15, %zmm2, %zmm2, %zmm2
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; AVX512F-NEXT: vpbroadcastq %xmm2, %ymm2
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; AVX512F-NEXT: vpand %ymm3, %ymm0, %ymm0
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; AVX512F-NEXT: vpand %ymm2, %ymm1, %ymm1
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; AVX512F-NEXT: vpor %ymm1, %ymm0, %ymm0
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; AVX512F-NEXT: retq
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%1 = insertelement <4 x i64> undef, i64 %a2, i32 0
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%2 = shufflevector <4 x i64> %1, <4 x i64> undef, <4 x i32> zeroinitializer
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%3 = xor <4 x i64> %1, <i64 -1, i64 undef, i64 undef, i64 undef>
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%4 = shufflevector <4 x i64> %3, <4 x i64> undef, <4 x i32> zeroinitializer
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%5 = and <4 x i64> %a0, %2
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%6 = and <4 x i64> %a1, %4
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%7 = or <4 x i64> %5, %6
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ret <4 x i64> %7
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}
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define <4 x i64> @bitselect_v4i64_broadcast_rrm(<4 x i64> %a0, <4 x i64> %a1, i64* %p2) {
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; SSE-LABEL: bitselect_v4i64_broadcast_rrm:
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; SSE: # %bb.0:
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; SSE-NEXT: movq {{.*#+}} xmm4 = mem[0],zero
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; SSE-NEXT: pshufd {{.*#+}} xmm5 = xmm4[0,1,0,1]
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; SSE-NEXT: pcmpeqd %xmm6, %xmm6
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; SSE-NEXT: pxor %xmm4, %xmm6
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; SSE-NEXT: pshufd {{.*#+}} xmm4 = xmm6[0,1,0,1]
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; SSE-NEXT: pand %xmm5, %xmm1
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; SSE-NEXT: pand %xmm5, %xmm0
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; SSE-NEXT: pand %xmm4, %xmm3
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; SSE-NEXT: por %xmm3, %xmm1
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; SSE-NEXT: pand %xmm4, %xmm2
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; SSE-NEXT: por %xmm2, %xmm0
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; SSE-NEXT: retq
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;
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; XOP-LABEL: bitselect_v4i64_broadcast_rrm:
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; XOP: # %bb.0:
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; XOP-NEXT: vmovq {{.*#+}} xmm2 = mem[0],zero
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; XOP-NEXT: vpshufd {{.*#+}} xmm3 = xmm2[0,1,0,1]
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; XOP-NEXT: vinsertf128 $1, %xmm3, %ymm3, %ymm3
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; XOP-NEXT: vpcmpeqd %xmm4, %xmm4, %xmm4
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; XOP-NEXT: vpxor %xmm4, %xmm2, %xmm2
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; XOP-NEXT: vpshufd {{.*#+}} xmm2 = xmm2[0,1,0,1]
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; XOP-NEXT: vinsertf128 $1, %xmm2, %ymm2, %ymm2
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; XOP-NEXT: vandps %ymm3, %ymm0, %ymm0
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; XOP-NEXT: vandps %ymm2, %ymm1, %ymm1
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; XOP-NEXT: vorps %ymm1, %ymm0, %ymm0
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; XOP-NEXT: retq
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;
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; AVX1-LABEL: bitselect_v4i64_broadcast_rrm:
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; AVX1: # %bb.0:
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; AVX1-NEXT: vmovq {{.*#+}} xmm2 = mem[0],zero
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; AVX1-NEXT: vpshufd {{.*#+}} xmm3 = xmm2[0,1,0,1]
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; AVX1-NEXT: vinsertf128 $1, %xmm3, %ymm3, %ymm3
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; AVX1-NEXT: vpcmpeqd %xmm4, %xmm4, %xmm4
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; AVX1-NEXT: vpxor %xmm4, %xmm2, %xmm2
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; AVX1-NEXT: vpshufd {{.*#+}} xmm2 = xmm2[0,1,0,1]
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; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm2, %ymm2
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; AVX1-NEXT: vandps %ymm3, %ymm0, %ymm0
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; AVX1-NEXT: vandps %ymm2, %ymm1, %ymm1
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; AVX1-NEXT: vorps %ymm1, %ymm0, %ymm0
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; AVX1-NEXT: retq
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;
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; AVX2-LABEL: bitselect_v4i64_broadcast_rrm:
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; AVX2: # %bb.0:
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; AVX2-NEXT: vmovq {{.*#+}} xmm2 = mem[0],zero
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; AVX2-NEXT: vpbroadcastq %xmm2, %ymm3
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; AVX2-NEXT: vpcmpeqd %xmm4, %xmm4, %xmm4
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; AVX2-NEXT: vpxor %xmm4, %xmm2, %xmm2
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; AVX2-NEXT: vpbroadcastq %xmm2, %ymm2
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; AVX2-NEXT: vpand %ymm3, %ymm0, %ymm0
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; AVX2-NEXT: vpand %ymm2, %ymm1, %ymm1
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; AVX2-NEXT: vpor %ymm1, %ymm0, %ymm0
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; AVX2-NEXT: retq
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;
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; AVX512F-LABEL: bitselect_v4i64_broadcast_rrm:
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; AVX512F: # %bb.0:
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; AVX512F-NEXT: movq (%rdi), %rax
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; AVX512F-NEXT: vmovq %rax, %xmm2
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; AVX512F-NEXT: vmovq %rax, %xmm3
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; AVX512F-NEXT: vpbroadcastq %xmm3, %ymm3
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; AVX512F-NEXT: vpternlogq $15, %zmm2, %zmm2, %zmm2
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; AVX512F-NEXT: vpbroadcastq %xmm2, %ymm2
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; AVX512F-NEXT: vpand %ymm3, %ymm0, %ymm0
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; AVX512F-NEXT: vpand %ymm2, %ymm1, %ymm1
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; AVX512F-NEXT: vpor %ymm1, %ymm0, %ymm0
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; AVX512F-NEXT: retq
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%a2 = load i64, i64* %p2
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%1 = insertelement <4 x i64> undef, i64 %a2, i32 0
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%2 = shufflevector <4 x i64> %1, <4 x i64> undef, <4 x i32> zeroinitializer
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%3 = xor <4 x i64> %1, <i64 -1, i64 undef, i64 undef, i64 undef>
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%4 = shufflevector <4 x i64> %3, <4 x i64> undef, <4 x i32> zeroinitializer
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%5 = and <4 x i64> %a0, %2
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%6 = and <4 x i64> %a1, %4
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%7 = or <4 x i64> %5, %6
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ret <4 x i64> %7
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}
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;
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; 512-bit vectors
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;
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