forked from OSchip/llvm-project
[VE] fp32/64 fadd/fsub/fdiv/fmul isel patterns
Summary: fp32/64 fadd/fsub/fdiv/fmul isel patterns and tests. Reviewers: arsenm, craig.topper, rengolin, k-ishizaka Subscribers: merge_guards_bot, wdng, hiraditya, llvm-commits Differential Revision: https://reviews.llvm.org/D73540
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@ -368,6 +368,18 @@ multiclass RRNCm<string opcStr, bits<8>opc,
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RRNDmrm<opcStr, opc, RC, Ty, RC, Ty, immOp2>,
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RRNDmim<opcStr, opc, RC, Ty, RC, Ty, immOp, immOp2>;
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// Used by fadd, fsub, and similar floating point instructions
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// The order of operands are "$sx, $sy, $sz"
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multiclass RRFm<string opcStr, bits<8>opc,
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RegisterClass RC, ValueType Ty, Operand immOp, Operand immOp2,
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SDPatternOperator OpNode=null_frag> :
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RRmrr<opcStr, opc, RC, Ty, RC, Ty, OpNode>,
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RRmir<opcStr, opc, RC, Ty, RC, Ty, immOp, null_frag>,
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RRmiz<opcStr, opc, RC, Ty, RC, Ty, immOp, null_frag>,
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RRNDmrm<opcStr, opc, RC, Ty, RC, Ty, immOp2>,
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RRNDmim<opcStr, opc, RC, Ty, RC, Ty, immOp, immOp2>;
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// Multiclass for RR type instructions
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// Used by sra, sla, sll, and similar instructions
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// The order of operands are "$sx, $sz, $sy"
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@ -667,6 +679,26 @@ def : Pat<(i32 (srl i32:$src, i32:$val)),
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$src, sub_i32), 32), $val), sub_i32)>;
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// 5.3.2.5. Floating-point Arithmetic Operation Instructions
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let cx = 0 in
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defm FAD : RRFm<"fadd.d", 0x4C, I64, f64, simm7Op64, uimm6Op64, fadd>;
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let cx = 1 in
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defm FADS : RRFm<"fadd.s", 0x4C, F32, f32, simm7Op32, uimm6Op32, fadd>;
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let cx = 0 in
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defm FSB : RRFm<"fsub.d", 0x5C, I64, f64, simm7Op64, uimm6Op64, fsub>;
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let cx = 1 in
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defm FSBS : RRFm<"fsub.s", 0x5C, F32, f32, simm7Op32, uimm6Op32, fsub>;
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let cx = 0 in
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defm FMP : RRFm<"fmul.d", 0x4D, I64, f64, simm7Op64, uimm6Op64, fmul>;
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let cx = 1 in
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defm FMPS : RRFm<"fmul.s", 0x4D, F32, f32, simm7Op32, uimm6Op32, fmul>;
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let cx = 0 in
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defm FDV : RRFm<"fdiv.d", 0x5D, I64, f64, simm7Op64, uimm6Op64, fdiv>;
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let cx = 1 in
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defm FDVS : RRFm<"fdiv.s", 0x5D, F32, f32, simm7Op32, uimm6Op32, fdiv>;
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// FCP instruction
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let cx = 0 in
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defm FCP : RRm<"fcmp.d", 0x7E, I64, f64, simm7Op64, uimm6Op64>;
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@ -0,0 +1,63 @@
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; RUN: llc < %s -mtriple=ve-unknown-unknown | FileCheck %s
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define float @func1(float %a, float %b) {
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; CHECK-LABEL: func1:
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; CHECK: .LBB{{[0-9]+}}_2:
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; CHECK-NEXT: fadd.s %s0, %s0, %s1
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; CHECK-NEXT: or %s11, 0, %s9
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%r = fadd float %a, %b
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ret float %r
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}
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define double @func2(double %a, double %b) {
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; CHECK-LABEL: func2:
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; CHECK: .LBB{{[0-9]+}}_2:
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; CHECK-NEXT: fadd.d %s0, %s0, %s1
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; CHECK-NEXT: or %s11, 0, %s9
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%r = fadd double %a, %b
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ret double %r
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}
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define float @func4(float %a) {
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; CHECK-LABEL: func4:
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; CHECK: .LBB{{[0-9]+}}_2:
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; CHECK-NEXT: lea.sl %s1, 1084227584
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; CHECK-NEXT: or %s1, 0, %s1
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; CHECK-NEXT: fadd.s %s0, %s0, %s1
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; CHECK-NEXT: or %s11, 0, %s9
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%r = fadd float %a, 5.000000e+00
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ret float %r
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}
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define double @func5(double %a) {
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; CHECK-LABEL: func5:
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; CHECK: .LBB{{[0-9]+}}_2:
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; CHECK-NEXT: lea.sl %s1, 1075052544
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; CHECK-NEXT: fadd.d %s0, %s0, %s1
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; CHECK-NEXT: or %s11, 0, %s9
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%r = fadd double %a, 5.000000e+00
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ret double %r
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}
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define float @func7(float %a) {
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; CHECK-LABEL: func7:
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; CHECK: .LBB{{[0-9]+}}_2:
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; CHECK-NEXT: lea.sl %s1, 2139095039
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; CHECK-NEXT: or %s1, 0, %s1
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; CHECK-NEXT: fadd.s %s0, %s0, %s1
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; CHECK-NEXT: or %s11, 0, %s9
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%r = fadd float %a, 0x47EFFFFFE0000000
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ret float %r
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}
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define double @func8(double %a) {
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; CHECK-LABEL: func8:
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; CHECK: .LBB{{[0-9]+}}_2:
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; CHECK-NEXT: lea %s1, -1
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; CHECK-NEXT: and %s1, %s1, (32)0
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; CHECK-NEXT: lea.sl %s1, 2146435071(%s1)
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; CHECK-NEXT: fadd.d %s0, %s0, %s1
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; CHECK-NEXT: or %s11, 0, %s9
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%r = fadd double %a, 0x7FEFFFFFFFFFFFFF
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ret double %r
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}
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@ -0,0 +1,63 @@
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; RUN: llc < %s -mtriple=ve-unknown-unknown | FileCheck %s
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define float @func1(float %a, float %b) {
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; CHECK-LABEL: func1:
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; CHECK: .LBB{{[0-9]+}}_2:
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; CHECK-NEXT: fdiv.s %s0, %s0, %s1
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; CHECK-NEXT: or %s11, 0, %s9
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%r = fdiv float %a, %b
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ret float %r
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}
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define double @func2(double %a, double %b) {
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; CHECK-LABEL: func2:
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; CHECK: .LBB{{[0-9]+}}_2:
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; CHECK-NEXT: fdiv.d %s0, %s0, %s1
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; CHECK-NEXT: or %s11, 0, %s9
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%r = fdiv double %a, %b
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ret double %r
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}
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define float @func4(float %a) {
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; CHECK-LABEL: func4:
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; CHECK: .LBB{{[0-9]+}}_2:
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; CHECK-NEXT: lea.sl %s1, 1084227584
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; CHECK-NEXT: or %s1, 0, %s1
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; CHECK-NEXT: fdiv.s %s0, %s0, %s1
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; CHECK-NEXT: or %s11, 0, %s9
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%r = fdiv float %a, 5.000000e+00
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ret float %r
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}
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define double @func5(double %a) {
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; CHECK-LABEL: func5:
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; CHECK: .LBB{{[0-9]+}}_2:
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; CHECK-NEXT: lea.sl %s1, 1075052544
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; CHECK-NEXT: fdiv.d %s0, %s0, %s1
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; CHECK-NEXT: or %s11, 0, %s9
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%r = fdiv double %a, 5.000000e+00
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ret double %r
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}
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define float @func7(float %a) {
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; CHECK-LABEL: func7:
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; CHECK: .LBB{{[0-9]+}}_2:
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; CHECK-NEXT: lea.sl %s1, 2139095039
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; CHECK-NEXT: or %s1, 0, %s1
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; CHECK-NEXT: fdiv.s %s0, %s0, %s1
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; CHECK-NEXT: or %s11, 0, %s9
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%r = fdiv float %a, 0x47EFFFFFE0000000
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ret float %r
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}
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define double @func8(double %a) {
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; CHECK-LABEL: func8:
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; CHECK: .LBB{{[0-9]+}}_2:
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; CHECK-NEXT: lea %s1, -1
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; CHECK-NEXT: and %s1, %s1, (32)0
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; CHECK-NEXT: lea.sl %s1, 2146435071(%s1)
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; CHECK-NEXT: fdiv.d %s0, %s0, %s1
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; CHECK-NEXT: or %s11, 0, %s9
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%r = fdiv double %a, 0x7FEFFFFFFFFFFFFF
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ret double %r
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}
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@ -0,0 +1,63 @@
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; RUN: llc < %s -mtriple=ve-unknown-unknown | FileCheck %s
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define float @func1(float %a, float %b) {
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; CHECK-LABEL: func1:
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; CHECK: .LBB{{[0-9]+}}_2:
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; CHECK-NEXT: fmul.s %s0, %s0, %s1
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; CHECK-NEXT: or %s11, 0, %s9
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%r = fmul float %a, %b
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ret float %r
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}
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define double @func2(double %a, double %b) {
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; CHECK-LABEL: func2:
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; CHECK: .LBB{{[0-9]+}}_2:
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; CHECK-NEXT: fmul.d %s0, %s0, %s1
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; CHECK-NEXT: or %s11, 0, %s9
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%r = fmul double %a, %b
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ret double %r
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}
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define float @func4(float %a) {
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; CHECK-LABEL: func4:
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; CHECK: .LBB{{[0-9]+}}_2:
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; CHECK-NEXT: lea.sl %s1, 1084227584
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; CHECK-NEXT: or %s1, 0, %s1
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; CHECK-NEXT: fmul.s %s0, %s0, %s1
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; CHECK-NEXT: or %s11, 0, %s9
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%r = fmul float %a, 5.000000e+00
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ret float %r
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}
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define double @func5(double %a) {
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; CHECK-LABEL: func5:
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; CHECK: .LBB{{[0-9]+}}_2:
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; CHECK-NEXT: lea.sl %s1, 1075052544
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; CHECK-NEXT: fmul.d %s0, %s0, %s1
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; CHECK-NEXT: or %s11, 0, %s9
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%r = fmul double %a, 5.000000e+00
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ret double %r
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}
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define float @func7(float %a) {
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; CHECK-LABEL: func7:
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; CHECK: .LBB{{[0-9]+}}_2:
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; CHECK-NEXT: lea.sl %s1, 2139095039
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; CHECK-NEXT: or %s1, 0, %s1
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; CHECK-NEXT: fmul.s %s0, %s0, %s1
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; CHECK-NEXT: or %s11, 0, %s9
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%r = fmul float %a, 0x47EFFFFFE0000000
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ret float %r
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}
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define double @func8(double %a) {
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; CHECK-LABEL: func8:
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; CHECK: .LBB{{[0-9]+}}_2:
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; CHECK-NEXT: lea %s1, -1
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; CHECK-NEXT: and %s1, %s1, (32)0
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; CHECK-NEXT: lea.sl %s1, 2146435071(%s1)
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; CHECK-NEXT: fmul.d %s0, %s0, %s1
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; CHECK-NEXT: or %s11, 0, %s9
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%r = fmul double %a, 0x7FEFFFFFFFFFFFFF
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ret double %r
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}
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@ -0,0 +1,63 @@
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; RUN: llc < %s -mtriple=ve-unknown-unknown | FileCheck %s
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define float @func1(float %a, float %b) {
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; CHECK-LABEL: func1:
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; CHECK: .LBB{{[0-9]+}}_2:
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; CHECK-NEXT: fsub.s %s0, %s0, %s1
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; CHECK-NEXT: or %s11, 0, %s9
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%r = fsub float %a, %b
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ret float %r
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}
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define double @func2(double %a, double %b) {
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; CHECK-LABEL: func2:
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; CHECK: .LBB{{[0-9]+}}_2:
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; CHECK-NEXT: fsub.d %s0, %s0, %s1
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; CHECK-NEXT: or %s11, 0, %s9
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%r = fsub double %a, %b
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ret double %r
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}
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define float @func4(float %a) {
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; CHECK-LABEL: func4:
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; CHECK: .LBB{{[0-9]+}}_2:
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; CHECK-NEXT: lea.sl %s1, -1063256064
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; CHECK-NEXT: or %s1, 0, %s1
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; CHECK-NEXT: fadd.s %s0, %s0, %s1
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; CHECK-NEXT: or %s11, 0, %s9
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%r = fadd float %a, -5.000000e+00
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ret float %r
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}
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define double @func5(double %a) {
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; CHECK-LABEL: func5:
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; CHECK: .LBB{{[0-9]+}}_2:
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; CHECK-NEXT: lea.sl %s1, -1072431104
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; CHECK-NEXT: fadd.d %s0, %s0, %s1
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; CHECK-NEXT: or %s11, 0, %s9
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%r = fadd double %a, -5.000000e+00
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ret double %r
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}
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define float @func7(float %a) {
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; CHECK-LABEL: func7:
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; CHECK: .LBB{{[0-9]+}}_2:
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; CHECK-NEXT: lea.sl %s1, -8388609
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; CHECK-NEXT: or %s1, 0, %s1
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; CHECK-NEXT: fadd.s %s0, %s0, %s1
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; CHECK-NEXT: or %s11, 0, %s9
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%r = fadd float %a, 0xC7EFFFFFE0000000
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ret float %r
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}
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define double @func8(double %a) {
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; CHECK-LABEL: func8:
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; CHECK: .LBB{{[0-9]+}}_2:
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; CHECK-NEXT: lea %s1, -1
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; CHECK-NEXT: and %s1, %s1, (32)0
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; CHECK-NEXT: lea.sl %s1, -1048577(%s1)
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; CHECK-NEXT: fadd.d %s0, %s0, %s1
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; CHECK-NEXT: or %s11, 0, %s9
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%r = fadd double %a, 0xFFEFFFFFFFFFFFFF
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ret double %r
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}
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