forked from OSchip/llvm-project
[InstCombine] Add test coverage for PR48683
D108992 added self-multiply handling to KnownBits::mul but we don't use it yet..
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@ -1,10 +1,10 @@
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; NOTE: Assertions have been autogenerated by update_test_checks.py
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -instcombine -S | FileCheck %s
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define i32 @foo(i32 %x, i32 %y) {
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; CHECK-LABEL: @foo(
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; CHECK-NEXT: [[A:%.*]] = and i32 %x, 7
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; CHECK-NEXT: [[B:%.*]] = and i32 %y, 7
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; CHECK-NEXT: [[A:%.*]] = and i32 [[X:%.*]], 7
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; CHECK-NEXT: [[B:%.*]] = and i32 [[Y:%.*]], 7
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; CHECK-NEXT: [[C:%.*]] = mul nuw nsw i32 [[A]], [[B]]
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; CHECK-NEXT: [[D:%.*]] = shl nuw i32 [[C]], 26
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; CHECK-NEXT: [[E:%.*]] = ashr exact i32 [[D]], 26
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@ -17,3 +17,44 @@ define i32 @foo(i32 %x, i32 %y) {
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%e = ashr i32 %d, 26
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ret i32 %e
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}
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; PR48683 'Quadratic Reciprocity' - and(mul(x,x),2) -> 0
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define i1 @PR48683(i32 %x) {
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; CHECK-LABEL: @PR48683(
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; CHECK-NEXT: [[A:%.*]] = mul i32 [[X:%.*]], [[X]]
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; CHECK-NEXT: [[B:%.*]] = and i32 [[A]], 2
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; CHECK-NEXT: [[C:%.*]] = icmp ne i32 [[B]], 0
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; CHECK-NEXT: ret i1 [[C]]
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;
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%a = mul i32 %x, %x
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%b = and i32 %a, 2
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%c = icmp ne i32 %b, 0
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ret i1 %c
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}
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define <4 x i1> @PR48683_vec(<4 x i32> %x) {
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; CHECK-LABEL: @PR48683_vec(
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; CHECK-NEXT: [[A:%.*]] = mul <4 x i32> [[X:%.*]], [[X]]
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; CHECK-NEXT: [[B:%.*]] = and <4 x i32> [[A]], <i32 2, i32 2, i32 2, i32 2>
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; CHECK-NEXT: [[C:%.*]] = icmp ne <4 x i32> [[B]], zeroinitializer
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; CHECK-NEXT: ret <4 x i1> [[C]]
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;
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%a = mul <4 x i32> %x, %x
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%b = and <4 x i32> %a, <i32 2, i32 2, i32 2, i32 2>
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%c = icmp ne <4 x i32> %b, zeroinitializer
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ret <4 x i1> %c
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}
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define <4 x i1> @PR48683_vec_undef(<4 x i32> %x) {
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; CHECK-LABEL: @PR48683_vec_undef(
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; CHECK-NEXT: [[A:%.*]] = mul <4 x i32> [[X:%.*]], [[X]]
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; CHECK-NEXT: [[B:%.*]] = and <4 x i32> [[A]], <i32 2, i32 2, i32 2, i32 undef>
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; CHECK-NEXT: [[C:%.*]] = icmp ne <4 x i32> [[B]], zeroinitializer
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; CHECK-NEXT: ret <4 x i1> [[C]]
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;
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%a = mul <4 x i32> %x, %x
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%b = and <4 x i32> %a, <i32 2, i32 2, i32 2, i32 undef>
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%c = icmp ne <4 x i32> %b, zeroinitializer
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ret <4 x i1> %c
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}
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