forked from OSchip/llvm-project
remove names from comments, fix typos; NFC
llvm-svn: 238027
This commit is contained in:
parent
864a165864
commit
f692ef9e47
|
@ -36,8 +36,7 @@ class RegScavenger {
|
||||||
MachineBasicBlock::iterator MBBI;
|
MachineBasicBlock::iterator MBBI;
|
||||||
unsigned NumRegUnits;
|
unsigned NumRegUnits;
|
||||||
|
|
||||||
/// Tracking - True if RegScavenger is currently tracking the liveness of
|
/// True if RegScavenger is currently tracking the liveness of registers.
|
||||||
/// registers.
|
|
||||||
bool Tracking;
|
bool Tracking;
|
||||||
|
|
||||||
/// Information on scavenged registers (held in a spill slot).
|
/// Information on scavenged registers (held in a spill slot).
|
||||||
|
@ -58,8 +57,8 @@ class RegScavenger {
|
||||||
/// A vector of information on scavenged registers.
|
/// A vector of information on scavenged registers.
|
||||||
SmallVector<ScavengedInfo, 2> Scavenged;
|
SmallVector<ScavengedInfo, 2> Scavenged;
|
||||||
|
|
||||||
/// RegUnitsAvailable - The current state of each reg unit immediatelly
|
/// The current state of each reg unit immediately before MBBI.
|
||||||
/// before MBBI. One bit per register unit. If bit is not set it means any
|
/// One bit per register unit. If bit is not set it means any
|
||||||
/// register containing that register unit is currently being used.
|
/// register containing that register unit is currently being used.
|
||||||
BitVector RegUnitsAvailable;
|
BitVector RegUnitsAvailable;
|
||||||
|
|
||||||
|
@ -72,18 +71,17 @@ public:
|
||||||
RegScavenger()
|
RegScavenger()
|
||||||
: MBB(nullptr), NumRegUnits(0), Tracking(false) {}
|
: MBB(nullptr), NumRegUnits(0), Tracking(false) {}
|
||||||
|
|
||||||
/// enterBasicBlock - Start tracking liveness from the begin of the specific
|
/// Start tracking liveness from the begin of the specific basic block.
|
||||||
/// basic block.
|
|
||||||
void enterBasicBlock(MachineBasicBlock *mbb);
|
void enterBasicBlock(MachineBasicBlock *mbb);
|
||||||
|
|
||||||
/// initRegState - allow resetting register state info for multiple
|
/// Allow resetting register state info for multiple
|
||||||
/// passes over/within the same function.
|
/// passes over/within the same function.
|
||||||
void initRegState();
|
void initRegState();
|
||||||
|
|
||||||
/// forward - Move the internal MBB iterator and update register states.
|
/// Move the internal MBB iterator and update register states.
|
||||||
void forward();
|
void forward();
|
||||||
|
|
||||||
/// forward - Move the internal MBB iterator and update register states until
|
/// Move the internal MBB iterator and update register states until
|
||||||
/// it has processed the specific iterator.
|
/// it has processed the specific iterator.
|
||||||
void forward(MachineBasicBlock::iterator I) {
|
void forward(MachineBasicBlock::iterator I) {
|
||||||
if (!Tracking && MBB->begin() != I) forward();
|
if (!Tracking && MBB->begin() != I) forward();
|
||||||
|
@ -99,7 +97,7 @@ public:
|
||||||
while (MBBI != I) unprocess();
|
while (MBBI != I) unprocess();
|
||||||
}
|
}
|
||||||
|
|
||||||
/// skipTo - Move the internal MBB iterator but do not update register states.
|
/// Move the internal MBB iterator but do not update register states.
|
||||||
void skipTo(MachineBasicBlock::iterator I) {
|
void skipTo(MachineBasicBlock::iterator I) {
|
||||||
if (I == MachineBasicBlock::iterator(nullptr))
|
if (I == MachineBasicBlock::iterator(nullptr))
|
||||||
Tracking = false;
|
Tracking = false;
|
||||||
|
@ -110,14 +108,13 @@ public:
|
||||||
return MBBI;
|
return MBBI;
|
||||||
}
|
}
|
||||||
|
|
||||||
/// isRegUsed - return if a specific register is currently used.
|
/// Return if a specific register is currently used.
|
||||||
bool isRegUsed(unsigned Reg, bool includeReserved = true) const;
|
bool isRegUsed(unsigned Reg, bool includeReserved = true) const;
|
||||||
|
|
||||||
/// getRegsAvailable - Return all available registers in the register class
|
/// Return all available registers in the register class in Mask.
|
||||||
/// in Mask.
|
|
||||||
BitVector getRegsAvailable(const TargetRegisterClass *RC);
|
BitVector getRegsAvailable(const TargetRegisterClass *RC);
|
||||||
|
|
||||||
/// FindUnusedReg - Find a unused register of the specified register class.
|
/// Find an unused register of the specified register class.
|
||||||
/// Return 0 if none is found.
|
/// Return 0 if none is found.
|
||||||
unsigned FindUnusedReg(const TargetRegisterClass *RegClass) const;
|
unsigned FindUnusedReg(const TargetRegisterClass *RegClass) const;
|
||||||
|
|
||||||
|
@ -144,7 +141,7 @@ public:
|
||||||
A.push_back(I->FrameIndex);
|
A.push_back(I->FrameIndex);
|
||||||
}
|
}
|
||||||
|
|
||||||
/// scavengeRegister - Make a register of the specific register class
|
/// Make a register of the specific register class
|
||||||
/// available and do the appropriate bookkeeping. SPAdj is the stack
|
/// available and do the appropriate bookkeeping. SPAdj is the stack
|
||||||
/// adjustment due to call frame, it's passed along to eliminateFrameIndex().
|
/// adjustment due to call frame, it's passed along to eliminateFrameIndex().
|
||||||
/// Returns the scavenged register.
|
/// Returns the scavenged register.
|
||||||
|
@ -154,11 +151,10 @@ public:
|
||||||
return scavengeRegister(RegClass, MBBI, SPAdj);
|
return scavengeRegister(RegClass, MBBI, SPAdj);
|
||||||
}
|
}
|
||||||
|
|
||||||
/// setRegUsed - Tell the scavenger a register is used.
|
/// Tell the scavenger a register is used.
|
||||||
///
|
|
||||||
void setRegUsed(unsigned Reg);
|
void setRegUsed(unsigned Reg);
|
||||||
private:
|
private:
|
||||||
/// isReserved - Returns true if a register is reserved. It is never "unused".
|
/// Returns true if a register is reserved. It is never "unused".
|
||||||
bool isReserved(unsigned Reg) const { return MRI->isReserved(Reg); }
|
bool isReserved(unsigned Reg) const { return MRI->isReserved(Reg); }
|
||||||
|
|
||||||
/// setUsed / setUnused - Mark the state of one or a number of register units.
|
/// setUsed / setUnused - Mark the state of one or a number of register units.
|
||||||
|
@ -177,9 +173,8 @@ private:
|
||||||
/// Add all Reg Units that Reg contains to BV.
|
/// Add all Reg Units that Reg contains to BV.
|
||||||
void addRegUnits(BitVector &BV, unsigned Reg);
|
void addRegUnits(BitVector &BV, unsigned Reg);
|
||||||
|
|
||||||
/// findSurvivorReg - Return the candidate register that is unused for the
|
/// Return the candidate register that is unused for the longest after
|
||||||
/// longest after StartMI. UseMI is set to the instruction where the search
|
/// StartMI. UseMI is set to the instruction where the search stopped.
|
||||||
/// stopped.
|
|
||||||
///
|
///
|
||||||
/// No more than InstrLimit instructions are inspected.
|
/// No more than InstrLimit instructions are inspected.
|
||||||
unsigned findSurvivorReg(MachineBasicBlock::iterator StartMI,
|
unsigned findSurvivorReg(MachineBasicBlock::iterator StartMI,
|
||||||
|
|
Loading…
Reference in New Issue