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[X86] Remove ProcIntelGLM/ProcIntelGLP/ProcIntelTRM and replace them with a single feature flag covers the two places they were used. 

Differential Revision: https://reviews.llvm.org/D71048
This commit is contained in:
Craig Topper 2019-12-05 10:24:10 -08:00
parent 055779a9ac
commit f688570d5c
4 changed files with 15 additions and 23 deletions
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16
llvm/lib/Target/X86/X86.td
View File

@ -455,6 +455,10 @@ def FeatureFastVectorShiftMasks
"fast-vector-shift-masks", "HasFastVectorShiftMasks", "true",
"Prefer a left/right vector logical shift pair over a shift+and pair">;
def FeatureUseGLMDivSqrtCosts
: SubtargetFeature<"use-glm-div-sqrt-costs", "UseGLMDivSqrtCosts", "true",
"Use Goldmont specific floating point div/sqrt costs">;
// Merge branches using three-way conditional code.
def FeatureMergeToThreeWayBranch : SubtargetFeature<"merge-to-threeway-branch",
"ThreewayBranchProfitable", "true",
@ -469,12 +473,6 @@ def FeatureUseAA : SubtargetFeature<"use-aa", "UseAA", "true",
def ProcIntelAtom : SubtargetFeature<"", "X86ProcFamily", "IntelAtom", "">;
// Silvermont
def ProcIntelSLM : SubtargetFeature<"", "X86ProcFamily", "IntelSLM", "">;
// Goldmont
def ProcIntelGLM : SubtargetFeature<"", "X86ProcFamily", "IntelGLM", "">;
// Goldmont Plus
def ProcIntelGLP : SubtargetFeature<"", "X86ProcFamily", "IntelGLP", "">;
// Tremont
def ProcIntelTRM : SubtargetFeature<"", "X86ProcFamily", "IntelTRM", "">;
//===----------------------------------------------------------------------===//
// Register File Description
@ -745,7 +743,7 @@ def ProcessorFeatures {
FeatureXSAVES,
FeatureCLFLUSHOPT,
FeatureFSGSBase];
list<SubtargetFeature> GLMSpecificFeatures = [ProcIntelGLM,
list<SubtargetFeature> GLMSpecificFeatures = [FeatureUseGLMDivSqrtCosts,
FeaturePOPCNTFalseDeps];
list<SubtargetFeature> GLMInheritableFeatures =
!listconcat(SLMInheritableFeatures, GLMAdditionalFeatures);
@ -756,7 +754,7 @@ def ProcessorFeatures {
list<SubtargetFeature> GLPAdditionalFeatures = [FeaturePTWRITE,
FeatureRDPID,
FeatureSGX];
list<SubtargetFeature> GLPSpecificFeatures = [ProcIntelGLP];
list<SubtargetFeature> GLPSpecificFeatures = [FeatureUseGLMDivSqrtCosts];
list<SubtargetFeature> GLPInheritableFeatures =
!listconcat(GLMInheritableFeatures, GLPAdditionalFeatures);
list<SubtargetFeature> GLPFeatures =
@ -768,7 +766,7 @@ def ProcessorFeatures {
FeatureMOVDIRI,
FeatureMOVDIR64B,
FeatureWAITPKG];
list<SubtargetFeature> TRMSpecificFeatures = [ProcIntelTRM];
list<SubtargetFeature> TRMSpecificFeatures = [FeatureUseGLMDivSqrtCosts];
list<SubtargetFeature> TRMFeatures =
!listconcat(GLPInheritableFeatures, TRMAdditionalFeatures,
TRMSpecificFeatures);

14
llvm/lib/Target/X86/X86Subtarget.h
View File

@ -56,10 +56,7 @@ public:
enum X86ProcFamilyEnum {
Others,
IntelAtom,
IntelSLM,
IntelGLM,
IntelGLP,
IntelTRM
IntelSLM
};
protected:
@ -451,6 +448,9 @@ protected:
/// Threeway branch is profitable in this subtarget.
bool ThreewayBranchProfitable = false;
/// Use Goldmont specific floating point div/sqrt costs.
bool UseGLMDivSqrtCosts = false;
/// What processor and OS we're targeting.
Triple TargetTriple;
@ -708,6 +708,7 @@ public:
}
bool useRetpolineExternalThunk() const { return UseRetpolineExternalThunk; }
bool preferMaskRegisters() const { return PreferMaskRegisters; }
bool useGLMDivSqrtCosts() const { return UseGLMDivSqrtCosts; }
unsigned getPreferVectorWidth() const { return PreferVectorWidth; }
unsigned getRequiredVectorWidth() const { return RequiredVectorWidth; }
@ -740,11 +741,6 @@ public:
/// TODO: to be removed later and replaced with suitable properties
bool isAtom() const { return X86ProcFamily == IntelAtom; }
bool isSLM() const { return X86ProcFamily == IntelSLM; }
bool isGLM() const {
return X86ProcFamily == IntelGLM ||
X86ProcFamily == IntelGLP ||
X86ProcFamily == IntelTRM;
}
bool useSoftFloat() const { return UseSoftFloat; }
bool useAA() const override { return UseAA; }

4
llvm/lib/Target/X86/X86TargetTransformInfo.cpp
View File

@ -188,7 +188,7 @@ int X86TTIImpl::getArithmeticInstrCost(
{ ISD::FDIV, MVT::v2f64, 65 }, // divpd
};
if (ST->isGLM())
if (ST->useGLMDivSqrtCosts())
if (const auto *Entry = CostTableLookup(GLMCostTable, ISD,
LT.second))
return LT.first * Entry->Cost;
@ -2202,7 +2202,7 @@ int X86TTIImpl::getIntrinsicInstrCost(Intrinsic::ID IID, Type *RetTy,
MVT MTy = LT.second;
// Attempt to lookup cost.
if (ST->isGLM())
if (ST->useGLMDivSqrtCosts())
if (const auto *Entry = CostTableLookup(GLMCostTbl, ISD, MTy))
return LT.first * Entry->Cost;

4
llvm/lib/Target/X86/X86TargetTransformInfo.h
View File

@ -78,6 +78,7 @@ class X86TTIImpl : public BasicTTIImplBase<X86TTIImpl> {
X86::FeatureSlowUAMem16,
X86::FeaturePreferMaskRegisters,
X86::FeatureInsertVZEROUPPER,
X86::FeatureUseGLMDivSqrtCosts,
// Perf-tuning flags.
X86::FeatureHasFastGather,
@ -89,10 +90,7 @@ class X86TTIImpl : public BasicTTIImplBase<X86TTIImpl> {
// CPU name enums. These just follow CPU string.
X86::ProcIntelAtom,
X86::ProcIntelGLM,
X86::ProcIntelGLP,
X86::ProcIntelSLM,
X86::ProcIntelTRM,
};
public: