forked from OSchip/llvm-project
[x86] propagate FMF from x86-specific intrinsic nodes to others during lowering
This is another fast-math-flags failure exposed by D90901.
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@ -25049,6 +25049,9 @@ SDValue X86TargetLowering::LowerINTRINSIC_WO_CHAIN(SDValue Op,
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MVT VT = Op.getSimpleValueType();
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const IntrinsicData* IntrData = getIntrinsicWithoutChain(IntNo);
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// Propagate flags from original node to transformed node(s).
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SelectionDAG::FlagInserter FlagsInserter(DAG, Op->getFlags());
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if (IntrData) {
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switch(IntrData->Type) {
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case INTR_TYPE_1OP: {
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@ -47,13 +47,15 @@ define float @fmf_setcc_canon(float %x, float %y) {
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declare <16 x float> @llvm.x86.avx512.vfmadd.ps.512(<16 x float>, <16 x float>, <16 x float>, i32)
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; Check that FMF are propagated twice: from IR to x86-specific node and from x86-specific node to generic node.
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; CHECK-LABEL: Initial selection DAG: %bb.0 'fmf_target_intrinsic:'
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; CHECK: v16f32 = llvm.x86.avx512.vfmadd.ps.512 ninf nsz TargetConstant:i64<{{.*}}>
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; CHECK: v16f32 = llvm.x86.avx512.vfmadd.ps.512 nsz TargetConstant:i64<{{.*}}>
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; CHECK-LABEL: Legalized selection DAG: %bb.0 'fmf_target_intrinsic:'
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; CHECK: v16f32 = fma t{{.*}}
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; CHECK: v16f32 = fma t{{.*}}
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; CHECK: v16f32 = fma ninf nsz t{{.*}}
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; CHECK: v16f32 = fma nsz t{{.*}}
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define <16 x float> @fmf_target_intrinsic(<16 x float> %a, <16 x float> %b, <16 x float> %c) nounwind {
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%t0 = tail call ninf nsz <16 x float> @llvm.x86.avx512.vfmadd.ps.512(<16 x float> %a, <16 x float> %b, <16 x float> %c, i32 4)
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