From f66ba4cfa7ca312caee5f8f32fcceff592a15acd Mon Sep 17 00:00:00 2001 From: Sanjay Patel Date: Wed, 19 May 2021 12:40:09 -0400 Subject: [PATCH] [x86] propagate FMF from x86-specific intrinsic nodes to others during lowering This is another fast-math-flags failure exposed by D90901. --- llvm/lib/Target/X86/X86ISelLowering.cpp | 3 +++ llvm/test/CodeGen/X86/fmf-propagation.ll | 6 ++++-- 2 files changed, 7 insertions(+), 2 deletions(-) diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index 4207d2365539..4b05415df61d 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -25049,6 +25049,9 @@ SDValue X86TargetLowering::LowerINTRINSIC_WO_CHAIN(SDValue Op, MVT VT = Op.getSimpleValueType(); const IntrinsicData* IntrData = getIntrinsicWithoutChain(IntNo); + // Propagate flags from original node to transformed node(s). + SelectionDAG::FlagInserter FlagsInserter(DAG, Op->getFlags()); + if (IntrData) { switch(IntrData->Type) { case INTR_TYPE_1OP: { diff --git a/llvm/test/CodeGen/X86/fmf-propagation.ll b/llvm/test/CodeGen/X86/fmf-propagation.ll index 225c1fbbd230..07982ae17cf9 100644 --- a/llvm/test/CodeGen/X86/fmf-propagation.ll +++ b/llvm/test/CodeGen/X86/fmf-propagation.ll @@ -47,13 +47,15 @@ define float @fmf_setcc_canon(float %x, float %y) { declare <16 x float> @llvm.x86.avx512.vfmadd.ps.512(<16 x float>, <16 x float>, <16 x float>, i32) +; Check that FMF are propagated twice: from IR to x86-specific node and from x86-specific node to generic node. + ; CHECK-LABEL: Initial selection DAG: %bb.0 'fmf_target_intrinsic:' ; CHECK: v16f32 = llvm.x86.avx512.vfmadd.ps.512 ninf nsz TargetConstant:i64<{{.*}}> ; CHECK: v16f32 = llvm.x86.avx512.vfmadd.ps.512 nsz TargetConstant:i64<{{.*}}> ; CHECK-LABEL: Legalized selection DAG: %bb.0 'fmf_target_intrinsic:' -; CHECK: v16f32 = fma t{{.*}} -; CHECK: v16f32 = fma t{{.*}} +; CHECK: v16f32 = fma ninf nsz t{{.*}} +; CHECK: v16f32 = fma nsz t{{.*}} define <16 x float> @fmf_target_intrinsic(<16 x float> %a, <16 x float> %b, <16 x float> %c) nounwind { %t0 = tail call ninf nsz <16 x float> @llvm.x86.avx512.vfmadd.ps.512(<16 x float> %a, <16 x float> %b, <16 x float> %c, i32 4)