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Added configure switches for PIC16 backend. 

llvm-svn: 51056
This commit is contained in:
Sanjiv Gupta 2008-05-13 17:37:32 +00:00
parent 52387a1828
commit f6387983e8
1 changed files with 6 additions and 1 deletions
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7
llvm/configure vendored
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@ -2375,6 +2375,7 @@ else
ia64-*) llvm_cv_target_arch="IA64" ;; ia64-*) llvm_cv_target_arch="IA64" ;;
arm-*) llvm_cv_target_arch="ARM" ;; arm-*) llvm_cv_target_arch="ARM" ;;
mips-*) llvm_cv_target_arch="Mips" ;; mips-*) llvm_cv_target_arch="Mips" ;;
pic16-*) llvm_cv_target_arch="PIC16" ;;
*) llvm_cv_target_arch="Unknown" ;; *) llvm_cv_target_arch="Unknown" ;;
esac esac
fi fi
@ -4661,6 +4662,8 @@ else
ARM) TARGET_HAS_JIT=0 ARM) TARGET_HAS_JIT=0
;; ;;
Mips) TARGET_HAS_JIT=0 Mips) TARGET_HAS_JIT=0
;;
PIC16) TARGET_HAS_JIT=0
;; ;;
*) TARGET_HAS_JIT=0 *) TARGET_HAS_JIT=0
;; ;;
@ -4743,7 +4746,7 @@ else
fi fi
case "$enableval" in case "$enableval" in
all) TARGETS_TO_BUILD="X86 Sparc PowerPC Alpha IA64 ARM Mips CellSPU CBackend MSIL CppBackend" ;; all) TARGETS_TO_BUILD="X86 Sparc PowerPC Alpha IA64 ARM Mips CellSPU CBackend MSIL CppBackend PIC16" ;;
host-only) host-only)
case "$llvm_cv_target_arch" in case "$llvm_cv_target_arch" in
x86) TARGETS_TO_BUILD="X86" ;; x86) TARGETS_TO_BUILD="X86" ;;
@ -4754,6 +4757,7 @@ case "$enableval" in
IA64) TARGETS_TO_BUILD="IA64" ;; IA64) TARGETS_TO_BUILD="IA64" ;;
ARM) TARGETS_TO_BUILD="ARM" ;; ARM) TARGETS_TO_BUILD="ARM" ;;
Mips) TARGETS_TO_BUILD="Mips" ;; Mips) TARGETS_TO_BUILD="Mips" ;;
PIC16) TARGETS_TO_BUILD="PIC16" ;;
CellSPU|SPU) TARGETS_TO_BUILD="CellSPU" ;; CellSPU|SPU) TARGETS_TO_BUILD="CellSPU" ;;
*) { { echo "$as_me:$LINENO: error: Can not set target to build" >&5 *) { { echo "$as_me:$LINENO: error: Can not set target to build" >&5
echo "$as_me: error: Can not set target to build" >&2;} echo "$as_me: error: Can not set target to build" >&2;}
@ -4770,6 +4774,7 @@ echo "$as_me: error: Can not set target to build" >&2;}
ia64) TARGETS_TO_BUILD="IA64 $TARGETS_TO_BUILD" ;; ia64) TARGETS_TO_BUILD="IA64 $TARGETS_TO_BUILD" ;;
arm) TARGETS_TO_BUILD="ARM $TARGETS_TO_BUILD" ;; arm) TARGETS_TO_BUILD="ARM $TARGETS_TO_BUILD" ;;
mips) TARGETS_TO_BUILD="Mips $TARGETS_TO_BUILD" ;; mips) TARGETS_TO_BUILD="Mips $TARGETS_TO_BUILD" ;;
pic16) TARGETS_TO_BUILD="PIC16 $TARGETS_TO_BUILD" ;;
spu) TARGETS_TO_BUILD="CellSPU $TARGETS_TO_BUILD" ;; spu) TARGETS_TO_BUILD="CellSPU $TARGETS_TO_BUILD" ;;
cbe) TARGETS_TO_BUILD="CBackend $TARGETS_TO_BUILD" ;; cbe) TARGETS_TO_BUILD="CBackend $TARGETS_TO_BUILD" ;;
msil) TARGETS_TO_BUILD="MSIL $TARGETS_TO_BUILD" ;; msil) TARGETS_TO_BUILD="MSIL $TARGETS_TO_BUILD" ;;