forked from OSchip/llvm-project
We now support all MMX intrinsics. SSE intrinsics are next.
llvm-svn: 45062
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60a288ab19
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@ -293,6 +293,12 @@ Value *CodeGenFunction::EmitX86BuiltinExpr(unsigned BuiltinID,
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(i & 0x30) >> 4, (i & 0xc0) >> 6,
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"pshufd");
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}
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case X86::BI__builtin_ia32_vec_init_v4hi:
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case X86::BI__builtin_ia32_vec_init_v8qi:
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case X86::BI__builtin_ia32_vec_init_v2si:
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return EmitVector(&Ops[0], Ops.size());
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case X86::BI__builtin_ia32_vec_ext_v2si:
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return Builder.CreateExtractElement(Ops[0], Ops[1], "result");
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}
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}
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@ -1099,3 +1099,37 @@ Value *CodeGenFunction::EmitShuffleVector(Value* V1, Value *V2, ...) {
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return Builder.CreateShuffleVector(V1, V2, Mask, Name);
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}
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llvm::Value *CodeGenFunction::EmitVector(llvm::Value * const *Vals,
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unsigned NumVals)
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{
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bool AllConstElements = true;
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for (unsigned i = 0; i < NumVals; i++) {
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if (!isa<llvm::Constant>(Vals[i])) {
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AllConstElements = false;
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break;
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}
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}
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assert(!(NumVals & NumVals - 1) &&
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"Number of elements must be power of two!");
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if (AllConstElements) {
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llvm::SmallVector<llvm::Constant*, 16> Constants;
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for (unsigned i = 0, e = NumVals; i != e; ++i)
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Constants.push_back(cast<llvm::Constant>(Vals[i]));
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return llvm::ConstantVector::get(&Constants[0], Constants.size());
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}
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llvm::Value *Vec
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= llvm::UndefValue::get(llvm::VectorType::get(Vals[0]->getType(), NumVals));
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for (unsigned i = 0, e = NumVals ; i != e; ++i) {
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llvm::Value *Idx = llvm::ConstantInt::get(llvm::Type::Int32Ty, i);
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Vec = Builder.CreateInsertElement(Vec, Vals[i], Idx, "tmp");
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}
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return Vec;
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}
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@ -392,7 +392,8 @@ public:
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llvm::Value *EmitPPCBuiltinExpr(unsigned BuiltinID, const CallExpr *E);
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llvm::Value *EmitShuffleVector(llvm::Value* V1, llvm::Value *V2, ...);
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llvm::Value *EmitVector(llvm::Value * const *Vals, unsigned NumVals);
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llvm::Value *EmitObjCStringLiteral(const ObjCStringLiteral *E);
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//===--------------------------------------------------------------------===//
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