forked from OSchip/llvm-project
[mlir][VectorToSCF] 128 byte alignment of alloc ops
Added 128 byte alignment to alloc ops created in VectorToSCF pass. 128b alignment was already introduced to this pass but not to all alloc ops. This commit changes that by adding 128b alignment to the remaining ops. The point of specifying alignment is to prevent possible memory alignment errors on weakly tested architectures. Differential Revision: https://reviews.llvm.org/D86454
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@ -35,6 +35,8 @@
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#include "mlir/Pass/Pass.h"
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#include "mlir/Transforms/Passes.h"
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#define ALIGNMENT_SIZE 128
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using namespace mlir;
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using namespace mlir::edsc;
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using namespace mlir::edsc::intrinsics;
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@ -232,8 +234,8 @@ static Value setAllocAtFunctionEntry(MemRefType memRefMinorVectorType,
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op->getParentWithTrait<OpTrait::AutomaticAllocationScope>();
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assert(scope && "Expected op to be inside automatic allocation scope");
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b.setInsertionPointToStart(&scope->getRegion(0).front());
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Value res =
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std_alloca(memRefMinorVectorType, ValueRange{}, b.getI64IntegerAttr(128));
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Value res = std_alloca(memRefMinorVectorType, ValueRange{},
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b.getI64IntegerAttr(ALIGNMENT_SIZE));
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return res;
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}
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@ -575,7 +577,8 @@ LogicalResult VectorTransferRewriter<TransferReadOp>::matchAndRewrite(
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steps.push_back(std_constant_index(step));
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// 2. Emit alloc-copy-load-dealloc.
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Value tmp = std_alloc(tmpMemRefType(transfer));
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Value tmp = std_alloc(tmpMemRefType(transfer), ValueRange{},
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rewriter.getI64IntegerAttr(ALIGNMENT_SIZE));
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StdIndexedValue local(tmp);
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Value vec = vector_type_cast(tmp);
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loopNestBuilder(lbs, ubs, steps, [&](ValueRange loopIvs) {
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@ -648,7 +651,8 @@ LogicalResult VectorTransferRewriter<TransferWriteOp>::matchAndRewrite(
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steps.push_back(std_constant_index(step));
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// 2. Emit alloc-store-copy-dealloc.
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Value tmp = std_alloc(tmpMemRefType(transfer));
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Value tmp = std_alloc(tmpMemRefType(transfer), ValueRange{},
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rewriter.getI64IntegerAttr(ALIGNMENT_SIZE));
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StdIndexedValue local(tmp);
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Value vec = vector_type_cast(tmp);
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std_store(vectorValue, vec);
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@ -68,7 +68,7 @@ func @materialize_read(%M: index, %N: index, %O: index, %P: index) {
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// CHECK-NEXT: affine.for %[[I1:.*]] = 0 to %{{.*}} {
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// CHECK-NEXT: affine.for %[[I2:.*]] = 0 to %{{.*}} {
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// CHECK-NEXT: affine.for %[[I3:.*]] = 0 to %{{.*}} step 5 {
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// CHECK: %[[ALLOC:.*]] = alloc() : memref<5x4x3xf32>
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// CHECK: %[[ALLOC:.*]] = alloc() {alignment = 128 : i64} : memref<5x4x3xf32>
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// CHECK-NEXT: scf.for %[[I4:.*]] = %[[C0]] to %[[C3]] step %[[C1]] {
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// CHECK-NEXT: scf.for %[[I5:.*]] = %[[C0]] to %[[C4]] step %[[C1]] {
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// CHECK-NEXT: scf.for %[[I6:.*]] = %[[C0]] to %[[C5]] step %[[C1]] {
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@ -145,7 +145,7 @@ func @materialize_write(%M: index, %N: index, %O: index, %P: index) {
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// CHECK-NEXT: affine.for %[[I1:.*]] = 0 to %{{.*}} step 4 {
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// CHECK-NEXT: affine.for %[[I2:.*]] = 0 to %{{.*}} {
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// CHECK-NEXT: affine.for %[[I3:.*]] = 0 to %{{.*}} step 5 {
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// CHECK: %[[ALLOC:.*]] = alloc() : memref<5x4x3xf32>
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// CHECK: %[[ALLOC:.*]] = alloc() {alignment = 128 : i64} : memref<5x4x3xf32>
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// CHECK-NEXT: %[[VECTOR_VIEW:.*]] = vector.type_cast {{.*}} : memref<5x4x3xf32>
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// CHECK: store %{{.*}}, {{.*}} : memref<vector<5x4x3xf32>>
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// CHECK-NEXT: scf.for %[[I4:.*]] = %[[C0]] to %[[C3]] step %[[C1]] {
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