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RegisterCoalescer: Turn some impossible conditions into asserts 

This is a fixed version of reverted r225500. It fixes the too early
if() continue; of the last patch and adds a comment to the unorthodox
loop.

llvm-svn: 225652
This commit is contained in:
Matthias Braun 2015-01-12 19:10:17 +00:00
parent acbb6e64e8
commit f5d931f716
1 changed files with 11 additions and 17 deletions
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28
llvm/lib/CodeGen/RegisterCoalescer.cpp
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@ -621,13 +621,12 @@ bool RegisterCoalescer::removeCopyByCommutingDef(const CoalescerPair &CP,
// the example above.
SlotIndex CopyIdx = LIS->getInstructionIndex(CopyMI).getRegSlot();
VNInfo *BValNo = IntB.getVNInfoAt(CopyIdx);
if (!BValNo || BValNo->def != CopyIdx)
return false;
assert(BValNo != nullptr && BValNo->def == CopyIdx);
// AValNo is the value number in A that defines the copy, A3 in the example.
VNInfo *AValNo = IntA.getVNInfoAt(CopyIdx.getRegSlot(true));
assert(AValNo && "COPY source not live");
if (AValNo->isPHIDef() || AValNo->isUnused())
assert(AValNo && !AValNo->isUnused() && "COPY source not live");
if (AValNo->isPHIDef())
return false;
MachineInstr *DefMI = LIS->getInstructionFromIndex(AValNo->def);
if (!DefMI)
@ -707,10 +706,12 @@ bool RegisterCoalescer::removeCopyByCommutingDef(const CoalescerPair &CP,
// Update uses of IntA of the specific Val# with IntB.
for (MachineRegisterInfo::use_iterator UI = MRI->use_begin(IntA.reg),
UE = MRI->use_end();
UI != UE;) {
UI != UE; /* ++UI is below because of possible MI removal */) {
MachineOperand &UseMO = *UI;
MachineInstr *UseMI = UseMO.getParent();
++UI;
if (UseMO.isUndef())
continue;
MachineInstr *UseMI = UseMO.getParent();
if (UseMI->isDebugValue()) {
// FIXME These don't have an instruction index. Not clear we have enough
// info to decide whether to do this replacement or not. For now do it.
@ -719,7 +720,8 @@ bool RegisterCoalescer::removeCopyByCommutingDef(const CoalescerPair &CP,
}
SlotIndex UseIdx = LIS->getInstructionIndex(UseMI).getRegSlot(true);
LiveInterval::iterator US = IntA.FindSegmentContaining(UseIdx);
if (US == IntA.end() || US->valno != AValNo)
assert(US != IntA.end() && "Use must be live");
if (US->valno != AValNo)
continue;
// Kill flags are no longer accurate. They are recomputed after RA.
UseMO.setIsKill(false);
@ -770,11 +772,7 @@ bool RegisterCoalescer::removeCopyByCommutingDef(const CoalescerPair &CP,
SlotIndex AIdx = CopyIdx.getRegSlot(true);
for (LiveInterval::SubRange &SA : IntA.subranges()) {
VNInfo *ASubValNo = SA.getVNInfoAt(AIdx);
if (ASubValNo == nullptr) {
DEBUG(dbgs() << "No A Range at " << AIdx << " with mask "
<< format("%04X", SA.LaneMask) << "\n");
continue;
}
assert(ASubValNo != nullptr);
unsigned AMask = SA.LaneMask;
for (LiveInterval::SubRange &SB : IntB.subranges()) {
@ -826,11 +824,7 @@ bool RegisterCoalescer::removeCopyByCommutingDef(const CoalescerPair &CP,
SlotIndex AIdx = CopyIdx.getRegSlot(true);
for (LiveInterval::SubRange &SA : IntA.subranges()) {
VNInfo *ASubValNo = SA.getVNInfoAt(AIdx);
if (ASubValNo == nullptr) {
DEBUG(dbgs() << "No A Range at " << AIdx << " with mask "
<< format("%04X", SA.LaneMask) << "\n");
continue;
}
assert(ASubValNo != nullptr);
SA.removeValNo(ASubValNo);
}
}