forked from OSchip/llvm-project
[SCEV] Be more aggressive in proving NUW
... for AddRec's in loops for which SCEV is unable to compute a max tripcount. This is the NUW variant of r269211 and fixes PR27691. (Note: PR27691 is not a correct or stability bug, it was created to track a pending task). llvm-svn: 269790
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@ -1521,11 +1521,22 @@ const SCEV *ScalarEvolution::getZeroExtendExpr(const SCEV *Op,
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getSignExtendExpr(Step, Ty), L, AR->getNoWrapFlags());
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}
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}
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}
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// If the backedge is guarded by a comparison with the pre-inc value
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// the addrec is safe. Also, if the entry is guarded by a comparison
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// with the start value and the backedge is guarded by a comparison
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// with the post-inc value, the addrec is safe.
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// Normally, in the cases we can prove no-overflow via a
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// backedge guarding condition, we can also compute a backedge
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// taken count for the loop. The exceptions are assumptions and
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// guards present in the loop -- SCEV is not great at exploiting
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// these to compute max backedge taken counts, but can still use
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// these to prove lack of overflow. Use this fact to avoid
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// doing extra work that may not pay off.
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if (!isa<SCEVCouldNotCompute>(MaxBECount) || HasGuards ||
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!AC.assumptions().empty()) {
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// If the backedge is guarded by a comparison with the pre-inc
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// value the addrec is safe. Also, if the entry is guarded by
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// a comparison with the start value and the backedge is
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// guarded by a comparison with the post-inc value, the addrec
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// is safe.
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if (isKnownPositive(Step)) {
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const SCEV *N = getConstant(APInt::getMinValue(BitWidth) -
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getUnsignedRange(Step).getUnsignedMax());
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@ -1533,7 +1544,8 @@ const SCEV *ScalarEvolution::getZeroExtendExpr(const SCEV *Op,
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(isLoopEntryGuardedByCond(L, ICmpInst::ICMP_ULT, Start, N) &&
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isLoopBackedgeGuardedByCond(L, ICmpInst::ICMP_ULT,
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AR->getPostIncExpr(*this), N))) {
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// Cache knowledge of AR NUW, which is propagated to this AddRec.
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// Cache knowledge of AR NUW, which is propagated to this
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// AddRec.
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const_cast<SCEVAddRecExpr *>(AR)->setNoWrapFlags(SCEV::FlagNUW);
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// Return the expression with the addrec on the outside.
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return getAddRecExpr(
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@ -1547,8 +1559,9 @@ const SCEV *ScalarEvolution::getZeroExtendExpr(const SCEV *Op,
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(isLoopEntryGuardedByCond(L, ICmpInst::ICMP_UGT, Start, N) &&
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isLoopBackedgeGuardedByCond(L, ICmpInst::ICMP_UGT,
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AR->getPostIncExpr(*this), N))) {
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// Cache knowledge of AR NW, which is propagated to this AddRec.
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// Negative step causes unsigned wrap, but it still can't self-wrap.
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// Cache knowledge of AR NW, which is propagated to this
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// AddRec. Negative step causes unsigned wrap, but it
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// still can't self-wrap.
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const_cast<SCEVAddRecExpr *>(AR)->setNoWrapFlags(SCEV::FlagNW);
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// Return the expression with the addrec on the outside.
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return getAddRecExpr(
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@ -62,3 +62,63 @@ loop:
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leave:
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ret void
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}
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define void @u_0(i32 %n, i1* %cond) {
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; CHECK-LABEL: Classifying expressions for: @u_0
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entry:
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br label %loop
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loop:
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%iv = phi i32 [ 0, %entry ], [ %iv.inc, %loop ]
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%iv.inc = add i32 %iv, 1
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%iv.zext = zext i32 %iv to i64
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; CHECK: %iv.zext = zext i32 %iv to i64
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; CHECK-NEXT: --> {0,+,1}<nuw><%loop>
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%cmp = icmp ult i32 %iv, %n
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call void(i1, ...) @llvm.experimental.guard(i1 %cmp) [ "deopt"() ]
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%c = load volatile i1, i1* %cond
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br i1 %c, label %loop, label %leave
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leave:
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ret void
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}
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define void @u_1(i1* %cond) {
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; CHECK-LABEL: Classifying expressions for: @u_1
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entry:
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br label %loop
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loop:
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%iv = phi i32 [ 0, %entry ], [ %iv.inc, %loop ]
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%iv.inc = add i32 %iv, 3
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%iv.zext = zext i32 %iv to i64
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; CHECK: %iv.zext = zext i32 %iv to i64
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; CHECK-NEXT: --> {0,+,3}<nuw><%loop>
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%cmp = icmp ult i32 %iv, 10000
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call void(i1, ...) @llvm.experimental.guard(i1 %cmp) [ "deopt"() ]
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%c = load volatile i1, i1* %cond
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br i1 %c, label %loop, label %leave
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leave:
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ret void
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}
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define void @u_2(i1* %cond) {
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; CHECK-LABEL: Classifying expressions for: @u_2
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entry:
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br label %loop
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loop:
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%iv = phi i32 [ 30000, %entry ], [ %iv.inc, %loop ]
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%iv.inc = add i32 %iv, -2
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%iv.zext = zext i32 %iv to i64
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%cmp = icmp ugt i32 %iv.inc, -10000
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; CHECK: %iv.zext = zext i32 %iv to i64
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; CHECK-NEXT: --> {30000,+,-2}<nw><%loop>
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call void @llvm.assume(i1 %cmp)
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%c = load volatile i1, i1* %cond
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br i1 %c, label %loop, label %leave
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leave:
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ret void
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}
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