forked from OSchip/llvm-project
[LoopInterchange] Fix transformation bugs in loop interchange
After loop interchange, the (old) outer loop header should not jump to `LoopExit`. Note that the old outer loop becomes the new inner loop after interchange. If we branched to `LoopExit` then after interchange we would jump directly from the (new) inner loop header to `LoopExit` without executing the rest of (new) outer loop. This patch modifies adjustLoopBranches() such that the old outer loop header (which becomes the new inner loop header) jumps to the old inner loop latch which becomes the new outer loop latch after interchange. Reviewed By: bmahjour Differential Revision: https://reviews.llvm.org/D98475
This commit is contained in:
CongzheUalberta
parent
5f6b3d1833
commit
f5645ea65f
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@ -1551,9 +1551,12 @@ bool LoopInterchangeTransform::adjustLoopBranches() {
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InnerLoopPreHeader, DTUpdates, /*MustUpdateOnce=*/false);
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// The outer loop header might or might not branch to the outer latch.
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// We are guaranteed to branch to the inner loop preheader.
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if (llvm::is_contained(OuterLoopHeaderBI->successors(), OuterLoopLatch))
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updateSuccessor(OuterLoopHeaderBI, OuterLoopLatch, LoopExit, DTUpdates,
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if (llvm::is_contained(OuterLoopHeaderBI->successors(), OuterLoopLatch)) {
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// In this case the outerLoopHeader should branch to the InnerLoopLatch.
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updateSuccessor(OuterLoopHeaderBI, OuterLoopLatch, InnerLoopLatch,
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DTUpdates,
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/*MustUpdateOnce=*/false);
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}
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updateSuccessor(OuterLoopHeaderBI, InnerLoopPreHeader,
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InnerLoopHeaderSuccessor, DTUpdates,
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/*MustUpdateOnce=*/false);
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@ -25,12 +25,12 @@ define void @lcssa_08(i32 %n, i32 %m) {
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; CHECK-NEXT: [[INDVARS_IV27:%.*]] = phi i64 [ 0, [[OUTER_PREHEADER:%.*]] ], [ [[INDVARS_IV_NEXT28:%.*]], [[OUTER_LATCH:%.*]] ]
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; CHECK-NEXT: [[CMP222:%.*]] = icmp sgt i32 [[M:%.*]], 0
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; CHECK-NEXT: [[WIDE_TRIP_COUNT:%.*]] = zext i32 [[M]] to i64
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; CHECK-NEXT: br i1 [[CMP222]], label [[INNER_FOR_BODY_SPLIT1:%.*]], label [[OUTER_CRIT_EDGE:%.*]]
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; CHECK-NEXT: br i1 [[CMP222]], label [[INNER_FOR_BODY_SPLIT1:%.*]], label [[INNER_FOR_BODY_SPLIT:%.*]]
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; CHECK: inner.preheader:
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; CHECK-NEXT: [[WIDE_TRIP_COUNT29:%.*]] = zext i32 [[N]] to i64
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; CHECK-NEXT: br label [[INNER_FOR_BODY:%.*]]
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; CHECK: inner.for.body:
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; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[INNER_PREHEADER]] ], [ [[TMP1:%.*]], [[INNER_FOR_BODY_SPLIT:%.*]] ]
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; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[INNER_PREHEADER]] ], [ [[TMP1:%.*]], [[INNER_FOR_BODY_SPLIT]] ]
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; CHECK-NEXT: br label [[OUTER_PREHEADER]]
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; CHECK: inner.for.body.split1:
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; CHECK-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds [16 x [16 x i32]], [16 x [16 x i32]]* [[TEMP]], i64 0, i64 [[INDVARS_IV]], i64 [[INDVARS_IV27]]
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@ -41,10 +41,10 @@ define void @lcssa_08(i32 %n, i32 %m) {
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; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV_NEXT]], [[WIDE_TRIP_COUNT]]
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; CHECK-NEXT: br label [[INNER_CRIT_EDGE:%.*]]
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; CHECK: inner.for.body.split:
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; CHECK-NEXT: [[WIDE_TRIP_COUNT_LCSSA2:%.*]] = phi i64 [ [[WIDE_TRIP_COUNT]], [[OUTER_LATCH]] ]
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; CHECK-NEXT: [[WIDE_TRIP_COUNT_LCSSA:%.*]] = phi i64 [ [[WIDE_TRIP_COUNT]], [[OUTER_LATCH]] ], [ [[WIDE_TRIP_COUNT]], [[OUTER_HEADER]] ]
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; CHECK-NEXT: [[TMP1]] = add nuw nsw i64 [[INDVARS_IV]], 1
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; CHECK-NEXT: [[TMP2:%.*]] = icmp ne i64 [[TMP1]], [[WIDE_TRIP_COUNT_LCSSA2]]
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; CHECK-NEXT: br i1 [[TMP2]], label [[INNER_FOR_BODY]], label [[OUTER_CRIT_EDGE]]
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; CHECK-NEXT: [[TMP2:%.*]] = icmp ne i64 [[TMP1]], [[WIDE_TRIP_COUNT_LCSSA]]
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; CHECK-NEXT: br i1 [[TMP2]], label [[INNER_FOR_BODY]], label [[OUTER_CRIT_EDGE:%.*]]
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; CHECK: inner.crit_edge:
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; CHECK-NEXT: br label [[OUTER_LATCH]]
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; CHECK: outer.latch:
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@ -0,0 +1,202 @@
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; RUN: opt -basic-aa -loop-interchange -verify-dom-info -verify-loop-info -verify-loop-lcssa -S %s | FileCheck %s
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@b = global [3 x [5 x [8 x i16]]] [[5 x [8 x i16]] zeroinitializer, [5 x [8 x i16]] [[8 x i16] zeroinitializer, [8 x i16] [i16 0, i16 0, i16 0, i16 6, i16 1, i16 6, i16 0, i16 0], [8 x i16] zeroinitializer, [8 x i16] zeroinitializer, [8 x i16] zeroinitializer], [5 x [8 x i16]] zeroinitializer], align 2
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@a = common global i32 0, align 4
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@d = common dso_local local_unnamed_addr global [1 x [6 x i32]] zeroinitializer, align 4
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; Doubly nested loop
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;; C test case:
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;; int a;
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;; short b[3][5][8] = {{}, {{}, 0, 0, 0, 6, 1, 6}};
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;; void test1() {
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;; int c = 0, d;
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;; for (; c <= 2; c++) {
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;; if (c)
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;; continue;
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;; d = 0;
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;; for (; d <= 2; d++)
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;; a |= b[d][d][c + 5];
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;; }
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;; }
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define void @test1() {
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;CHECK-LABEL: @test1(
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;CHECK: entry:
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;CHECK-NEXT: br label [[FOR_COND1_PREHEADER:%.*]]
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;CHECK: for.body.preheader:
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;CHECK-NEXT: br label [[FOR_BODY:%.*]]
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;CHECK: for.body:
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;CHECK-NEXT: [[INDVARS_IV22:%.*]] = phi i64 [ [[INDVARS_IV_NEXT23:%.*]], [[FOR_INC8:%.*]] ], [ 0, [[FOR_BODY_PREHEADER:%.*]] ]
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;CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i64 [[INDVARS_IV22:%.*]], 0
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;CHECK-NEXT: br i1 [[TOBOOL]], label [[FOR_BODY3_SPLIT1:%.*]], label [[FOR_BODY3_SPLIT:%.*]]
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;CHECK: for.cond1.preheader:
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;CHECK-NEXT: br label [[FOR_BODY3:%.*]]
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;CHECK: for.body3:
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;CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[FOR_COND1_PREHEADER]] ], [ %3, [[FOR_BODY3_SPLIT]] ]
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;CHECK-NEXT: br label [[FOR_BODY_PREHEADER]]
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;CHECK: for.body3.split1:
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;CHECK-NEXT: [[TMP0:%.*]] = add nuw nsw i64 [[INDVARS_IV22]], 5
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;CHECK-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds [3 x [5 x [8 x i16]]], [3 x [5 x [8 x i16]]]* @b, i64 0, i64 [[INDVARS_IV]], i64 [[INDVARS_IV]], i64 [[TMP0]]
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;CHECK-NEXT: [[TMP1:%.*]] = load i16, i16* [[ARRAYIDX7]]
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;CHECK-NEXT: [[CONV:%.*]] = sext i16 [[TMP1]] to i32
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;CHECK-NEXT: [[TMP2:%.*]] = load i32, i32* @a
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;CHECK-NEXT: [[TMP_OR:%.*]] = or i32 [[TMP2]], [[CONV]]
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;CHECK-NEXT: store i32 [[TMP_OR]], i32* @a
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;CHECK-NEXT: [[INDVARS_IV_NEXT:%.*]] = add nuw nsw i64 [[INDVARS_IV]], 1
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;CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV_NEXT]], 3
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;CHECK-NEXT: br label [[FOR_INC8_LOOPEXIT:%.*]]
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;CHECK: for.body3.split:
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;CHECK-NEXT: [[TMP3:%.*]] = add nuw nsw i64 [[INDVARS_IV]], 1
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;CHECK-NEXT: [[TMP4:%.*]] = icmp ne i64 [[TMP3]], 3
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;CHECK-NEXT: br i1 %4, label [[FOR_BODY3]], label [[FOR_END10:%.*]]
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;CHECK: for.inc8.loopexit:
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;CHECK-NEXT: br label [[FOR_INC8]]
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;CHECK: for.inc8:
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;CHECK-NEXT: [[INDVARS_IV_NEXT23]] = add nuw nsw i64 [[INDVARS_IV22]], 1
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;CHECK-NEXT: [[EXITCOND25:%.*]] = icmp ne i64 [[INDVARS_IV_NEXT23]], 3
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;CHECK-NEXT: br i1 [[EXITCOND25]], label [[FOR_BODY]], label [[FOR_BODY3_SPLIT]]
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;CHECK: for.end10:
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;CHECK-NEXT: [[TMP5:%.*]] = load i32, i32* @a
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;CHECK-NEXT: ret void
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entry:
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br label %for.body
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for.body: ; preds = %entry, %for.inc8
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%indvars.iv22 = phi i64 [ 0, %entry ], [ %indvars.iv.next23, %for.inc8 ]
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%tobool = icmp eq i64 %indvars.iv22, 0
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br i1 %tobool, label %for.cond1.preheader, label %for.inc8
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for.cond1.preheader: ; preds = %for.body
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br label %for.body3
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for.body3: ; preds = %for.cond1.preheader, %for.body3
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%indvars.iv = phi i64 [ 0, %for.cond1.preheader ], [ %indvars.iv.next, %for.body3 ]
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%0 = add nuw nsw i64 %indvars.iv22, 5
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%arrayidx7 = getelementptr inbounds [3 x [5 x [8 x i16]]], [3 x [5 x [8 x i16]]]* @b, i64 0, i64 %indvars.iv, i64 %indvars.iv, i64 %0
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%1 = load i16, i16* %arrayidx7
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%conv = sext i16 %1 to i32
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%2 = load i32, i32* @a
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%or = or i32 %2, %conv
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store i32 %or, i32* @a
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%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
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%exitcond = icmp ne i64 %indvars.iv.next, 3
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br i1 %exitcond, label %for.body3, label %for.inc8.loopexit
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for.inc8.loopexit: ; preds = %for.body3
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br label %for.inc8
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for.inc8: ; preds = %for.inc8.loopexit, %for.body
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%indvars.iv.next23 = add nuw nsw i64 %indvars.iv22, 1
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%exitcond25 = icmp ne i64 %indvars.iv.next23, 3
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br i1 %exitcond25, label %for.body, label %for.end10
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for.end10: ; preds = %for.inc8
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%3 = load i32, i32* @a
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ret void
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}
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; Triply nested loop
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; The innermost and the middle loop are interchanged.
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; C test case:
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;; a;
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;; d[][6];
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;; void test2() {
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;; int g = 10;
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;; for (; g; g = g - 5) {
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;; short c = 4;
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;; for (; c; c--) {
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;; int i = 4;
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;; for (; i; i--) {
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;; if (a)
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;; break;
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;; d[i][c] = 0;
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;; }
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;; }
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;; }
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;; }
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define void @test2() {
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; CHECK-LABEL: @test2(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br label [[OUTERMOST_HEADER:%.*]]
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; CHECK: outermost.header:
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; CHECK-NEXT: [[INDVAR_OUTERMOST:%.*]] = phi i32 [ 10, [[ENTRY:%.*]] ], [ [[INDVAR_OUTERMOST_NEXT:%.*]], [[OUTERMOST_LATCH:%.*]] ]
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; CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @a, align 4
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; CHECK-NEXT: [[TOBOOL71_I:%.*]] = icmp eq i32 [[TMP0]], 0
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; CHECK-NEXT: br label [[INNERMOST_PREHEADER:%.*]]
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; CHECK: middle.header.preheader:
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; CHECK-NEXT: br label [[MIDDLE_HEADER:%.*]]
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; CHECK: middle.header:
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; CHECK-NEXT: [[INDVAR_MIDDLE:%.*]] = phi i64 [ [[INDVAR_MIDDLE_NEXT:%.*]], [[MIDDLE_LATCH:%.*]] ], [ 4, [[MIDDLE_HEADER_PREHEADER:%.*]] ]
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; CHECK-NEXT: br i1 [[TOBOOL71_I]], label [[INNERMOST_BODY_SPLIT1:%.*]], label [[INNERMOST_BODY_SPLIT:%.*]]
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; CHECK: innermost.preheader:
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; CHECK-NEXT: br label [[INNERMOST_BODY:%.*]]
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; CHECK: innermost.body:
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; CHECK-NEXT: [[INDVAR_INNERMOST:%.*]] = phi i64 [ [[TMP1:%.*]], [[INNERMOST_BODY_SPLIT]] ], [ 4, [[INNERMOST_PREHEADER]] ]
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; CHECK-NEXT: br label [[MIDDLE_HEADER_PREHEADER]]
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; CHECK: innermost.body.split1:
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; CHECK-NEXT: [[ARRAYIDX9_I:%.*]] = getelementptr inbounds [1 x [6 x i32]], [1 x [6 x i32]]* @d, i64 0, i64 [[INDVAR_INNERMOST]], i64 [[INDVAR_MIDDLE]]
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; CHECK-NEXT: store i32 0, i32* [[ARRAYIDX9_I]], align 4
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; CHECK-NEXT: [[INDVAR_INNERMOST_NEXT:%.*]] = add nsw i64 [[INDVAR_INNERMOST]], -1
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; CHECK-NEXT: [[TOBOOL5_I:%.*]] = icmp eq i64 [[INDVAR_INNERMOST_NEXT]], 0
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; CHECK-NEXT: br label [[MIDDLE_LATCH_LOOPEXIT:%.*]]
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; CHECK: innermost.body.split:
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; CHECK-NEXT: [[TMP1]] = add nsw i64 [[INDVAR_INNERMOST]], -1
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; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i64 [[TMP1]], 0
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; CHECK-NEXT: br i1 [[TMP2]], label [[OUTERMOST_LATCH]], label [[INNERMOST_BODY]]
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; CHECK: innermost.loopexit:
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; CHECK-NEXT: br label [[MIDDLE_LATCH]]
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; CHECK: middle.latch:
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; CHECK-NEXT: [[INDVAR_MIDDLE_NEXT]] = add nsw i64 [[INDVAR_MIDDLE]], -1
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; CHECK-NEXT: [[TOBOOL2_I:%.*]] = icmp eq i64 [[INDVAR_MIDDLE_NEXT]], 0
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; CHECK-NEXT: br i1 [[TOBOOL2_I]], label [[INNERMOST_BODY_SPLIT]], label [[MIDDLE_HEADER]]
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; CHECK: outermost.latch:
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; CHECK-NEXT: [[INDVAR_OUTERMOST_NEXT]] = add nsw i32 [[INDVAR_OUTERMOST]], -5
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; CHECK-NEXT: [[TOBOOL_I:%.*]] = icmp eq i32 [[INDVAR_OUTERMOST_NEXT]], 0
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; CHECK-NEXT: br i1 [[TOBOOL_I]], label [[OUTERMOST_EXIT:%.*]], label [[OUTERMOST_HEADER]]
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; CHECK: outermost.exit:
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; CHECK-NEXT: ret void
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;
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entry:
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br label %outermost.header
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outermost.header: ; preds = %outermost.latch, %entry
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%indvar.outermost = phi i32 [ 10, %entry ], [ %indvar.outermost.next, %outermost.latch ]
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%0 = load i32, i32* @a, align 4
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%tobool71.i = icmp eq i32 %0, 0
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br label %middle.header
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middle.header: ; preds = %middle.latch, %outermost.header
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%indvar.middle = phi i64 [ 4, %outermost.header ], [ %indvar.middle.next, %middle.latch ]
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br i1 %tobool71.i, label %innermost.preheader, label %middle.latch
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innermost.preheader: ; preds = %middle.header
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br label %innermost.body
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innermost.body: ; preds = %innermost.preheader, %innermost.body
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%indvar.innermost = phi i64 [ %indvar.innermost.next, %innermost.body ], [ 4, %innermost.preheader ]
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%arrayidx9.i = getelementptr inbounds [1 x [6 x i32]], [1 x [6 x i32]]* @d, i64 0, i64 %indvar.innermost, i64 %indvar.middle
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store i32 0, i32* %arrayidx9.i, align 4
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%indvar.innermost.next = add nsw i64 %indvar.innermost, -1
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%tobool5.i = icmp eq i64 %indvar.innermost.next, 0
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br i1 %tobool5.i, label %innermost.loopexit, label %innermost.body
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innermost.loopexit: ; preds = %innermost.body
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br label %middle.latch
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middle.latch: ; preds = %middle.latch.loopexit, %middle.header
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%indvar.middle.next = add nsw i64 %indvar.middle, -1
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%tobool2.i = icmp eq i64 %indvar.middle.next, 0
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br i1 %tobool2.i, label %outermost.latch, label %middle.header
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outermost.latch: ; preds = %middle.latch
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%indvar.outermost.next = add nsw i32 %indvar.outermost, -5
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%tobool.i = icmp eq i32 %indvar.outermost.next, 0
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br i1 %tobool.i, label %outermost.exit, label %outermost.header
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outermost.exit: ; preds = %outermost.latch
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ret void
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}
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