Use both the cached TLI and the subtarget off of the DAG in

the DAG combiner.

llvm-svn: 219367
This commit is contained in:
Eric Christopher 2014-10-08 23:38:39 +00:00
parent 4e3d6ded99
commit f55d4714d2
1 changed files with 10 additions and 15 deletions

View File

@ -6678,10 +6678,7 @@ SDValue DAGCombiner::visitFADD(SDNode *N) {
// FADD -> FMA combines: // FADD -> FMA combines:
if ((Options.AllowFPOpFusion == FPOpFusion::Fast || Options.UnsafeFPMath) && if ((Options.AllowFPOpFusion == FPOpFusion::Fast || Options.UnsafeFPMath) &&
DAG.getTarget() TLI.isFMAFasterThanFMulAndFAdd(VT) &&
.getSubtargetImpl()
->getTargetLowering()
->isFMAFasterThanFMulAndFAdd(VT) &&
(!LegalOperations || TLI.isOperationLegalOrCustom(ISD::FMA, VT))) { (!LegalOperations || TLI.isOperationLegalOrCustom(ISD::FMA, VT))) {
// fold (fadd (fmul x, y), z) -> (fma x, y, z) // fold (fadd (fmul x, y), z) -> (fma x, y, z)
@ -6759,9 +6756,7 @@ SDValue DAGCombiner::visitFSUB(SDNode *N) {
// FSUB -> FMA combines: // FSUB -> FMA combines:
if ((Options.AllowFPOpFusion == FPOpFusion::Fast || Options.UnsafeFPMath) && if ((Options.AllowFPOpFusion == FPOpFusion::Fast || Options.UnsafeFPMath) &&
DAG.getTarget().getSubtargetImpl() TLI.isFMAFasterThanFMulAndFAdd(VT) &&
->getTargetLowering()
->isFMAFasterThanFMulAndFAdd(VT) &&
(!LegalOperations || TLI.isOperationLegalOrCustom(ISD::FMA, VT))) { (!LegalOperations || TLI.isOperationLegalOrCustom(ISD::FMA, VT))) {
// fold (fsub (fmul x, y), z) -> (fma x, y, (fneg z)) // fold (fsub (fmul x, y), z) -> (fma x, y, (fneg z))
@ -8209,8 +8204,8 @@ SDValue DAGCombiner::visitLOAD(SDNode *N) {
} }
} }
bool UseAA = CombinerAA.getNumOccurrences() > 0 ? CombinerAA : bool UseAA = CombinerAA.getNumOccurrences() > 0 ? CombinerAA
TLI.getTargetMachine().getSubtarget<TargetSubtargetInfo>().useAA(); : DAG.getSubtarget().useAA();
#ifndef NDEBUG #ifndef NDEBUG
if (CombinerAAOnlyFunc.getNumOccurrences() && if (CombinerAAOnlyFunc.getNumOccurrences() &&
CombinerAAOnlyFunc != DAG.getMachineFunction().getName()) CombinerAAOnlyFunc != DAG.getMachineFunction().getName())
@ -8540,8 +8535,7 @@ struct LoadedSlice {
// At this point, we know that we perform a cross-register-bank copy. // At this point, we know that we perform a cross-register-bank copy.
// Check if it is expensive. // Check if it is expensive.
const TargetRegisterInfo *TRI = const TargetRegisterInfo *TRI = DAG->getSubtarget().getRegisterInfo();
TLI.getTargetMachine().getSubtargetImpl()->getRegisterInfo();
// Assume bitcasts are cheap, unless both register classes do not // Assume bitcasts are cheap, unless both register classes do not
// explicitly share a common sub class. // explicitly share a common sub class.
if (!TRI || TRI->getCommonSubClass(ArgRC, ResRC)) if (!TRI || TRI->getCommonSubClass(ArgRC, ResRC))
@ -9799,8 +9793,8 @@ SDValue DAGCombiner::visitSTORE(SDNode *N) {
if (NewST.getNode()) if (NewST.getNode())
return NewST; return NewST;
bool UseAA = CombinerAA.getNumOccurrences() > 0 ? CombinerAA : bool UseAA = CombinerAA.getNumOccurrences() > 0 ? CombinerAA
TLI.getTargetMachine().getSubtarget<TargetSubtargetInfo>().useAA(); : DAG.getSubtarget().useAA();
#ifndef NDEBUG #ifndef NDEBUG
if (CombinerAAOnlyFunc.getNumOccurrences() && if (CombinerAAOnlyFunc.getNumOccurrences() &&
CombinerAAOnlyFunc != DAG.getMachineFunction().getName()) CombinerAAOnlyFunc != DAG.getMachineFunction().getName())
@ -12071,8 +12065,9 @@ bool DAGCombiner::isAlias(LSBaseSDNode *Op0, LSBaseSDNode *Op1) const {
return false; return false;
} }
bool UseAA = CombinerGlobalAA.getNumOccurrences() > 0 ? CombinerGlobalAA : bool UseAA = CombinerGlobalAA.getNumOccurrences() > 0
TLI.getTargetMachine().getSubtarget<TargetSubtargetInfo>().useAA(); ? CombinerGlobalAA
: DAG.getSubtarget().useAA();
#ifndef NDEBUG #ifndef NDEBUG
if (CombinerAAOnlyFunc.getNumOccurrences() && if (CombinerAAOnlyFunc.getNumOccurrences() &&
CombinerAAOnlyFunc != DAG.getMachineFunction().getName()) CombinerAAOnlyFunc != DAG.getMachineFunction().getName())