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McARM: Unify ParseMemory() successfull return. 

llvm-svn: 123740
This commit is contained in:
Daniel Dunbar 2011-01-18 05:34:24 +00:00
parent 1d5e954965
commit f5164f40c5
1 changed files with 23 additions and 41 deletions
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40
llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
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@ -720,17 +720,19 @@ ParseMemory(SmallVectorImpl<MCParsedAsmOperand*> &Operands) {
bool OffsetIsReg = false; bool OffsetIsReg = false;
bool Negative = false; bool Negative = false;
bool Writeback = false; bool Writeback = false;
ARMOperand *WBOp = 0;
int OffsetRegNum = -1;
bool OffsetRegShifted = false;
enum ShiftType ShiftType = Lsl;
const MCExpr *ShiftAmount = 0;
const MCExpr *Offset = 0;
// First look for preindexed address forms, that is after the "[Rn" we now // First look for preindexed address forms, that is after the "[Rn" we now
// have to see if the next token is a comma. // have to see if the next token is a comma.
if (Tok.is(AsmToken::Comma)) { if (Tok.is(AsmToken::Comma)) {
Preindexed = true; Preindexed = true;
Parser.Lex(); // Eat comma token. Parser.Lex(); // Eat comma token.
int OffsetRegNum;
bool OffsetRegShifted;
enum ShiftType ShiftType;
const MCExpr *ShiftAmount = 0;
const MCExpr *Offset = 0;
if (ParseMemoryOffsetReg(Negative, OffsetRegShifted, ShiftType, ShiftAmount, if (ParseMemoryOffsetReg(Negative, OffsetRegShifted, ShiftType, ShiftAmount,
Offset, OffsetIsReg, OffsetRegNum, E)) Offset, OffsetIsReg, OffsetRegNum, E))
return true; return true;
@ -743,29 +745,12 @@ ParseMemory(SmallVectorImpl<MCParsedAsmOperand*> &Operands) {
Parser.Lex(); // Eat right bracket token. Parser.Lex(); // Eat right bracket token.
const AsmToken &ExclaimTok = Parser.getTok(); const AsmToken &ExclaimTok = Parser.getTok();
ARMOperand *WBOp = 0;
if (ExclaimTok.is(AsmToken::Exclaim)) { if (ExclaimTok.is(AsmToken::Exclaim)) {
WBOp = ARMOperand::CreateToken(ExclaimTok.getString(), WBOp = ARMOperand::CreateToken(ExclaimTok.getString(),
ExclaimTok.getLoc()); ExclaimTok.getLoc());
Writeback = true; Writeback = true;
Parser.Lex(); // Eat exclaim token Parser.Lex(); // Eat exclaim token
} }
// Force Offset to exist if used.
if (!OffsetIsReg) {
if (!Offset)
Offset = MCConstantExpr::Create(0, getContext());
}
Operands.push_back(ARMOperand::CreateMem(BaseRegNum, OffsetIsReg, Offset,
OffsetRegNum, OffsetRegShifted,
ShiftType, ShiftAmount, Preindexed,
Postindexed, Negative, Writeback,
S, E));
if (WBOp)
Operands.push_back(WBOp);
return false;
} else { } else {
// The "[Rn" we have so far was not followed by a comma. // The "[Rn" we have so far was not followed by a comma.
@ -774,12 +759,6 @@ ParseMemory(SmallVectorImpl<MCParsedAsmOperand*> &Operands) {
E = Tok.getLoc(); E = Tok.getLoc();
Parser.Lex(); // Eat right bracket token. Parser.Lex(); // Eat right bracket token.
int OffsetRegNum = -1;
bool OffsetRegShifted = false;
enum ShiftType ShiftType = Lsl;
const MCExpr *ShiftAmount = 0;
const MCExpr *Offset = 0;
const AsmToken &NextTok = Parser.getTok(); const AsmToken &NextTok = Parser.getTok();
if (NextTok.isNot(AsmToken::EndOfStatement)) { if (NextTok.isNot(AsmToken::EndOfStatement)) {
@ -798,6 +777,7 @@ ParseMemory(SmallVectorImpl<MCParsedAsmOperand*> &Operands) {
E)) E))
return true; return true;
} }
}
// Force Offset to exist if used. // Force Offset to exist if used.
if (!OffsetIsReg) { if (!OffsetIsReg) {
@ -810,9 +790,11 @@ ParseMemory(SmallVectorImpl<MCParsedAsmOperand*> &Operands) {
ShiftType, ShiftAmount, Preindexed, ShiftType, ShiftAmount, Preindexed,
Postindexed, Negative, Writeback, Postindexed, Negative, Writeback,
S, E)); S, E));
if (WBOp)
Operands.push_back(WBOp);
return false; return false;
} }
}
/// Parse the offset of a memory operand after we have seen "[Rn," or "[Rn]," /// Parse the offset of a memory operand after we have seen "[Rn," or "[Rn],"
/// we will parse the following (were +/- means that a plus or minus is /// we will parse the following (were +/- means that a plus or minus is