From f4f6870ff22b3acd45006d6da685a23c03fc4b1b Mon Sep 17 00:00:00 2001 From: Tobias Grosser Date: Mon, 14 Dec 2015 15:05:37 +0000 Subject: [PATCH] Revert "Always treat scalar writes as MUST_WRITEs" This reverts commit r255471. Johannes raised in the post-commit review of r255471 the concern that PHI writes in non-affine regions with two exiting blocks are not really MUST_WRITE, but we just know that at least one out of the set of all possible PHI writes will be executed. Modeling all PHI nodes as MUST_WRITEs is probably save, but adding the needed documentation for such a special case is probably not worth the effort. Michael will be proposing a new patch that ensures only a single PHI_WRITE is created for non-affine regions, which - besides other benefits - should also allow us to use a single well-defined MUST_WRITE for such PHI writes. (This is not a full revert, but the condition and documentation have been slightly extended) llvm-svn: 255503 --- polly/lib/Analysis/ScopInfo.cpp | 24 ++++++++++++------- .../NonAffine/non_affine_loop_used_later.ll | 2 +- .../intra-non-affine-stmt-phi-node.ll | 4 ++-- polly/test/ScopInfo/non_affine_region_2.ll | 2 +- polly/test/ScopInfo/non_affine_region_3.ll | 6 ++--- polly/test/ScopInfo/non_affine_region_4.ll | 2 +- 6 files changed, 24 insertions(+), 16 deletions(-) diff --git a/polly/lib/Analysis/ScopInfo.cpp b/polly/lib/Analysis/ScopInfo.cpp index d37dd681c719..78b3d847e873 100644 --- a/polly/lib/Analysis/ScopInfo.cpp +++ b/polly/lib/Analysis/ScopInfo.cpp @@ -3885,14 +3885,22 @@ void ScopInfo::addMemoryAccess(BasicBlock *BB, Instruction *Inst, Value *BaseAddr = BaseAddress; std::string BaseName = getIslCompatibleName("MemRef_", BaseAddr, ""); - // The execution of a store is not guaranteed if its parent block is not - // guaranteed to executed, here tested by checking whether it dominates the - // exit block. However, implicit writes (llvm::Value definitions or one of a - // PHI's incoming values) must occur in well-formed IR code. - bool isApproximated = (Kind == ScopArrayInfo::MK_Array) && - Stmt->isRegionStmt() && - !DT->dominates(BB, Stmt->getRegion()->getExit()); - if (isApproximated && Type == MemoryAccess::MUST_WRITE) + bool isKnownMustAccess = false; + + // Accesses in single-basic block statements are always excuted. + if (Stmt->isBlockStmt()) + isKnownMustAccess = true; + + if (Stmt->isRegionStmt()) { + // Accesses that dominate the exit block of a non-affine region are always + // executed. In non-affine regions there may exist MK_Values that do not + // dominate the exit. MK_Values will always dominate the exit and MK_PHIs + // only if there is at most one PHI_WRITE in the non-affine region. + if (DT->dominates(BB, Stmt->getRegion()->getExit())) + isKnownMustAccess = true; + } + + if (!isKnownMustAccess && Type == MemoryAccess::MUST_WRITE) Type = MemoryAccess::MAY_WRITE; AccList.emplace_back(Stmt, Inst, Type, BaseAddress, ElemBytes, Affine, diff --git a/polly/test/ScopInfo/NonAffine/non_affine_loop_used_later.ll b/polly/test/ScopInfo/NonAffine/non_affine_loop_used_later.ll index 53ee464b3185..231d014a4738 100644 --- a/polly/test/ScopInfo/NonAffine/non_affine_loop_used_later.ll +++ b/polly/test/ScopInfo/NonAffine/non_affine_loop_used_later.ll @@ -39,7 +39,7 @@ ; CHECK: [N] -> { Stmt_bb4__TO__bb18[i0] -> MemRef_A[i0] }; ; CHECK: ReadAccess := [Reduction Type: NONE] [Scalar: 1] ; CHECK: [N] -> { Stmt_bb4__TO__bb18[i0] -> MemRef_smax[] }; -; CHECK: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1] +; CHECK: MayWriteAccess := [Reduction Type: NONE] [Scalar: 1] ; CHECK: [N] -> { Stmt_bb4__TO__bb18[i0] -> MemRef_j_2__phi[] }; ; CHECK: ReadAccess := [Reduction Type: NONE] [Scalar: 1] ; CHECK: [N] -> { Stmt_bb4__TO__bb18[i0] -> MemRef_j_0[] }; diff --git a/polly/test/ScopInfo/intra-non-affine-stmt-phi-node.ll b/polly/test/ScopInfo/intra-non-affine-stmt-phi-node.ll index 3b431b4413fa..8a27811748a2 100644 --- a/polly/test/ScopInfo/intra-non-affine-stmt-phi-node.ll +++ b/polly/test/ScopInfo/intra-non-affine-stmt-phi-node.ll @@ -10,9 +10,9 @@ ; CHECK-NEXT: { Stmt_loop__TO__backedge[i0] -> [i0, 0] }; ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1] ; CHECK-NEXT: { Stmt_loop__TO__backedge[i0] -> MemRef_merge__phi[] }; -; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1] +; CHECK-NEXT: MayWriteAccess := [Reduction Type: NONE] [Scalar: 1] ; CHECK-NEXT: { Stmt_loop__TO__backedge[i0] -> MemRef_merge__phi[] }; -; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1] +; CHECK-NEXT: MayWriteAccess := [Reduction Type: NONE] [Scalar: 1] ; CHECK-NEXT: { Stmt_loop__TO__backedge[i0] -> MemRef_merge__phi[] }; ; CHECK-NEXT: Stmt_backedge ; CHECK-NEXT: Domain := diff --git a/polly/test/ScopInfo/non_affine_region_2.ll b/polly/test/ScopInfo/non_affine_region_2.ll index 8d1779b99dc1..f549694e9ac3 100644 --- a/polly/test/ScopInfo/non_affine_region_2.ll +++ b/polly/test/ScopInfo/non_affine_region_2.ll @@ -35,7 +35,7 @@ ; CHECK-NEXT: { Stmt_bb3__TO__bb18[i0] -> MemRef_A[i0] }; ; CHECK-NOT: { Stmt_bb3__TO__bb18[i0] -> MemRef_x_0[] }; ; CHECK-NOT: { Stmt_bb3__TO__bb18[i0] -> MemRef_x_1[] }; -; CHECK: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1] +; CHECK: MayWriteAccess := [Reduction Type: NONE] [Scalar: 1] ; CHECK-NEXT: { Stmt_bb3__TO__bb18[i0] -> MemRef_x_2__phi[] }; ; CHECK-NOT: { Stmt_bb3__TO__bb18[i0] -> MemRef_x_0[] }; ; CHECK-NOT: { Stmt_bb3__TO__bb18[i0] -> MemRef_x_1[] }; diff --git a/polly/test/ScopInfo/non_affine_region_3.ll b/polly/test/ScopInfo/non_affine_region_3.ll index 488115cdc921..cb7197bbe289 100644 --- a/polly/test/ScopInfo/non_affine_region_3.ll +++ b/polly/test/ScopInfo/non_affine_region_3.ll @@ -31,11 +31,11 @@ ; CHECK: { Stmt_bb3__TO__bb18[i0] -> [i0, 0] }; ; CHECK: ReadAccess := [Reduction Type: NONE] [Scalar: 0] ; CHECK: { Stmt_bb3__TO__bb18[i0] -> MemRef_A[i0] }; -; CHECK: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1] +; CHECK: MayWriteAccess := [Reduction Type: NONE] [Scalar: 1] ; CHECK: { Stmt_bb3__TO__bb18[i0] -> MemRef_x_2__phi[] }; -; CHECK: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1] +; CHECK: MayWriteAccess := [Reduction Type: NONE] [Scalar: 1] ; CHECK: { Stmt_bb3__TO__bb18[i0] -> MemRef_x_2__phi[] }; -; CHECK: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1] +; CHECK: MayWriteAccess := [Reduction Type: NONE] [Scalar: 1] ; CHECK: { Stmt_bb3__TO__bb18[i0] -> MemRef_x_2__phi[] }; ; CHECK: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1] ; CHECK: { Stmt_bb3__TO__bb18[i0] -> MemRef_x_2__phi[] }; diff --git a/polly/test/ScopInfo/non_affine_region_4.ll b/polly/test/ScopInfo/non_affine_region_4.ll index 7a65e042c4b8..a2a78b6a45e0 100644 --- a/polly/test/ScopInfo/non_affine_region_4.ll +++ b/polly/test/ScopInfo/non_affine_region_4.ll @@ -39,7 +39,7 @@ ; CHECK: { Stmt_bb2__TO__bb7[i0] -> MemRef_A[i0] }; ; CHECK: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1] ; CHECK: { Stmt_bb2__TO__bb7[i0] -> MemRef_x[] }; -; CHECK: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1] +; CHECK: MayWriteAccess := [Reduction Type: NONE] [Scalar: 1] ; CHECK: { Stmt_bb2__TO__bb7[i0] -> MemRef_y__phi[] }; ; CHECK: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1] ; CHECK: { Stmt_bb2__TO__bb7[i0] -> MemRef_y__phi[] };