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f32 / f64 node is expanded to one i32 / i64 node. 

llvm-svn: 32433
This commit is contained in:
Evan Cheng 2006-12-11 06:50:04 +00:00
parent f6b01fdb48
commit f4bec95b58
1 changed files with 12 additions and 5 deletions
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17
llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
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@ -1547,7 +1547,10 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) {
if (Tmp2.getValueType() != MVT::Vector) {
SDOperand Lo, Hi;
ExpandOp(Tmp2, Lo, Hi);
Result = DAG.getNode(ISD::RET, MVT::Other, Tmp1, Lo, Tmp3, Hi, Tmp3);
if (Hi.Val)
Result = DAG.getNode(ISD::RET, MVT::Other, Tmp1, Lo, Tmp3, Hi,Tmp3);
else
Result = DAG.getNode(ISD::RET, MVT::Other, Tmp1, Lo, Tmp3);
Result = LegalizeOp(Result);
} else {
SDNode *InVal = Tmp2.Val;
@ -1609,8 +1612,10 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) {
ExpandOp(Node->getOperand(i), Lo, Hi);
NewValues.push_back(Lo);
NewValues.push_back(Node->getOperand(i+1));
NewValues.push_back(Hi);
NewValues.push_back(Node->getOperand(i+1));
if (Hi.Val) {
NewValues.push_back(Hi);
NewValues.push_back(Node->getOperand(i+1));
}
break;
}
case Promote:
@ -4570,7 +4575,7 @@ void SelectionDAGLegalize::ExpandOp(SDOperand Op, SDOperand &Lo, SDOperand &Hi){
// f32 / f64 must be expanded to i32 / i64.
if (VT == MVT::f32 || VT == MVT::f64) {
Lo = DAG.getNode(ISD::BIT_CONVERT, NVT, Node->getOperand(0));
Hi = DAG.getConstant(0, NVT);
Hi = SDOperand();
break;
}
@ -4873,7 +4878,9 @@ void SelectionDAGLegalize::ExpandOp(SDOperand Op, SDOperand &Lo, SDOperand &Hi){
// is a type that requires multi-step expansion.
if (getTypeAction(NVT) != Expand && NVT != MVT::isVoid) {
Lo = LegalizeOp(Lo);
Hi = LegalizeOp(Hi);
if (Hi.Val)
// Don't legalize the high part if it is expanded to a single node.
Hi = LegalizeOp(Hi);
}
// Remember in a map if the values will be reused later.