diff --git a/llvm/lib/Target/Mips/MipsCallLowering.cpp b/llvm/lib/Target/Mips/MipsCallLowering.cpp index 0cee6e732ec0..04aff60b2f23 100644 --- a/llvm/lib/Target/Mips/MipsCallLowering.cpp +++ b/llvm/lib/Target/Mips/MipsCallLowering.cpp @@ -522,12 +522,8 @@ bool MipsCallLowering::lowerCall(MachineIRBuilder &MIRBuilder, MachineInstrBuilder CallSeqStart = MIRBuilder.buildInstr(Mips::ADJCALLSTACKDOWN); - // FIXME: Add support for pic calling sequences, long call sequences for O32, - // N32 and N64. First handle the case when Callee.isReg(). - if (Callee.isReg()) - return false; - - MachineInstrBuilder MIB = MIRBuilder.buildInstrNoInsert(Mips::JAL); + MachineInstrBuilder MIB = MIRBuilder.buildInstrNoInsert( + Callee.isReg() ? Mips::JALRPseudo : Mips::JAL); MIB.addDef(Mips::SP, RegState::Implicit); MIB.add(Callee); const TargetRegisterInfo *TRI = MF.getSubtarget().getRegisterInfo(); @@ -573,6 +569,12 @@ bool MipsCallLowering::lowerCall(MachineIRBuilder &MIRBuilder, CallSeqStart.addImm(NextStackOffset).addImm(0); MIRBuilder.insertInstr(MIB); + if (MIB->getOpcode() == Mips::JALRPseudo) { + const MipsSubtarget &STI = + static_cast(MIRBuilder.getMF().getSubtarget()); + MIB.constrainAllUses(MIRBuilder.getTII(), *STI.getRegisterInfo(), + *STI.getRegBankInfo()); + } if (OrigRet.Reg) { diff --git a/llvm/test/CodeGen/Mips/GlobalISel/irtranslator/call.ll b/llvm/test/CodeGen/Mips/GlobalISel/irtranslator/call.ll index b1ac25827a6e..1d901db54a8f 100644 --- a/llvm/test/CodeGen/Mips/GlobalISel/irtranslator/call.ll +++ b/llvm/test/CodeGen/Mips/GlobalISel/irtranslator/call.ll @@ -25,3 +25,23 @@ entry: %doublez = add i32 %z, %z ret i32 %doublez } + +define i32 @call_reg(i32 (i32, i32)* %f_ptr, i32 %x, i32 %y) { + ; MIPS32-LABEL: name: call_reg + ; MIPS32: bb.1.entry: + ; MIPS32: liveins: $a0, $a1, $a2 + ; MIPS32: [[COPY:%[0-9]+]]:gpr32(p0) = COPY $a0 + ; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1 + ; MIPS32: [[COPY2:%[0-9]+]]:_(s32) = COPY $a2 + ; MIPS32: ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp + ; MIPS32: $a0 = COPY [[COPY1]](s32) + ; MIPS32: $a1 = COPY [[COPY2]](s32) + ; MIPS32: JALRPseudo [[COPY]](p0), csr_o32, implicit-def $ra, implicit-def $sp, implicit $a0, implicit $a1, implicit-def $v0 + ; MIPS32: [[COPY3:%[0-9]+]]:_(s32) = COPY $v0 + ; MIPS32: ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp + ; MIPS32: $v0 = COPY [[COPY3]](s32) + ; MIPS32: RetRA implicit $v0 +entry: + %call = call i32 %f_ptr(i32 %x, i32 %y) + ret i32 %call +}