forked from OSchip/llvm-project
[XCOFF] emit .rename for .lcomm when necessary
Summary: This is a follow up for D82481. For .lcomm directive, although it's not necessary to have .rename emitted, it's still desirable to do it so that we do not see internal 'Rename..' gets print out in symbol table. And we could have consistent naming between TC entry and .lcomm. And also have consistent naming between IR and final object file. Reviewed By: hubert.reinterpretcast Differential Revision: https://reviews.llvm.org/D86075
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@ -797,6 +797,12 @@ void MCAsmStreamer::emitXCOFFLocalCommonSymbol(MCSymbol *LabelSym,
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OS << ',' << Log2_32(ByteAlignment);
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EmitEOL();
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// Print symbol's rename (original name contains invalid character(s)) if
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// there is one.
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MCSymbolXCOFF *XSym = cast<MCSymbolXCOFF>(CsectSym);
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if (XSym->hasRename())
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emitXCOFFRenameDirective(XSym, XSym->getSymbolTableName());
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}
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void MCAsmStreamer::emitXCOFFSymbolLinkageWithVisibility(
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@ -1740,7 +1740,7 @@ void PPCAIXAsmPrinter::emitGlobalVariable(const GlobalVariable *GV) {
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if (GVKind.isBSSLocal())
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OutStreamer->emitXCOFFLocalCommonSymbol(
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OutContext.getOrCreateSymbol(GVSym->getUnqualifiedName()), Size,
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OutContext.getOrCreateSymbol(GVSym->getSymbolTableName()), Size,
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GVSym, Alignment.value());
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else
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OutStreamer->emitCommonSymbol(GVSym, Size, Alignment.value());
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@ -18,6 +18,9 @@
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; This is f"o"
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@"f\22o\22" = common global i32 0, align 4
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; This is f=o
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@"f\3do" = internal global i32 0, align 4
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define internal i32 @f$o() {
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entry:
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%call = call i32 bitcast (i32 (...)* @"f\40o" to i32 ()*)()
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@ -27,8 +30,10 @@ entry:
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; This is f&o
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define i32 @"f\26o"() {
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entry:
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%call = call i32 @f$o()
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ret i32 %call
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%tmp = call i32 @f$o()
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%tmp1 = load i32, i32* @"f\3do"
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%tmp2 = add i32 %tmp, %tmp1
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ret i32 %tmp2
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}
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; This is f&_o
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@ -84,12 +89,17 @@ declare i32 @"f\40o"(...)
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; ASM-NEXT: .vbyte 4, 10 # 0xa
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; ASM-NEXT: .comm _Renamed..2222f_o_[RW],4,2
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; ASM-NEXT: .rename _Renamed..2222f_o_[RW],"f""o"""
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; ASM-NEXT: .lcomm _Renamed..3df_o,4,_Renamed..3df_o[BS],2
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; ASM-NEXT: .rename _Renamed..3df_o[BS],"f=o"
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; ASM-NEXT: .extern ._Renamed..40f_o[PR]
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; ASM-NEXT: .rename ._Renamed..40f_o[PR],".f@o"
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; ASM-NEXT: .extern _Renamed..40f_o[DS]
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; ASM-NEXT: .rename _Renamed..40f_o[DS],"f@o"
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; ASM-NEXT: .toc
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; ASM-NEXT: L..C0:
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; ASM-NEXT: .tc _Renamed..3df_o[TC],_Renamed..3df_o[BS]
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; ASM-NEXT: .rename _Renamed..3df_o[TC],"f=o"
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; ASM-NEXT: L..C1:
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; ASM-NEXT: .tc _Renamed..40f_o[TC],_Renamed..40f_o[DS]
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; ASM-NEXT: .rename _Renamed..40f_o[TC],"f@o"
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@ -115,47 +125,59 @@ declare i32 @"f\40o"(...)
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; OBJ-NEXT: 34: 90 01 00 08 stw 0, 8(1)
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; OBJ-NEXT: 38: 94 21 ff c0 stwu 1, -64(1)
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; OBJ-NEXT: 3c: 4b ff ff c5 bl 0x0
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; OBJ-NEXT: 40: 38 21 00 40 addi 1, 1, 64
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; OBJ-NEXT: 44: 80 01 00 08 lwz 0, 8(1)
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; OBJ-NEXT: 48: 7c 08 03 a6 mtlr 0
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; OBJ-NEXT: 4c: 4e 80 00 20 blr
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; OBJ-NEXT: 40: 80 82 00 00 lwz 4, 0(2)
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; OBJ-NEXT: 00000042: R_TOC (idx: 24) f=o[TC]
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; OBJ-NEXT: 44: 80 84 00 00 lwz 4, 0(4)
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; OBJ-NEXT: 48: 7c 63 22 14 add 3, 3, 4
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; OBJ-NEXT: 4c: 38 21 00 40 addi 1, 1, 64
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; OBJ-NEXT: 50: 80 01 00 08 lwz 0, 8(1)
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; OBJ-NEXT: 54: 7c 08 03 a6 mtlr 0
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; OBJ-NEXT: 58: 4e 80 00 20 blr
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; OBJ-NEXT: 5c: 60 00 00 00 nop
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; OBJ-EMPTY:
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; OBJ-NEXT: 00000050 (idx: 10) .f&_o:
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; OBJ-NEXT: 50: 80 62 00 00 lwz 3, 0(2)
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; OBJ-NEXT: 00000052: R_TOC (idx: 24) f@o[TC]
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; OBJ-NEXT: 54: 4e 80 00 20 blr
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; OBJ-NEXT: 00000060 (idx: 10) .f&_o:
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; OBJ-NEXT: 60: 80 62 00 04 lwz 3, 4(2)
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; OBJ-NEXT: 00000062: R_TOC (idx: 26) f@o[TC]
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; OBJ-NEXT: 64: 4e 80 00 20 blr
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; OBJ-EMPTY:
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; OBJ-NEXT: Disassembly of section .data:
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; OBJ-EMPTY:
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; OBJ-NEXT: 00000058 (idx: 14) f`o:
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; OBJ-NEXT: 58: 00 00 00 0a <unknown>
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; OBJ-NEXT: 00000068 (idx: 14) f`o:
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; OBJ-NEXT: 68: 00 00 00 0a <unknown>
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; OBJ-EMPTY:
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; OBJ-NEXT: 0000005c (idx: 16) f$o[DS]:
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; OBJ-NEXT: 5c: 00 00 00 00 <unknown>
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; OBJ-NEXT: 0000005c: R_POS (idx: 6) .f$o
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; OBJ-NEXT: 60: 00 00 00 80 <unknown>
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; OBJ-NEXT: 00000060: R_POS (idx: 22) TOC[TC0]
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; OBJ-NEXT: 64: 00 00 00 00 <unknown>
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; OBJ-NEXT: 0000006c (idx: 16) f$o[DS]:
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; OBJ-NEXT: 6c: 00 00 00 00 <unknown>
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; OBJ-NEXT: 0000006c: R_POS (idx: 6) .f$o
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; OBJ-NEXT: 70: 00 00 00 90 <unknown>
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; OBJ-NEXT: 00000070: R_POS (idx: 22) TOC[TC0]
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; OBJ-NEXT: 74: 00 00 00 00 <unknown>
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; OBJ-EMPTY:
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; OBJ-NEXT: 00000068 (idx: 18) f&o[DS]:
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; OBJ-NEXT: 68: 00 00 00 30 <unknown>
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; OBJ-NEXT: 00000068: R_POS (idx: 8) .f&o
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; OBJ-NEXT: 6c: 00 00 00 80 <unknown>
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; OBJ-NEXT: 0000006c: R_POS (idx: 22) TOC[TC0]
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; OBJ-NEXT: 70: 00 00 00 00 <unknown>
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; OBJ-EMPTY:
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; OBJ-NEXT: 00000074 (idx: 20) f&_o[DS]:
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; OBJ-NEXT: 74: 00 00 00 50 <unknown>
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; OBJ-NEXT: 00000074: R_POS (idx: 10) .f&_o
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; OBJ-NEXT: 78: 00 00 00 80 <unknown>
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; OBJ-NEXT: 00000078: R_POS (idx: 22) TOC[TC0]
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; OBJ-NEXT: 7c: 00 00 00 00 <unknown>
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; OBJ-EMPTY:
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; OBJ-NEXT: 00000080 (idx: 24) f@o[TC]:
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; OBJ-NEXT: 00000078 (idx: 18) f&o[DS]:
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; OBJ-NEXT: 78: 00 00 00 30 <unknown>
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; OBJ-NEXT: 00000078: R_POS (idx: 8) .f&o
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; OBJ-NEXT: 7c: 00 00 00 90 <unknown>
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; OBJ-NEXT: 0000007c: R_POS (idx: 22) TOC[TC0]
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; OBJ-NEXT: 80: 00 00 00 00 <unknown>
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; OBJ-NEXT: 00000080: R_POS (idx: 2) f@o[DS]
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; OBJ-EMPTY:
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; OBJ-NEXT: 00000084 (idx: 20) f&_o[DS]:
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; OBJ-NEXT: 84: 00 00 00 60 <unknown>
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; OBJ-NEXT: 00000084: R_POS (idx: 10) .f&_o
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; OBJ-NEXT: 88: 00 00 00 90 <unknown>
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; OBJ-NEXT: 00000088: R_POS (idx: 22) TOC[TC0]
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; OBJ-NEXT: 8c: 00 00 00 00 <unknown>
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; OBJ-EMPTY:
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; OBJ-NEXT: 00000090 (idx: 24) f=o[TC]:
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; OBJ-NEXT: 90: 00 00 00 9c <unknown>
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; OBJ-NEXT: 00000090: R_POS (idx: 30) f=o[BS]
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; OBJ-EMPTY:
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; OBJ-NEXT: 00000094 (idx: 26) f@o[TC]:
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; OBJ-NEXT: 94: 00 00 00 00 <unknown>
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; OBJ-NEXT: 00000094: R_POS (idx: 2) f@o[DS]
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; OBJ-EMPTY:
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; OBJ-NEXT: Disassembly of section .bss:
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; OBJ-EMPTY:
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; OBJ-NEXT: 00000084 (idx: 26) f"o"[RW]:
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; OBJ-NEXT: 00000098 (idx: 28) f"o"[RW]:
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; OBJ-NEXT: ...
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; OBJ-EMPTY:
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; OBJ-NEXT: 0000009c (idx: 30) f=o[BS]:
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; OBJ-NEXT: ...
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