forked from OSchip/llvm-project
[X86] Add test cases showing failure to fold a global variable address into the gather addressing mode when using the target specific intrinsics. NFC
llvm-svn: 351522
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@ -145,3 +145,30 @@ define <2 x double> @test_mm_i32gather_pd(double *%a0, <2 x i64> %a1) {
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%res = call <2 x double> @llvm.x86.avx2.gather.d.pd(<2 x double> zeroinitializer, i8* %arg0, <4 x i32> %arg1, <2 x double> %mask, i8 2)
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ret <2 x double> %res
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}
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@x = global [1024 x float] zeroinitializer, align 16
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define <4 x float> @gather_global(<4 x i64>, i32* nocapture readnone) {
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; X32-LABEL: gather_global:
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; X32: # %bb.0:
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; X32-NEXT: vpcmpeqd %xmm2, %xmm2, %xmm2
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; X32-NEXT: movl $x, %eax
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; X32-NEXT: vxorps %xmm1, %xmm1, %xmm1
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; X32-NEXT: vgatherqps %xmm2, (%eax,%ymm0,4), %xmm1
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; X32-NEXT: vmovaps %xmm1, %xmm0
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; X32-NEXT: vzeroupper
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; X32-NEXT: retl
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;
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; X64-LABEL: gather_global:
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; X64: # %bb.0:
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; X64-NEXT: vpcmpeqd %xmm2, %xmm2, %xmm2
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; X64-NEXT: movl $x, %eax
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; X64-NEXT: vxorps %xmm1, %xmm1, %xmm1
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; X64-NEXT: vgatherqps %xmm2, (%rax,%ymm0,4), %xmm1
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; X64-NEXT: vmovaps %xmm1, %xmm0
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; X64-NEXT: vzeroupper
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; X64-NEXT: retq
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%3 = tail call <4 x float> @llvm.x86.avx2.gather.q.ps.256(<4 x float> zeroinitializer, i8* bitcast ([1024 x float]* @x to i8*), <4 x i64> %0, <4 x float> <float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000>, i8 4)
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ret <4 x float> %3
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}
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declare <4 x float> @llvm.x86.avx2.gather.q.ps.256(<4 x float>, i8*, <4 x i64>, <4 x float>, i8)
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@ -875,6 +875,21 @@ define <16 x float> @gather_mask_test(<16 x i32> %ind, <16 x float> %src, i8* %b
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ret <16 x float> %res6
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}
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@x = global [1024 x float] zeroinitializer, align 16
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define <8 x float> @gather_global(<8 x i64>, i32* nocapture readnone) {
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; CHECK-LABEL: gather_global:
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; CHECK: # %bb.0:
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; CHECK-NEXT: kxnorw %k0, %k0, %k1
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; CHECK-NEXT: movl $x, %eax
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; CHECK-NEXT: vxorps %xmm1, %xmm1, %xmm1
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; CHECK-NEXT: vgatherqps (%rax,%zmm0,4), %ymm1 {%k1}
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; CHECK-NEXT: vmovaps %ymm1, %ymm0
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; CHECK-NEXT: retq
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%3 = tail call <8 x float> @llvm.x86.avx512.mask.gather.qps.512(<8 x float> zeroinitializer, i8* bitcast ([1024 x float]* @x to i8*), <8 x i64> %0, <8 x i1> <i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true>, i32 4)
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ret <8 x float> %3
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}
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declare <16 x float> @llvm.x86.avx512.mask.gather.dps.512(<16 x float>, i8*, <16 x i32>, <16 x i1>, i32)
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declare <8 x double> @llvm.x86.avx512.mask.gather.dpd.512(<8 x double>, i8*, <8 x i32>, <8 x i1>, i32)
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declare <8 x float> @llvm.x86.avx512.mask.gather.qps.512(<8 x float>, i8*, <8 x i64>, <8 x i1>, i32)
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