forked from OSchip/llvm-project
Reapply "r363684: AMDGPU: Add GWS instruction builtins"
llvm-svn: 363871
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@ -45,6 +45,8 @@ BUILTIN(__builtin_amdgcn_s_barrier, "v", "n")
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BUILTIN(__builtin_amdgcn_wave_barrier, "v", "n")
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BUILTIN(__builtin_amdgcn_s_dcache_inv, "v", "n")
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BUILTIN(__builtin_amdgcn_buffer_wbinvl1, "v", "n")
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BUILTIN(__builtin_amdgcn_ds_gws_init, "vUiUi", "n")
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BUILTIN(__builtin_amdgcn_ds_gws_barrier, "vUiUi", "n")
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// FIXME: Need to disallow constant address space.
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BUILTIN(__builtin_amdgcn_div_scale, "dddbb*", "n")
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@ -548,6 +548,18 @@ kernel void test_ds_consume_lds(global int* out, local int* ptr) {
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*out = __builtin_amdgcn_ds_consume(ptr);
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}
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// CHECK-LABEL: @test_gws_init(
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// CHECK: call void @llvm.amdgcn.ds.gws.init(i32 %value, i32 %id)
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kernel void test_gws_init(uint value, uint id) {
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__builtin_amdgcn_ds_gws_init(value, id);
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}
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// CHECK-LABEL: @test_gws_barrier(
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// CHECK: call void @llvm.amdgcn.ds.gws.barrier(i32 %value, i32 %id)
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kernel void test_gws_barrier(uint value, uint id) {
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__builtin_amdgcn_ds_gws_barrier(value, id);
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}
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// CHECK-DAG: [[$WI_RANGE]] = !{i32 0, i32 1024}
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// CHECK-DAG: attributes #[[$NOUNWIND_READONLY:[0-9]+]] = { nounwind readonly }
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// CHECK-DAG: attributes #[[$READ_EXEC_ATTRS]] = { convergent }
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