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[mips] Use less registers to load address of TargetExternalSymbol 

There is no pattern matched `add hi, (MipsLo texternalsym)`. As a result,
loading an address of 32-bit symbol requires two registers and one more
additional instruction:
```
addiu $1, $zero, %lo(foo)
lui   $2, %hi(foo)
addu  $25, $2, $1
```

This patch adds the missed pattern and enables generation more effective
set of instructions:
```
lui   $1, %hi(foo)
addiu $25, $1, %lo(foo)
```

Differential Revision: https://reviews.llvm.org/D66771

llvm-svn: 370196
This commit is contained in:
Simon Atanasyan 2019-08-28 12:35:53 +00:00
parent 95686fa898
commit f46ba4f077
3 changed files with 10 additions and 13 deletions
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2
llvm/lib/Target/Mips/MipsInstrInfo.td
View File

@ -3165,6 +3165,8 @@ multiclass MipsHiLoRelocs<Instruction Lui, Instruction Addiu,
(Addiu GPROpnd:$hi, tconstpool:$lo)>;
def : MipsPat<(add GPROpnd:$hi, (MipsLo tglobaltlsaddr:$lo)),
(Addiu GPROpnd:$hi, tglobaltlsaddr:$lo)>;
def : MipsPat<(add GPROpnd:$hi, (MipsLo texternalsym:$lo)),
(Addiu GPROpnd:$hi, texternalsym:$lo)>;
}
// wrapper_pic

13
llvm/test/CodeGen/Mips/indirect-jump-hazard/long-calls.ll
View File

@ -28,11 +28,10 @@ define void @caller() {
; O32-NEXT: addiu $25, $1, %lo(callee)
; O32-NEXT: jalr.hb $25
; O32-NEXT: nop
; O32-NEXT: addiu $1, $zero, %lo(memset)
; O32-NEXT: lui $2, %hi(memset)
; O32-NEXT: addu $25, $2, $1
; O32-NEXT: lui $1, %hi(val)
; O32-NEXT: addiu $4, $1, %lo(val)
; O32-NEXT: lui $1, %hi(memset)
; O32-NEXT: addiu $25, $1, %lo(memset)
; O32-NEXT: addiu $5, $zero, 0
; O32-NEXT: jalr.hb $25
; O32-NEXT: addiu $6, $zero, 80
@ -50,11 +49,10 @@ define void @caller() {
; N32-NEXT: addiu $25, $1, %lo(callee)
; N32-NEXT: jalr.hb $25
; N32-NEXT: nop
; N32-NEXT: addiu $1, $zero, %lo(memset)
; N32-NEXT: lui $2, %hi(memset)
; N32-NEXT: addu $25, $2, $1
; N32-NEXT: lui $1, %hi(val)
; N32-NEXT: addiu $4, $1, %lo(val)
; N32-NEXT: lui $1, %hi(memset)
; N32-NEXT: addiu $25, $1, %lo(memset)
; N32-NEXT: daddiu $5, $zero, 0
; N32-NEXT: jalr.hb $25
; N32-NEXT: daddiu $6, $zero, 80
@ -83,8 +81,7 @@ define void @caller() {
; N64-NEXT: lui $2, %hi(memset)
; N64-NEXT: daddu $1, $1, $2
; N64-NEXT: dsll $1, $1, 16
; N64-NEXT: daddiu $2, $zero, %lo(memset)
; N64-NEXT: daddu $25, $1, $2
; N64-NEXT: daddiu $25, $1, %lo(memset)
; N64-NEXT: lui $1, %highest(val)
; N64-NEXT: daddiu $1, $1, %higher(val)
; N64-NEXT: dsll $1, $1, 16

8
llvm/test/CodeGen/Mips/long-calls.ll
View File

@ -33,9 +33,8 @@ define void @caller() {
; ON32: addiu $25, $1, %lo(callee)
; ON32: jalr $25
; ON32: addiu $1, $zero, %lo(memset)
; ON32: lui $2, %hi(memset)
; ON32: addu $25, $2, $1
; ON32: lui $1, %hi(memset)
; ON32: addiu $25, $1, %lo(memset)
; ON32: jalr $25
; ON64: lui $1, %highest(callee)
@ -47,8 +46,7 @@ define void @caller() {
; ON64: daddiu $1, $zero, %higher(memset)
; ON64: lui $2, %highest(memset)
; ON64: lui $2, %hi(memset)
; ON64: daddiu $2, $zero, %lo(memset)
; ON64: daddu $25, $1, $2
; ON64: daddiu $25, $1, %lo(memset)
; ON64: jalr $25
call void @callee()