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Fix unused variables in release build 

Differential Revision: https://reviews.llvm.org/D91705
This commit is contained in:
Mikhail Goncharov 2020-11-18 15:10:57 +01:00
parent 9f69c1bc54
commit f45c052c9e
1 changed files with 3 additions and 5 deletions
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8
llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp
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@ -1569,7 +1569,7 @@ void ARMLowOverheadLoops::ConvertVPTBlocks(LowOverheadLoop &LoLoop) {
auto Next = ++MachineBasicBlock::iterator(VPST);
assert(getVPTInstrPredicate(*Next) != ARMVCC::None &&
"The instruction after a VPST must be predicated");
(void)Next;
MachineInstr *VprDef = RDA->getUniqueReachingMIDef(VPST, ARM::VPR);
if (VprDef && VCMPOpcodeToVPT(VprDef->getOpcode()) &&
!LoLoop.ToRemove.contains(VprDef)) {
@ -1578,13 +1578,11 @@ void ARMLowOverheadLoops::ConvertVPTBlocks(LowOverheadLoop &LoLoop) {
// the same values at the VPST
if (RDA->hasSameReachingDef(VCMP, VPST, VCMP->getOperand(1).getReg()) &&
RDA->hasSameReachingDef(VCMP, VPST, VCMP->getOperand(2).getReg())) {
bool IntermediateInstrsUseVPR =
std::any_of(++MachineBasicBlock::iterator(VCMP),
MachineBasicBlock::iterator(VPST), hasVPRUse);
// If the instruction after the VCMP is predicated then a different
// code path is expected to have merged the VCMP and VPST already.
// This assertion protects against changes to that behaviour
assert(!IntermediateInstrsUseVPR &&
assert(!std::any_of(++MachineBasicBlock::iterator(VCMP),
MachineBasicBlock::iterator(VPST), hasVPRUse) &&
"Instructions between the VCMP and VPST are not expected to "
"be predicated");
ReplaceVCMPWithVPT(VCMP, VPST);