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Move the global variables representing each Target behind accessor function 

This avoids "static initialization order fiasco"

Differential Revision: https://reviews.llvm.org/D25412

llvm-svn: 283702
This commit is contained in:
Mehdi Amini 2016-10-09 23:00:34 +00:00
parent 6912539717
commit f42454b94b
102 changed files with 480 additions and 338 deletions
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6
llvm/docs/WritingAnLLVMBackend.rst
View File

@ -288,11 +288,11 @@ looks like this:
.. code-block:: c++
Target llvm::TheSparcTarget;
Target llvm::getTheSparcTarget();
extern "C" void LLVMInitializeSparcTargetInfo() {
RegisterTarget<Triple::sparc, /*HasJIT=*/false>
X(TheSparcTarget, "sparc", "Sparc");
X(getTheSparcTarget(), "sparc", "Sparc");
}
This allows the ``TargetRegistry`` to look up the target by name or by target
@ -305,7 +305,7 @@ example. Here is an example of registering the Sparc assembly printer:
.. code-block:: c++
extern "C" void LLVMInitializeSparcAsmPrinter() {
RegisterAsmPrinter<SparcAsmPrinter> X(TheSparcTarget);
RegisterAsmPrinter<SparcAsmPrinter> X(getTheSparcTarget());
}
For more information, see "`llvm/Target/TargetRegistry.h

9
llvm/include/llvm/Support/TargetRegistry.h
View File

@ -849,10 +849,13 @@ struct TargetRegistry {
/// target's initialization function. Usage:
///
///
/// Target TheFooTarget; // The global target instance.
///
/// Target &getTheFooTarget() { // The global target instance.
/// static Target TheFooTarget;
/// return TheFooTarget;
/// }
/// extern "C" void LLVMInitializeFooTargetInfo() {
/// RegisterTarget<Triple::foo> X(TheFooTarget, "foo", "Foo description");
/// RegisterTarget<Triple::foo> X(getTheFooTarget(), "foo", "Foo
/// description");
/// }
template <Triple::ArchType TargetArchType = Triple::UnknownArch,
bool HasJIT = false>

6
llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
View File

@ -577,7 +577,7 @@ void AArch64AsmPrinter::EmitInstruction(const MachineInstr *MI) {
// Force static initialization.
extern "C" void LLVMInitializeAArch64AsmPrinter() {
RegisterAsmPrinter<AArch64AsmPrinter> X(TheAArch64leTarget);
RegisterAsmPrinter<AArch64AsmPrinter> Y(TheAArch64beTarget);
RegisterAsmPrinter<AArch64AsmPrinter> Z(TheARM64Target);
RegisterAsmPrinter<AArch64AsmPrinter> X(getTheAArch64leTarget());
RegisterAsmPrinter<AArch64AsmPrinter> Y(getTheAArch64beTarget());
RegisterAsmPrinter<AArch64AsmPrinter> Z(getTheARM64Target());
}

6
llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
View File

@ -126,9 +126,9 @@ static cl::opt<bool>
extern "C" void LLVMInitializeAArch64Target() {
// Register the target.
RegisterTargetMachine<AArch64leTargetMachine> X(TheAArch64leTarget);
RegisterTargetMachine<AArch64beTargetMachine> Y(TheAArch64beTarget);
RegisterTargetMachine<AArch64leTargetMachine> Z(TheARM64Target);
RegisterTargetMachine<AArch64leTargetMachine> X(getTheAArch64leTarget());
RegisterTargetMachine<AArch64beTargetMachine> Y(getTheAArch64beTarget());
RegisterTargetMachine<AArch64leTargetMachine> Z(getTheARM64Target());
auto PR = PassRegistry::getPassRegistry();
initializeGlobalISel(*PR);
initializeAArch64A53Fix835769Pass(*PR);

6
llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
View File

@ -4553,9 +4553,9 @@ AArch64AsmParser::classifySymbolRef(const MCExpr *Expr,
/// Force static initialization.
extern "C" void LLVMInitializeAArch64AsmParser() {
RegisterMCAsmParser<AArch64AsmParser> X(TheAArch64leTarget);
RegisterMCAsmParser<AArch64AsmParser> Y(TheAArch64beTarget);
RegisterMCAsmParser<AArch64AsmParser> Z(TheARM64Target);
RegisterMCAsmParser<AArch64AsmParser> X(getTheAArch64leTarget());
RegisterMCAsmParser<AArch64AsmParser> Y(getTheAArch64beTarget());
RegisterMCAsmParser<AArch64AsmParser> Z(getTheARM64Target());
}
#define GET_REGISTER_MATCHER

12
llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
View File

@ -237,18 +237,18 @@ createAArch64ExternalSymbolizer(const Triple &TT, LLVMOpInfoCallback GetOpInfo,
}
extern "C" void LLVMInitializeAArch64Disassembler() {
TargetRegistry::RegisterMCDisassembler(TheAArch64leTarget,
TargetRegistry::RegisterMCDisassembler(getTheAArch64leTarget(),
createAArch64Disassembler);
TargetRegistry::RegisterMCDisassembler(TheAArch64beTarget,
TargetRegistry::RegisterMCDisassembler(getTheAArch64beTarget(),
createAArch64Disassembler);
TargetRegistry::RegisterMCSymbolizer(TheAArch64leTarget,
TargetRegistry::RegisterMCSymbolizer(getTheAArch64leTarget(),
createAArch64ExternalSymbolizer);
TargetRegistry::RegisterMCSymbolizer(TheAArch64beTarget,
TargetRegistry::RegisterMCSymbolizer(getTheAArch64beTarget(),
createAArch64ExternalSymbolizer);
TargetRegistry::RegisterMCDisassembler(TheARM64Target,
TargetRegistry::RegisterMCDisassembler(getTheARM64Target(),
createAArch64Disassembler);
TargetRegistry::RegisterMCSymbolizer(TheARM64Target,
TargetRegistry::RegisterMCSymbolizer(getTheARM64Target(),
createAArch64ExternalSymbolizer);
}

8
llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.cpp
View File

@ -123,8 +123,8 @@ static MCInstrAnalysis *createAArch64InstrAnalysis(const MCInstrInfo *Info) {
// Force static initialization.
extern "C" void LLVMInitializeAArch64TargetMC() {
for (Target *T :
{&TheAArch64leTarget, &TheAArch64beTarget, &TheARM64Target}) {
for (Target *T : {&getTheAArch64leTarget(), &getTheAArch64beTarget(),
&getTheARM64Target()}) {
// Register the MC asm info.
RegisterMCAsmInfoFn X(*T, createAArch64MCAsmInfo);
@ -162,8 +162,8 @@ extern "C" void LLVMInitializeAArch64TargetMC() {
}
// Register the asm backend.
for (Target *T : {&TheAArch64leTarget, &TheARM64Target})
for (Target *T : {&getTheAArch64leTarget(), &getTheARM64Target()})
TargetRegistry::RegisterMCAsmBackend(*T, createAArch64leAsmBackend);
TargetRegistry::RegisterMCAsmBackend(TheAArch64beTarget,
TargetRegistry::RegisterMCAsmBackend(getTheAArch64beTarget(),
createAArch64beAsmBackend);
}

6
llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.h
View File

@ -35,9 +35,9 @@ class Triple;
class raw_ostream;
class raw_pwrite_stream;
extern Target TheAArch64leTarget;
extern Target TheAArch64beTarget;
extern Target TheARM64Target;
Target &getTheAArch64leTarget();
Target &getTheAArch64beTarget();
Target &getTheARM64Target();
MCCodeEmitter *createAArch64MCCodeEmitter(const MCInstrInfo &MCII,
const MCRegisterInfo &MRI,

25
llvm/lib/Target/AArch64/TargetInfo/AArch64TargetInfo.cpp
View File

@ -10,23 +10,30 @@
#include "llvm/ADT/Triple.h"
#include "llvm/Support/TargetRegistry.h"
using namespace llvm;
namespace llvm {
Target TheAArch64leTarget;
Target TheAArch64beTarget;
Target TheARM64Target;
} // end namespace llvm
Target &getTheAArch64leTarget() {
static Target TheAArch64leTarget;
return TheAArch64leTarget;
}
Target &getTheAArch64beTarget() {
static Target TheAArch64beTarget;
return TheAArch64beTarget;
}
Target &getTheARM64Target() {
static Target TheARM64Target;
return TheARM64Target;
}
} // namespace llvm
extern "C" void LLVMInitializeAArch64TargetInfo() {
// Now register the "arm64" name for use with "-march". We don't want it to
// take possession of the Triple::aarch64 tag though.
TargetRegistry::RegisterTarget(TheARM64Target, "arm64",
TargetRegistry::RegisterTarget(getTheARM64Target(), "arm64",
"ARM64 (little endian)",
[](Triple::ArchType) { return false; }, true);
RegisterTarget<Triple::aarch64, /*HasJIT=*/true> Z(
TheAArch64leTarget, "aarch64", "AArch64 (little endian)");
getTheAArch64leTarget(), "aarch64", "AArch64 (little endian)");
RegisterTarget<Triple::aarch64_be, /*HasJIT=*/true> W(
TheAArch64beTarget, "aarch64_be", "AArch64 (big endian)");
getTheAArch64beTarget(), "aarch64_be", "AArch64 (big endian)");
}

4
llvm/lib/Target/AMDGPU/AMDGPU.h
View File

@ -108,8 +108,8 @@ extern char &SIDebuggerInsertNopsID;
void initializeSIInsertWaitsPass(PassRegistry&);
extern char &SIInsertWaitsID;
extern Target TheAMDGPUTarget;
extern Target TheGCNTarget;
Target &getTheAMDGPUTarget();
Target &getTheGCNTarget();
namespace AMDGPU {
enum TargetIndex {

6
llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
View File

@ -87,8 +87,10 @@ createAMDGPUAsmPrinterPass(TargetMachine &tm,
}
extern "C" void LLVMInitializeAMDGPUAsmPrinter() {
TargetRegistry::RegisterAsmPrinter(TheAMDGPUTarget, createAMDGPUAsmPrinterPass);
TargetRegistry::RegisterAsmPrinter(TheGCNTarget, createAMDGPUAsmPrinterPass);
TargetRegistry::RegisterAsmPrinter(getTheAMDGPUTarget(),
createAMDGPUAsmPrinterPass);
TargetRegistry::RegisterAsmPrinter(getTheGCNTarget(),
createAMDGPUAsmPrinterPass);
}
AMDGPUAsmPrinter::AMDGPUAsmPrinter(TargetMachine &TM,

4
llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
View File

@ -63,8 +63,8 @@ static cl::opt<bool> EnableLoadStoreVectorizer(
extern "C" void LLVMInitializeAMDGPUTarget() {
// Register the target
RegisterTargetMachine<R600TargetMachine> X(TheAMDGPUTarget);
RegisterTargetMachine<GCNTargetMachine> Y(TheGCNTarget);
RegisterTargetMachine<R600TargetMachine> X(getTheAMDGPUTarget());
RegisterTargetMachine<GCNTargetMachine> Y(getTheGCNTarget());
PassRegistry *PR = PassRegistry::getPassRegistry();
initializeSILowerI1CopiesPass(*PR);

4
llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
View File

@ -3052,8 +3052,8 @@ void AMDGPUAsmParser::cvtSDWA(MCInst &Inst, const OperandVector &Operands,
/// Force static initialization.
extern "C" void LLVMInitializeAMDGPUAsmParser() {
RegisterMCAsmParser<AMDGPUAsmParser> A(TheAMDGPUTarget);
RegisterMCAsmParser<AMDGPUAsmParser> B(TheGCNTarget);
RegisterMCAsmParser<AMDGPUAsmParser> A(getTheAMDGPUTarget());
RegisterMCAsmParser<AMDGPUAsmParser> B(getTheGCNTarget());
}
#define GET_REGISTER_MATCHER

6
llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
View File

@ -495,6 +495,8 @@ static MCDisassembler *createAMDGPUDisassembler(const Target &T,
}
extern "C" void LLVMInitializeAMDGPUDisassembler() {
TargetRegistry::RegisterMCDisassembler(TheGCNTarget, createAMDGPUDisassembler);
TargetRegistry::RegisterMCSymbolizer(TheGCNTarget, createAMDGPUSymbolizer);
TargetRegistry::RegisterMCDisassembler(getTheGCNTarget(),
createAMDGPUDisassembler);
TargetRegistry::RegisterMCSymbolizer(getTheGCNTarget(),
createAMDGPUSymbolizer);
}

13
llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCTargetDesc.cpp
View File

@ -86,7 +86,7 @@ static MCStreamer *createMCStreamer(const Triple &T, MCContext &Context,
}
extern "C" void LLVMInitializeAMDGPUTargetMC() {
for (Target *T : {&TheAMDGPUTarget, &TheGCNTarget}) {
for (Target *T : {&getTheAMDGPUTarget(), &getTheGCNTarget()}) {
RegisterMCAsmInfo<AMDGPUMCAsmInfo> X(*T);
TargetRegistry::RegisterMCInstrInfo(*T, createAMDGPUMCInstrInfo);
@ -98,14 +98,15 @@ extern "C" void LLVMInitializeAMDGPUTargetMC() {
}
// R600 specific registration
TargetRegistry::RegisterMCCodeEmitter(TheAMDGPUTarget,
TargetRegistry::RegisterMCCodeEmitter(getTheAMDGPUTarget(),
createR600MCCodeEmitter);
// GCN specific registration
TargetRegistry::RegisterMCCodeEmitter(TheGCNTarget, createSIMCCodeEmitter);
TargetRegistry::RegisterMCCodeEmitter(getTheGCNTarget(),
createSIMCCodeEmitter);
TargetRegistry::RegisterAsmTargetStreamer(TheGCNTarget,
TargetRegistry::RegisterAsmTargetStreamer(getTheGCNTarget(),
createAMDGPUAsmTargetStreamer);
TargetRegistry::RegisterObjectTargetStreamer(TheGCNTarget,
createAMDGPUObjectTargetStreamer);
TargetRegistry::RegisterObjectTargetStreamer(
getTheGCNTarget(), createAMDGPUObjectTargetStreamer);
}

4
llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCTargetDesc.h
View File

@ -32,8 +32,8 @@ class Target;
class Triple;
class raw_pwrite_stream;
extern Target TheAMDGPUTarget;
extern Target TheGCNTarget;
Target &getTheAMDGPUTarget();
Target &getTheGCNTarget();
MCCodeEmitter *createR600MCCodeEmitter(const MCInstrInfo &MCII,
const MCRegisterInfo &MRI,

17
llvm/lib/Target/AMDGPU/TargetInfo/AMDGPUTargetInfo.cpp
View File

@ -18,13 +18,20 @@ using namespace llvm;
/// \brief The target which suports all AMD GPUs. This will eventually
/// be deprecated and there will be a R600 target and a GCN target.
Target llvm::TheAMDGPUTarget;
Target &llvm::getTheAMDGPUTarget() {
static Target TheAMDGPUTarget;
return TheAMDGPUTarget;
}
/// \brief The target for GCN GPUs
Target llvm::TheGCNTarget;
Target &llvm::getTheGCNTarget() {
static Target TheGCNTarget;
return TheGCNTarget;
}
/// \brief Extern function to initialize the targets for the AMDGPU backend
extern "C" void LLVMInitializeAMDGPUTargetInfo() {
RegisterTarget<Triple::r600, false>
R600(TheAMDGPUTarget, "r600", "AMD GPUs HD2XXX-HD6XXX");
RegisterTarget<Triple::amdgcn, false> GCN(TheGCNTarget, "amdgcn", "AMD GCN GPUs");
RegisterTarget<Triple::r600, false> R600(getTheAMDGPUTarget(), "r600",
"AMD GPUs HD2XXX-HD6XXX");
RegisterTarget<Triple::amdgcn, false> GCN(getTheGCNTarget(), "amdgcn",
"AMD GCN GPUs");
}

8
llvm/lib/Target/ARM/ARMAsmPrinter.cpp
View File

@ -2064,8 +2064,8 @@ void ARMAsmPrinter::EmitInstruction(const MachineInstr *MI) {
// Force static initialization.
extern "C" void LLVMInitializeARMAsmPrinter() {
RegisterAsmPrinter<ARMAsmPrinter> X(TheARMLETarget);
RegisterAsmPrinter<ARMAsmPrinter> Y(TheARMBETarget);
RegisterAsmPrinter<ARMAsmPrinter> A(TheThumbLETarget);
RegisterAsmPrinter<ARMAsmPrinter> B(TheThumbBETarget);
RegisterAsmPrinter<ARMAsmPrinter> X(getTheARMLETarget());
RegisterAsmPrinter<ARMAsmPrinter> Y(getTheARMBETarget());
RegisterAsmPrinter<ARMAsmPrinter> A(getTheThumbLETarget());
RegisterAsmPrinter<ARMAsmPrinter> B(getTheThumbBETarget());
}

8
llvm/lib/Target/ARM/ARMTargetMachine.cpp
View File

@ -51,10 +51,10 @@ EnableGlobalMerge("arm-global-merge", cl::Hidden,
extern "C" void LLVMInitializeARMTarget() {
// Register the target.
RegisterTargetMachine<ARMLETargetMachine> X(TheARMLETarget);
RegisterTargetMachine<ARMBETargetMachine> Y(TheARMBETarget);
RegisterTargetMachine<ThumbLETargetMachine> A(TheThumbLETarget);
RegisterTargetMachine<ThumbBETargetMachine> B(TheThumbBETarget);
RegisterTargetMachine<ARMLETargetMachine> X(getTheARMLETarget());
RegisterTargetMachine<ARMBETargetMachine> Y(getTheARMBETarget());
RegisterTargetMachine<ThumbLETargetMachine> A(getTheThumbLETarget());
RegisterTargetMachine<ThumbBETargetMachine> B(getTheThumbBETarget());
PassRegistry &Registry = *PassRegistry::getPassRegistry();
initializeARMLoadStoreOptPass(Registry);

8
llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
View File

@ -10408,10 +10408,10 @@ bool ARMAsmParser::parseDirectiveThumbSet(SMLoc L) {
/// Force static initialization.
extern "C" void LLVMInitializeARMAsmParser() {
RegisterMCAsmParser<ARMAsmParser> X(TheARMLETarget);
RegisterMCAsmParser<ARMAsmParser> Y(TheARMBETarget);
RegisterMCAsmParser<ARMAsmParser> A(TheThumbLETarget);
RegisterMCAsmParser<ARMAsmParser> B(TheThumbBETarget);
RegisterMCAsmParser<ARMAsmParser> X(getTheARMLETarget());
RegisterMCAsmParser<ARMAsmParser> Y(getTheARMBETarget());
RegisterMCAsmParser<ARMAsmParser> A(getTheThumbLETarget());
RegisterMCAsmParser<ARMAsmParser> B(getTheThumbBETarget());
}
#define GET_REGISTER_MATCHER

8
llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
View File

@ -861,13 +861,13 @@ DecodeStatus ThumbDisassembler::getInstruction(MCInst &MI, uint64_t &Size,
extern "C" void LLVMInitializeARMDisassembler() {
TargetRegistry::RegisterMCDisassembler(TheARMLETarget,
TargetRegistry::RegisterMCDisassembler(getTheARMLETarget(),
createARMDisassembler);
TargetRegistry::RegisterMCDisassembler(TheARMBETarget,
TargetRegistry::RegisterMCDisassembler(getTheARMBETarget(),
createARMDisassembler);
TargetRegistry::RegisterMCDisassembler(TheThumbLETarget,
TargetRegistry::RegisterMCDisassembler(getTheThumbLETarget(),
createThumbDisassembler);
TargetRegistry::RegisterMCDisassembler(TheThumbBETarget,
TargetRegistry::RegisterMCDisassembler(getTheThumbBETarget(),
createThumbDisassembler);
}

18
llvm/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp
View File

@ -274,8 +274,8 @@ static MCInstrAnalysis *createARMMCInstrAnalysis(const MCInstrInfo *Info) {
// Force static initialization.
extern "C" void LLVMInitializeARMTargetMC() {
for (Target *T : {&TheARMLETarget, &TheARMBETarget, &TheThumbLETarget,
&TheThumbBETarget}) {
for (Target *T : {&getTheARMLETarget(), &getTheARMBETarget(),
&getTheThumbLETarget(), &getTheThumbBETarget()}) {
// Register the MC asm info.
RegisterMCAsmInfoFn X(*T, createARMMCAsmInfo);
@ -314,16 +314,18 @@ extern "C" void LLVMInitializeARMTargetMC() {
}
// Register the MC Code Emitter
for (Target *T : {&TheARMLETarget, &TheThumbLETarget})
for (Target *T : {&getTheARMLETarget(), &getTheThumbLETarget()})
TargetRegistry::RegisterMCCodeEmitter(*T, createARMLEMCCodeEmitter);
for (Target *T : {&TheARMBETarget, &TheThumbBETarget})
for (Target *T : {&getTheARMBETarget(), &getTheThumbBETarget()})
TargetRegistry::RegisterMCCodeEmitter(*T, createARMBEMCCodeEmitter);
// Register the asm backend.
TargetRegistry::RegisterMCAsmBackend(TheARMLETarget, createARMLEAsmBackend);
TargetRegistry::RegisterMCAsmBackend(TheARMBETarget, createARMBEAsmBackend);
TargetRegistry::RegisterMCAsmBackend(TheThumbLETarget,
TargetRegistry::RegisterMCAsmBackend(getTheARMLETarget(),
createARMLEAsmBackend);
TargetRegistry::RegisterMCAsmBackend(getTheARMBETarget(),
createARMBEAsmBackend);
TargetRegistry::RegisterMCAsmBackend(getTheThumbLETarget(),
createThumbLEAsmBackend);
TargetRegistry::RegisterMCAsmBackend(TheThumbBETarget,
TargetRegistry::RegisterMCAsmBackend(getTheThumbBETarget(),
createThumbBEAsmBackend);
}

6
llvm/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.h
View File

@ -37,8 +37,10 @@ class Triple;
class raw_ostream;
class raw_pwrite_stream;
extern Target TheARMLETarget, TheThumbLETarget;
extern Target TheARMBETarget, TheThumbBETarget;
Target &getTheARMLETarget();
Target &getTheThumbLETarget();
Target &getTheARMBETarget();
Target &getTheThumbBETarget();
namespace ARM_MC {
std::string ParseARMTriple(const Triple &TT, StringRef CPU);

34
llvm/lib/Target/ARM/TargetInfo/ARMTargetInfo.cpp
View File

@ -11,17 +11,31 @@
#include "llvm/Support/TargetRegistry.h"
using namespace llvm;
Target llvm::TheARMLETarget, llvm::TheARMBETarget;
Target llvm::TheThumbLETarget, llvm::TheThumbBETarget;
Target &llvm::getTheARMLETarget() {
static Target TheARMLETarget;
return TheARMLETarget;
}
Target &llvm::getTheARMBETarget() {
static Target TheARMBETarget;
return TheARMBETarget;
}
Target &llvm::getTheThumbLETarget() {
static Target TheThumbLETarget;
return TheThumbLETarget;
}
Target &llvm::getTheThumbBETarget() {
static Target TheThumbBETarget;
return TheThumbBETarget;
}
extern "C" void LLVMInitializeARMTargetInfo() {
RegisterTarget<Triple::arm, /*HasJIT=*/true>
X(TheARMLETarget, "arm", "ARM");
RegisterTarget<Triple::armeb, /*HasJIT=*/true>
Y(TheARMBETarget, "armeb", "ARM (big endian)");
RegisterTarget<Triple::arm, /*HasJIT=*/true> X(getTheARMLETarget(), "arm",
"ARM");
RegisterTarget<Triple::armeb, /*HasJIT=*/true> Y(getTheARMBETarget(), "armeb",
"ARM (big endian)");
RegisterTarget<Triple::thumb, /*HasJIT=*/true>
A(TheThumbLETarget, "thumb", "Thumb");
RegisterTarget<Triple::thumbeb, /*HasJIT=*/true>
B(TheThumbBETarget, "thumbeb", "Thumb (big endian)");
RegisterTarget<Triple::thumb, /*HasJIT=*/true> A(getTheThumbLETarget(),
"thumb", "Thumb");
RegisterTarget<Triple::thumbeb, /*HasJIT=*/true> B(
getTheThumbBETarget(), "thumbeb", "Thumb (big endian)");
}

2
llvm/lib/Target/AVR/AVRAsmPrinter.cpp
View File

@ -177,6 +177,6 @@ void AVRAsmPrinter::EmitInstruction(const MachineInstr *MI) {
} // end of namespace llvm
extern "C" void LLVMInitializeAVRAsmPrinter() {
llvm::RegisterAsmPrinter<llvm::AVRAsmPrinter> X(llvm::TheAVRTarget);
llvm::RegisterAsmPrinter<llvm::AVRAsmPrinter> X(llvm::getTheAVRTarget());
}

2
llvm/lib/Target/AVR/AVRTargetMachine.cpp
View File

@ -77,7 +77,7 @@ TargetPassConfig *AVRTargetMachine::createPassConfig(PassManagerBase &PM) {
extern "C" void LLVMInitializeAVRTarget() {
// Register the target.
RegisterTargetMachine<AVRTargetMachine> X(TheAVRTarget);
RegisterTargetMachine<AVRTargetMachine> X(getTheAVRTarget());
}
const AVRSubtarget *AVRTargetMachine::getSubtargetImpl() const {

2
llvm/lib/Target/AVR/AsmParser/AVRAsmParser.cpp
View File

@ -582,7 +582,7 @@ bool AVRAsmParser::ParseInstruction(ParseInstructionInfo &Info,
bool AVRAsmParser::ParseDirective(llvm::AsmToken DirectiveID) { return true; }
extern "C" void LLVMInitializeAVRAsmParser() {
RegisterMCAsmParser<AVRAsmParser> X(TheAVRTarget);
RegisterMCAsmParser<AVRAsmParser> X(getTheAVRTarget());
}
#define GET_REGISTER_MATCHER

19
llvm/lib/Target/AVR/MCTargetDesc/AVRMCTargetDesc.cpp
View File

@ -85,33 +85,34 @@ static MCTargetStreamer *createMCAsmTargetStreamer(MCStreamer &S,
extern "C" void LLVMInitializeAVRTargetMC() {
// Register the MC asm info.
RegisterMCAsmInfo<AVRMCAsmInfo> X(TheAVRTarget);
RegisterMCAsmInfo<AVRMCAsmInfo> X(getTheAVRTarget());
// Register the MC instruction info.
TargetRegistry::RegisterMCInstrInfo(TheAVRTarget, createAVRMCInstrInfo);
TargetRegistry::RegisterMCInstrInfo(getTheAVRTarget(), createAVRMCInstrInfo);
// Register the MC register info.
TargetRegistry::RegisterMCRegInfo(TheAVRTarget, createAVRMCRegisterInfo);
TargetRegistry::RegisterMCRegInfo(getTheAVRTarget(), createAVRMCRegisterInfo);
// Register the MC subtarget info.
TargetRegistry::RegisterMCSubtargetInfo(TheAVRTarget,
TargetRegistry::RegisterMCSubtargetInfo(getTheAVRTarget(),
createAVRMCSubtargetInfo);
// Register the MCInstPrinter.
TargetRegistry::RegisterMCInstPrinter(TheAVRTarget, createAVRMCInstPrinter);
TargetRegistry::RegisterMCInstPrinter(getTheAVRTarget(),
createAVRMCInstPrinter);
// Register the ELF streamer
TargetRegistry::RegisterELFStreamer(TheAVRTarget, createMCStreamer);
TargetRegistry::RegisterELFStreamer(getTheAVRTarget(), createMCStreamer);
// Register the obj target streamer.
TargetRegistry::RegisterObjectTargetStreamer(TheAVRTarget,
TargetRegistry::RegisterObjectTargetStreamer(getTheAVRTarget(),
createAVRObjectTargetStreamer);
// Register the asm target streamer.
TargetRegistry::RegisterAsmTargetStreamer(TheAVRTarget,
TargetRegistry::RegisterAsmTargetStreamer(getTheAVRTarget(),
createMCAsmTargetStreamer);
// Register the asm backend (as little endian).
TargetRegistry::RegisterMCAsmBackend(TheAVRTarget, createAVRAsmBackend);
TargetRegistry::RegisterMCAsmBackend(getTheAVRTarget(), createAVRAsmBackend);
}

2
llvm/lib/Target/AVR/MCTargetDesc/AVRMCTargetDesc.h
View File

@ -30,7 +30,7 @@ class Target;
class Triple;
class raw_pwrite_stream;
extern Target TheAVRTarget;
Target &getTheAVRTarget();
/// Creates a machine code emitter for AVR.
MCCodeEmitter *createAVRMCCodeEmitter(const MCInstrInfo &MCII,

10
llvm/lib/Target/AVR/TargetInfo/AVRTargetInfo.cpp
View File

@ -9,13 +9,15 @@
#include "llvm/IR/Module.h"
#include "llvm/Support/TargetRegistry.h"
namespace llvm {
Target TheAVRTarget;
Target &getTheAVRTarget() {
static Target TheAVRTarget;
return TheAVRTarget;
}
}
extern "C" void LLVMInitializeAVRTargetInfo() {
llvm::RegisterTarget<llvm::Triple::avr> X(
llvm::TheAVRTarget, "avr", "Atmel AVR Microcontroller");
llvm::RegisterTarget<llvm::Triple::avr> X(llvm::getTheAVRTarget(), "avr",
"Atmel AVR Microcontroller");
}

6
llvm/lib/Target/BPF/BPFAsmPrinter.cpp
View File

@ -55,7 +55,7 @@ void BPFAsmPrinter::EmitInstruction(const MachineInstr *MI) {
// Force static initialization.
extern "C" void LLVMInitializeBPFAsmPrinter() {
RegisterAsmPrinter<BPFAsmPrinter> X(TheBPFleTarget);
RegisterAsmPrinter<BPFAsmPrinter> Y(TheBPFbeTarget);
RegisterAsmPrinter<BPFAsmPrinter> Z(TheBPFTarget);
RegisterAsmPrinter<BPFAsmPrinter> X(getTheBPFleTarget());
RegisterAsmPrinter<BPFAsmPrinter> Y(getTheBPFbeTarget());
RegisterAsmPrinter<BPFAsmPrinter> Z(getTheBPFTarget());
}

6
llvm/lib/Target/BPF/BPFTargetMachine.cpp
View File

@ -24,9 +24,9 @@ using namespace llvm;
extern "C" void LLVMInitializeBPFTarget() {
// Register the target.
RegisterTargetMachine<BPFTargetMachine> X(TheBPFleTarget);
RegisterTargetMachine<BPFTargetMachine> Y(TheBPFbeTarget);
RegisterTargetMachine<BPFTargetMachine> Z(TheBPFTarget);
RegisterTargetMachine<BPFTargetMachine> X(getTheBPFleTarget());
RegisterTargetMachine<BPFTargetMachine> Y(getTheBPFbeTarget());
RegisterTargetMachine<BPFTargetMachine> Z(getTheBPFTarget());
}
// DataLayout: little or big endian

27
llvm/lib/Target/BPF/MCTargetDesc/BPFMCTargetDesc.cpp
View File

@ -68,7 +68,8 @@ static MCInstPrinter *createBPFMCInstPrinter(const Triple &T,
}
extern "C" void LLVMInitializeBPFTargetMC() {
for (Target *T : {&TheBPFleTarget, &TheBPFbeTarget, &TheBPFTarget}) {
for (Target *T :
{&getTheBPFleTarget(), &getTheBPFbeTarget(), &getTheBPFTarget()}) {
// Register the MC asm info.
RegisterMCAsmInfo<BPFMCAsmInfo> X(*T);
@ -90,18 +91,26 @@ extern "C" void LLVMInitializeBPFTargetMC() {
}
// Register the MC code emitter
TargetRegistry::RegisterMCCodeEmitter(TheBPFleTarget, createBPFMCCodeEmitter);
TargetRegistry::RegisterMCCodeEmitter(TheBPFbeTarget, createBPFbeMCCodeEmitter);
TargetRegistry::RegisterMCCodeEmitter(getTheBPFleTarget(),
createBPFMCCodeEmitter);
TargetRegistry::RegisterMCCodeEmitter(getTheBPFbeTarget(),
createBPFbeMCCodeEmitter);
// Register the ASM Backend
TargetRegistry::RegisterMCAsmBackend(TheBPFleTarget, createBPFAsmBackend);
TargetRegistry::RegisterMCAsmBackend(TheBPFbeTarget, createBPFbeAsmBackend);
TargetRegistry::RegisterMCAsmBackend(getTheBPFleTarget(),
createBPFAsmBackend);
TargetRegistry::RegisterMCAsmBackend(getTheBPFbeTarget(),
createBPFbeAsmBackend);
if (sys::IsLittleEndianHost) {
TargetRegistry::RegisterMCCodeEmitter(TheBPFTarget, createBPFMCCodeEmitter);
TargetRegistry::RegisterMCAsmBackend(TheBPFTarget, createBPFAsmBackend);
TargetRegistry::RegisterMCCodeEmitter(getTheBPFTarget(),
createBPFMCCodeEmitter);
TargetRegistry::RegisterMCAsmBackend(getTheBPFTarget(),
createBPFAsmBackend);
} else {
TargetRegistry::RegisterMCCodeEmitter(TheBPFTarget, createBPFbeMCCodeEmitter);
TargetRegistry::RegisterMCAsmBackend(TheBPFTarget, createBPFbeAsmBackend);
TargetRegistry::RegisterMCCodeEmitter(getTheBPFTarget(),
createBPFbeMCCodeEmitter);
TargetRegistry::RegisterMCAsmBackend(getTheBPFTarget(),
createBPFbeAsmBackend);
}
}

6
llvm/lib/Target/BPF/MCTargetDesc/BPFMCTargetDesc.h
View File

@ -32,9 +32,9 @@ class Triple;
class raw_ostream;
class raw_pwrite_stream;
extern Target TheBPFleTarget;
extern Target TheBPFbeTarget;
extern Target TheBPFTarget;
Target &getTheBPFleTarget();
Target &getTheBPFbeTarget();
Target &getTheBPFTarget();
MCCodeEmitter *createBPFMCCodeEmitter(const MCInstrInfo &MCII,
const MCRegisterInfo &MRI,

26
llvm/lib/Target/BPF/TargetInfo/BPFTargetInfo.cpp
View File

@ -12,17 +12,25 @@
using namespace llvm;
namespace llvm {
Target TheBPFleTarget;
Target TheBPFbeTarget;
Target TheBPFTarget;
Target &getTheBPFleTarget() {
static Target TheBPFleTarget;
return TheBPFleTarget;
}
Target &getTheBPFbeTarget() {
static Target TheBPFbeTarget;
return TheBPFbeTarget;
}
Target &getTheBPFTarget() {
static Target TheBPFTarget;
return TheBPFTarget;
}
} // namespace llvm
extern "C" void LLVMInitializeBPFTargetInfo() {
TargetRegistry::RegisterTarget(TheBPFTarget, "bpf",
"BPF (host endian)",
TargetRegistry::RegisterTarget(getTheBPFTarget(), "bpf", "BPF (host endian)",
[](Triple::ArchType) { return false; }, true);
RegisterTarget<Triple::bpfel, /*HasJIT=*/true> X(
TheBPFleTarget, "bpfel", "BPF (little endian)");
RegisterTarget<Triple::bpfeb, /*HasJIT=*/true> Y(
TheBPFbeTarget, "bpfeb", "BPF (big endian)");
RegisterTarget<Triple::bpfel, /*HasJIT=*/true> X(getTheBPFleTarget(), "bpfel",
"BPF (little endian)");
RegisterTarget<Triple::bpfeb, /*HasJIT=*/true> Y(getTheBPFbeTarget(), "bpfeb",
"BPF (big endian)");
}

2
llvm/lib/Target/Hexagon/AsmParser/HexagonAsmParser.cpp
View File

@ -1065,7 +1065,7 @@ bool HexagonAsmParser::RegisterMatchesArch(unsigned MatchNum) const {
/// Force static initialization.
extern "C" void LLVMInitializeHexagonAsmParser() {
RegisterMCAsmParser<HexagonAsmParser> X(TheHexagonTarget);
RegisterMCAsmParser<HexagonAsmParser> X(getTheHexagonTarget());
}
#define GET_MATCHER_IMPLEMENTATION

2
llvm/lib/Target/Hexagon/Disassembler/HexagonDisassembler.cpp
View File

@ -147,7 +147,7 @@ static MCDisassembler *createHexagonDisassembler(const Target &T,
}
extern "C" void LLVMInitializeHexagonDisassembler() {
TargetRegistry::RegisterMCDisassembler(TheHexagonTarget,
TargetRegistry::RegisterMCDisassembler(getTheHexagonTarget(),
createHexagonDisassembler);
}

2
llvm/lib/Target/Hexagon/HexagonAsmPrinter.cpp
View File

@ -600,5 +600,5 @@ void HexagonAsmPrinter::EmitInstruction(const MachineInstr *MI) {
}
extern "C" void LLVMInitializeHexagonAsmPrinter() {
RegisterAsmPrinter<HexagonAsmPrinter> X(TheHexagonTarget);
RegisterAsmPrinter<HexagonAsmPrinter> X(getTheHexagonTarget());
}

2
llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp
View File

@ -100,7 +100,7 @@ int HexagonTargetMachineModule = 0;
extern "C" void LLVMInitializeHexagonTarget() {
// Register the target.
RegisterTargetMachine<HexagonTargetMachine> X(TheHexagonTarget);
RegisterTargetMachine<HexagonTargetMachine> X(getTheHexagonTarget());
}
static ScheduleDAGInstrs *createVLIWMachineSched(MachineSchedContext *C) {

20
llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCTargetDesc.cpp
View File

@ -230,39 +230,39 @@ createHexagonObjectTargetStreamer(MCStreamer &S, MCSubtargetInfo const &STI) {
// Force static initialization.
extern "C" void LLVMInitializeHexagonTargetMC() {
// Register the MC asm info.
RegisterMCAsmInfoFn X(TheHexagonTarget, createHexagonMCAsmInfo);
RegisterMCAsmInfoFn X(getTheHexagonTarget(), createHexagonMCAsmInfo);
// Register the MC instruction info.
TargetRegistry::RegisterMCInstrInfo(TheHexagonTarget,
TargetRegistry::RegisterMCInstrInfo(getTheHexagonTarget(),
createHexagonMCInstrInfo);
// Register the MC register info.
TargetRegistry::RegisterMCRegInfo(TheHexagonTarget,
TargetRegistry::RegisterMCRegInfo(getTheHexagonTarget(),
createHexagonMCRegisterInfo);
// Register the MC subtarget info.
TargetRegistry::RegisterMCSubtargetInfo(TheHexagonTarget,
TargetRegistry::RegisterMCSubtargetInfo(getTheHexagonTarget(),
createHexagonMCSubtargetInfo);
// Register the MC Code Emitter
TargetRegistry::RegisterMCCodeEmitter(TheHexagonTarget,
TargetRegistry::RegisterMCCodeEmitter(getTheHexagonTarget(),
createHexagonMCCodeEmitter);
// Register the asm backend
TargetRegistry::RegisterMCAsmBackend(TheHexagonTarget,
TargetRegistry::RegisterMCAsmBackend(getTheHexagonTarget(),
createHexagonAsmBackend);
// Register the obj streamer
TargetRegistry::RegisterELFStreamer(TheHexagonTarget, createMCStreamer);
TargetRegistry::RegisterELFStreamer(getTheHexagonTarget(), createMCStreamer);
// Register the asm streamer
TargetRegistry::RegisterAsmTargetStreamer(TheHexagonTarget,
TargetRegistry::RegisterAsmTargetStreamer(getTheHexagonTarget(),
createMCAsmTargetStreamer);
// Register the MC Inst Printer
TargetRegistry::RegisterMCInstPrinter(TheHexagonTarget,
TargetRegistry::RegisterMCInstPrinter(getTheHexagonTarget(),
createHexagonMCInstPrinter);
TargetRegistry::RegisterObjectTargetStreamer(
TheHexagonTarget, createHexagonObjectTargetStreamer);
getTheHexagonTarget(), createHexagonObjectTargetStreamer);
}

2
llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCTargetDesc.h
View File

@ -35,7 +35,7 @@ class StringRef;
class raw_ostream;
class raw_pwrite_stream;
extern Target TheHexagonTarget;
Target &getTheHexagonTarget();
extern cl::opt<bool> HexagonDisableCompound;
extern cl::opt<bool> HexagonDisableDuplex;
extern const InstrStage HexagonStages[];

8
llvm/lib/Target/Hexagon/TargetInfo/HexagonTargetInfo.cpp
View File

@ -12,8 +12,12 @@
#include "llvm/Support/TargetRegistry.h"
using namespace llvm;
Target llvm::TheHexagonTarget;
Target &llvm::getTheHexagonTarget() {
static Target TheHexagonTarget;
return TheHexagonTarget;
}
extern "C" void LLVMInitializeHexagonTargetInfo() {
RegisterTarget<Triple::hexagon, /*HasJIT=*/false> X(TheHexagonTarget, "hexagon", "Hexagon");
RegisterTarget<Triple::hexagon, /*HasJIT=*/false> X(getTheHexagonTarget(),
"hexagon", "Hexagon");
}

2
llvm/lib/Target/Lanai/AsmParser/LanaiAsmParser.cpp
View File

@ -1207,7 +1207,7 @@ bool LanaiAsmParser::ParseInstruction(ParseInstructionInfo & /*Info*/,
} // namespace
extern "C" void LLVMInitializeLanaiAsmParser() {
RegisterMCAsmParser<LanaiAsmParser> x(TheLanaiTarget);
RegisterMCAsmParser<LanaiAsmParser> x(getTheLanaiTarget());
}
} // namespace llvm

4
llvm/lib/Target/Lanai/Disassembler/LanaiDisassembler.cpp
View File

@ -27,7 +27,7 @@ using namespace llvm;
typedef MCDisassembler::DecodeStatus DecodeStatus;
namespace llvm {
extern Target TheLanaiTarget;
Target &getTheLanaiTarget();
}
static MCDisassembler *createLanaiDisassembler(const Target & /*T*/,
@ -38,7 +38,7 @@ static MCDisassembler *createLanaiDisassembler(const Target & /*T*/,
extern "C" void LLVMInitializeLanaiDisassembler() {
// Register the disassembler
TargetRegistry::RegisterMCDisassembler(TheLanaiTarget,
TargetRegistry::RegisterMCDisassembler(getTheLanaiTarget(),
createLanaiDisassembler);
}

2
llvm/lib/Target/Lanai/Lanai.h
View File

@ -45,7 +45,7 @@ FunctionPass *createLanaiMemAluCombinerPass();
// operations.
FunctionPass *createLanaiSetflagAluCombinerPass();
extern Target TheLanaiTarget;
Target &getTheLanaiTarget();
} // namespace llvm
#endif // LLVM_LIB_TARGET_LANAI_LANAI_H

2
llvm/lib/Target/Lanai/LanaiAsmPrinter.cpp
View File

@ -239,5 +239,5 @@ bool LanaiAsmPrinter::isBlockOnlyReachableByFallthrough(
// Force static initialization.
extern "C" void LLVMInitializeLanaiAsmPrinter() {
RegisterAsmPrinter<LanaiAsmPrinter> X(TheLanaiTarget);
RegisterAsmPrinter<LanaiAsmPrinter> X(getTheLanaiTarget());
}

3
llvm/lib/Target/Lanai/LanaiTargetMachine.cpp
View File

@ -32,7 +32,8 @@ void initializeLanaiMemAluCombinerPass(PassRegistry &);
extern "C" void LLVMInitializeLanaiTarget() {
// Register the target.
RegisterTargetMachine<LanaiTargetMachine> registered_target(TheLanaiTarget);
RegisterTargetMachine<LanaiTargetMachine> registered_target(
getTheLanaiTarget());
}
static std::string computeDataLayout() {

23
llvm/lib/Target/Lanai/MCTargetDesc/LanaiMCTargetDesc.cpp
View File

@ -113,37 +113,40 @@ static MCInstrAnalysis *createLanaiInstrAnalysis(const MCInstrInfo *Info) {
extern "C" void LLVMInitializeLanaiTargetMC() {
// Register the MC asm info.
RegisterMCAsmInfo<LanaiMCAsmInfo> X(TheLanaiTarget);
RegisterMCAsmInfo<LanaiMCAsmInfo> X(getTheLanaiTarget());
// Register the MC instruction info.
TargetRegistry::RegisterMCInstrInfo(TheLanaiTarget, createLanaiMCInstrInfo);
TargetRegistry::RegisterMCInstrInfo(getTheLanaiTarget(),
createLanaiMCInstrInfo);
// Register the MC register info.
TargetRegistry::RegisterMCRegInfo(TheLanaiTarget, createLanaiMCRegisterInfo);
TargetRegistry::RegisterMCRegInfo(getTheLanaiTarget(),
createLanaiMCRegisterInfo);
// Register the MC subtarget info.
TargetRegistry::RegisterMCSubtargetInfo(TheLanaiTarget,
TargetRegistry::RegisterMCSubtargetInfo(getTheLanaiTarget(),
createLanaiMCSubtargetInfo);
// Register the MC code emitter
TargetRegistry::RegisterMCCodeEmitter(TheLanaiTarget,
TargetRegistry::RegisterMCCodeEmitter(getTheLanaiTarget(),
llvm::createLanaiMCCodeEmitter);
// Register the ASM Backend
TargetRegistry::RegisterMCAsmBackend(TheLanaiTarget, createLanaiAsmBackend);
TargetRegistry::RegisterMCAsmBackend(getTheLanaiTarget(),
createLanaiAsmBackend);
// Register the MCInstPrinter.
TargetRegistry::RegisterMCInstPrinter(TheLanaiTarget,
TargetRegistry::RegisterMCInstPrinter(getTheLanaiTarget(),
createLanaiMCInstPrinter);
// Register the ELF streamer.
TargetRegistry::RegisterELFStreamer(TheLanaiTarget, createMCStreamer);
TargetRegistry::RegisterELFStreamer(getTheLanaiTarget(), createMCStreamer);
// Register the MC relocation info.
TargetRegistry::RegisterMCRelocationInfo(TheLanaiTarget,
TargetRegistry::RegisterMCRelocationInfo(getTheLanaiTarget(),
createLanaiElfRelocation);
// Register the MC instruction analyzer.
TargetRegistry::RegisterMCInstrAnalysis(TheLanaiTarget,
TargetRegistry::RegisterMCInstrAnalysis(getTheLanaiTarget(),
createLanaiInstrAnalysis);
}

2
llvm/lib/Target/Lanai/MCTargetDesc/LanaiMCTargetDesc.h
View File

@ -32,7 +32,7 @@ class Triple;
class StringRef;
class raw_pwrite_stream;
extern Target TheLanaiTarget;
Target &getTheLanaiTarget();
MCCodeEmitter *createLanaiMCCodeEmitter(const MCInstrInfo &MCII,
const MCRegisterInfo &MRI,

9
llvm/lib/Target/Lanai/TargetInfo/LanaiTargetInfo.cpp
View File

@ -13,8 +13,13 @@
using namespace llvm;
Target llvm::TheLanaiTarget;
namespace llvm {
Target &getTheLanaiTarget() {
static Target TheLanaiTarget;
return TheLanaiTarget;
}
} // namespace llvm
extern "C" void LLVMInitializeLanaiTargetInfo() {
RegisterTarget<Triple::lanai> X(TheLanaiTarget, "lanai", "Lanai");
RegisterTarget<Triple::lanai> X(getTheLanaiTarget(), "lanai", "Lanai");
}

11
llvm/lib/Target/MSP430/MCTargetDesc/MSP430MCTargetDesc.cpp
View File

@ -59,20 +59,21 @@ static MCInstPrinter *createMSP430MCInstPrinter(const Triple &T,
extern "C" void LLVMInitializeMSP430TargetMC() {
// Register the MC asm info.
RegisterMCAsmInfo<MSP430MCAsmInfo> X(TheMSP430Target);
RegisterMCAsmInfo<MSP430MCAsmInfo> X(getTheMSP430Target());
// Register the MC instruction info.
TargetRegistry::RegisterMCInstrInfo(TheMSP430Target, createMSP430MCInstrInfo);
TargetRegistry::RegisterMCInstrInfo(getTheMSP430Target(),
createMSP430MCInstrInfo);
// Register the MC register info.
TargetRegistry::RegisterMCRegInfo(TheMSP430Target,
TargetRegistry::RegisterMCRegInfo(getTheMSP430Target(),
createMSP430MCRegisterInfo);
// Register the MC subtarget info.
TargetRegistry::RegisterMCSubtargetInfo(TheMSP430Target,
TargetRegistry::RegisterMCSubtargetInfo(getTheMSP430Target(),
createMSP430MCSubtargetInfo);
// Register the MCInstPrinter.
TargetRegistry::RegisterMCInstPrinter(TheMSP430Target,
TargetRegistry::RegisterMCInstPrinter(getTheMSP430Target(),
createMSP430MCInstPrinter);
}

2
llvm/lib/Target/MSP430/MCTargetDesc/MSP430MCTargetDesc.h
View File

@ -19,7 +19,7 @@
namespace llvm {
class Target;
extern Target TheMSP430Target;
Target &getTheMSP430Target();
} // End llvm namespace

2
llvm/lib/Target/MSP430/MSP430AsmPrinter.cpp
View File

@ -155,5 +155,5 @@ void MSP430AsmPrinter::EmitInstruction(const MachineInstr *MI) {
// Force static initialization.
extern "C" void LLVMInitializeMSP430AsmPrinter() {
RegisterAsmPrinter<MSP430AsmPrinter> X(TheMSP430Target);
RegisterAsmPrinter<MSP430AsmPrinter> X(getTheMSP430Target());
}

2
llvm/lib/Target/MSP430/MSP430TargetMachine.cpp
View File

@ -23,7 +23,7 @@ using namespace llvm;
extern "C" void LLVMInitializeMSP430Target() {
// Register the target.
RegisterTargetMachine<MSP430TargetMachine> X(TheMSP430Target);
RegisterTargetMachine<MSP430TargetMachine> X(getTheMSP430Target());
}
static Reloc::Model getEffectiveRelocModel(Optional<Reloc::Model> RM) {

13
llvm/lib/Target/MSP430/TargetInfo/MSP430TargetInfo.cpp
View File

@ -12,9 +12,12 @@
#include "llvm/Support/TargetRegistry.h"
using namespace llvm;
Target llvm::TheMSP430Target;
extern "C" void LLVMInitializeMSP430TargetInfo() {
RegisterTarget<Triple::msp430>
X(TheMSP430Target, "msp430", "MSP430 [experimental]");
Target &llvm::getTheMSP430Target() {
static Target TheMSP430Target;
return TheMSP430Target;
}
extern "C" void LLVMInitializeMSP430TargetInfo() {
RegisterTarget<Triple::msp430> X(getTheMSP430Target(), "msp430",
"MSP430 [experimental]");
}

8
llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
View File

@ -6469,10 +6469,10 @@ bool MipsAsmParser::parseInternalDirectiveReallowModule() {
}
extern "C" void LLVMInitializeMipsAsmParser() {
RegisterMCAsmParser<MipsAsmParser> X(TheMipsTarget);
RegisterMCAsmParser<MipsAsmParser> Y(TheMipselTarget);
RegisterMCAsmParser<MipsAsmParser> A(TheMips64Target);
RegisterMCAsmParser<MipsAsmParser> B(TheMips64elTarget);
RegisterMCAsmParser<MipsAsmParser> X(getTheMipsTarget());
RegisterMCAsmParser<MipsAsmParser> Y(getTheMipselTarget());
RegisterMCAsmParser<MipsAsmParser> A(getTheMips64Target());
RegisterMCAsmParser<MipsAsmParser> B(getTheMips64elTarget());
}
#define GET_REGISTER_MATCHER

14
llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp
View File

@ -519,8 +519,10 @@ static DecodeStatus DecodeMovePRegPair(MCInst &Inst, unsigned Insn,
const void *Decoder);
namespace llvm {
extern Target TheMipselTarget, TheMipsTarget, TheMips64Target,
TheMips64elTarget;
Target &getTheMipselTarget();
Target &getTheMipsTarget();
Target &getTheMips64Target();
Target &getTheMips64elTarget();
}
static MCDisassembler *createMipsDisassembler(
@ -539,13 +541,13 @@ static MCDisassembler *createMipselDisassembler(
extern "C" void LLVMInitializeMipsDisassembler() {
// Register the disassembler.
TargetRegistry::RegisterMCDisassembler(TheMipsTarget,
TargetRegistry::RegisterMCDisassembler(getTheMipsTarget(),
createMipsDisassembler);
TargetRegistry::RegisterMCDisassembler(TheMipselTarget,
TargetRegistry::RegisterMCDisassembler(getTheMipselTarget(),
createMipselDisassembler);
TargetRegistry::RegisterMCDisassembler(TheMips64Target,
TargetRegistry::RegisterMCDisassembler(getTheMips64Target(),
createMipsDisassembler);
TargetRegistry::RegisterMCDisassembler(TheMips64elTarget,
TargetRegistry::RegisterMCDisassembler(getTheMips64elTarget(),
createMipselDisassembler);
}

17
llvm/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp
View File

@ -149,8 +149,8 @@ static MCInstrAnalysis *createMipsMCInstrAnalysis(const MCInstrInfo *Info) {
}
extern "C" void LLVMInitializeMipsTargetMC() {
for (Target *T : {&TheMipsTarget, &TheMipselTarget, &TheMips64Target,
&TheMips64elTarget}) {
for (Target *T : {&getTheMipsTarget(), &getTheMipselTarget(),
&getTheMips64Target(), &getTheMips64elTarget()}) {
// Register the MC asm info.
RegisterMCAsmInfoFn X(*T, createMipsMCAsmInfo);
@ -183,20 +183,19 @@ extern "C" void LLVMInitializeMipsTargetMC() {
}
// Register the MC Code Emitter
for (Target *T : {&TheMipsTarget, &TheMips64Target})
for (Target *T : {&getTheMipsTarget(), &getTheMips64Target()})
TargetRegistry::RegisterMCCodeEmitter(*T, createMipsMCCodeEmitterEB);
for (Target *T : {&TheMipselTarget, &TheMips64elTarget})
for (Target *T : {&getTheMipselTarget(), &getTheMips64elTarget()})
TargetRegistry::RegisterMCCodeEmitter(*T, createMipsMCCodeEmitterEL);
// Register the asm backend.
TargetRegistry::RegisterMCAsmBackend(TheMipsTarget,
TargetRegistry::RegisterMCAsmBackend(getTheMipsTarget(),
createMipsAsmBackendEB32);
TargetRegistry::RegisterMCAsmBackend(TheMipselTarget,
TargetRegistry::RegisterMCAsmBackend(getTheMipselTarget(),
createMipsAsmBackendEL32);
TargetRegistry::RegisterMCAsmBackend(TheMips64Target,
TargetRegistry::RegisterMCAsmBackend(getTheMips64Target(),
createMipsAsmBackendEB64);
TargetRegistry::RegisterMCAsmBackend(TheMips64elTarget,
TargetRegistry::RegisterMCAsmBackend(getTheMips64elTarget(),
createMipsAsmBackendEL64);
}

8
llvm/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.h
View File

@ -31,10 +31,10 @@ class Triple;
class raw_ostream;
class raw_pwrite_stream;
extern Target TheMipsTarget;
extern Target TheMipselTarget;
extern Target TheMips64Target;
extern Target TheMips64elTarget;
Target &getTheMipsTarget();
Target &getTheMipselTarget();
Target &getTheMips64Target();
Target &getTheMips64elTarget();
MCCodeEmitter *createMipsMCCodeEmitterEB(const MCInstrInfo &MCII,
const MCRegisterInfo &MRI,

8
llvm/lib/Target/Mips/MipsAsmPrinter.cpp
View File

@ -1066,8 +1066,8 @@ bool MipsAsmPrinter::isLongBranchPseudo(int Opcode) const {
// Force static initialization.
extern "C" void LLVMInitializeMipsAsmPrinter() {
RegisterAsmPrinter<MipsAsmPrinter> X(TheMipsTarget);
RegisterAsmPrinter<MipsAsmPrinter> Y(TheMipselTarget);
RegisterAsmPrinter<MipsAsmPrinter> A(TheMips64Target);
RegisterAsmPrinter<MipsAsmPrinter> B(TheMips64elTarget);
RegisterAsmPrinter<MipsAsmPrinter> X(getTheMipsTarget());
RegisterAsmPrinter<MipsAsmPrinter> Y(getTheMipselTarget());
RegisterAsmPrinter<MipsAsmPrinter> A(getTheMips64Target());
RegisterAsmPrinter<MipsAsmPrinter> B(getTheMips64elTarget());
}

8
llvm/lib/Target/Mips/MipsTargetMachine.cpp
View File

@ -39,10 +39,10 @@ using namespace llvm;
extern "C" void LLVMInitializeMipsTarget() {
// Register the target.
RegisterTargetMachine<MipsebTargetMachine> X(TheMipsTarget);
RegisterTargetMachine<MipselTargetMachine> Y(TheMipselTarget);
RegisterTargetMachine<MipsebTargetMachine> A(TheMips64Target);
RegisterTargetMachine<MipselTargetMachine> B(TheMips64elTarget);
RegisterTargetMachine<MipsebTargetMachine> X(getTheMipsTarget());
RegisterTargetMachine<MipselTargetMachine> Y(getTheMipselTarget());
RegisterTargetMachine<MipsebTargetMachine> A(getTheMips64Target());
RegisterTargetMachine<MipselTargetMachine> B(getTheMips64elTarget());
}
static std::string computeDataLayout(const Triple &TT, StringRef CPU,

31
llvm/lib/Target/Mips/TargetInfo/MipsTargetInfo.cpp
View File

@ -12,20 +12,37 @@
#include "llvm/Support/TargetRegistry.h"
using namespace llvm;
Target llvm::TheMipsTarget, llvm::TheMipselTarget;
Target llvm::TheMips64Target, llvm::TheMips64elTarget;
Target &llvm::getTheMipsTarget() {
static Target TheMipsTarget;
return TheMipsTarget;
}
Target &llvm::getTheMipselTarget() {
static Target TheMipselTarget;
return TheMipselTarget;
}
Target &llvm::getTheMips64Target() {
static Target TheMips64Target;
return TheMips64Target;
}
Target &llvm::getTheMips64elTarget() {
static Target TheMips64elTarget;
return TheMips64elTarget;
}
extern "C" void LLVMInitializeMipsTargetInfo() {
RegisterTarget<Triple::mips,
/*HasJIT=*/true> X(TheMipsTarget, "mips", "Mips");
/*HasJIT=*/true>
X(getTheMipsTarget(), "mips", "Mips");
RegisterTarget<Triple::mipsel,
/*HasJIT=*/true> Y(TheMipselTarget, "mipsel", "Mipsel");
/*HasJIT=*/true>
Y(getTheMipselTarget(), "mipsel", "Mipsel");
RegisterTarget<Triple::mips64,
/*HasJIT=*/true> A(TheMips64Target, "mips64", "Mips64 [experimental]");
/*HasJIT=*/true>
A(getTheMips64Target(), "mips64", "Mips64 [experimental]");
RegisterTarget<Triple::mips64el,
/*HasJIT=*/true> B(TheMips64elTarget,
"mips64el", "Mips64el [experimental]");
/*HasJIT=*/true>
B(getTheMips64elTarget(), "mips64el", "Mips64el [experimental]");
}

2
llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXMCTargetDesc.cpp
View File

@ -60,7 +60,7 @@ static MCInstPrinter *createNVPTXMCInstPrinter(const Triple &T,
// Force static initialization.
extern "C" void LLVMInitializeNVPTXTargetMC() {
for (Target *T : {&TheNVPTXTarget32, &TheNVPTXTarget64}) {
for (Target *T : {&getTheNVPTXTarget32(), &getTheNVPTXTarget64()}) {
// Register the MC asm info.
RegisterMCAsmInfo<NVPTXMCAsmInfo> X(*T);

4
llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXMCTargetDesc.h
View File

@ -19,8 +19,8 @@
namespace llvm {
class Target;
extern Target TheNVPTXTarget32;
extern Target TheNVPTXTarget64;
Target &getTheNVPTXTarget32();
Target &getTheNVPTXTarget64();
} // End llvm namespace

4
llvm/lib/Target/NVPTX/NVPTX.h
View File

@ -57,8 +57,8 @@ FunctionPass *createNVPTXLowerArgsPass(const NVPTXTargetMachine *TM);
BasicBlockPass *createNVPTXLowerAllocaPass();
MachineFunctionPass *createNVPTXPeephole();
extern Target TheNVPTXTarget32;
extern Target TheNVPTXTarget64;
Target &getTheNVPTXTarget32();
Target &getTheNVPTXTarget64();
namespace NVPTX {
enum DrvInterface {

4
llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
View File

@ -2380,6 +2380,6 @@ std::string LineReader::readLine(unsigned lineNum) {
// Force static initialization.
extern "C" void LLVMInitializeNVPTXAsmPrinter() {
RegisterAsmPrinter<NVPTXAsmPrinter> X(TheNVPTXTarget32);
RegisterAsmPrinter<NVPTXAsmPrinter> Y(TheNVPTXTarget64);
RegisterAsmPrinter<NVPTXAsmPrinter> X(getTheNVPTXTarget32());
RegisterAsmPrinter<NVPTXAsmPrinter> Y(getTheNVPTXTarget64());
}

4
llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp
View File

@ -76,8 +76,8 @@ void initializeNVPTXLowerAllocaPass(PassRegistry &);
extern "C" void LLVMInitializeNVPTXTarget() {
// Register the target.
RegisterTargetMachine<NVPTXTargetMachine32> X(TheNVPTXTarget32);
RegisterTargetMachine<NVPTXTargetMachine64> Y(TheNVPTXTarget64);
RegisterTargetMachine<NVPTXTargetMachine32> X(getTheNVPTXTarget32());
RegisterTargetMachine<NVPTXTargetMachine64> Y(getTheNVPTXTarget64());
// FIXME: This pass is really intended to be invoked during IR optimization,
// but it's very NVPTX-specific.

14
llvm/lib/Target/NVPTX/TargetInfo/NVPTXTargetInfo.cpp
View File

@ -12,12 +12,18 @@
#include "llvm/Support/TargetRegistry.h"
using namespace llvm;
Target llvm::TheNVPTXTarget32;
Target llvm::TheNVPTXTarget64;
Target &llvm::getTheNVPTXTarget32() {
static Target TheNVPTXTarget32;
return TheNVPTXTarget32;
}
Target &llvm::getTheNVPTXTarget64() {
static Target TheNVPTXTarget64;
return TheNVPTXTarget64;
}
extern "C" void LLVMInitializeNVPTXTargetInfo() {
RegisterTarget<Triple::nvptx> X(TheNVPTXTarget32, "nvptx",
RegisterTarget<Triple::nvptx> X(getTheNVPTXTarget32(), "nvptx",
"NVIDIA PTX 32-bit");
RegisterTarget<Triple::nvptx64> Y(TheNVPTXTarget64, "nvptx64",
RegisterTarget<Triple::nvptx64> Y(getTheNVPTXTarget64(), "nvptx64",
"NVIDIA PTX 64-bit");
}

6
llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp
View File

@ -1980,9 +1980,9 @@ bool PPCAsmParser::ParseDirectiveLocalEntry(SMLoc L) {
/// Force static initialization.
extern "C" void LLVMInitializePowerPCAsmParser() {
RegisterMCAsmParser<PPCAsmParser> A(ThePPC32Target);
RegisterMCAsmParser<PPCAsmParser> B(ThePPC64Target);
RegisterMCAsmParser<PPCAsmParser> C(ThePPC64LETarget);
RegisterMCAsmParser<PPCAsmParser> A(getThePPC32Target());
RegisterMCAsmParser<PPCAsmParser> B(getThePPC64Target());
RegisterMCAsmParser<PPCAsmParser> C(getThePPC64LETarget());
}
#define GET_REGISTER_MATCHER

6
llvm/lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp
View File

@ -51,11 +51,11 @@ static MCDisassembler *createPPCLEDisassembler(const Target &T,
extern "C" void LLVMInitializePowerPCDisassembler() {
// Register the disassembler for each target.
TargetRegistry::RegisterMCDisassembler(ThePPC32Target,
TargetRegistry::RegisterMCDisassembler(getThePPC32Target(),
createPPCDisassembler);
TargetRegistry::RegisterMCDisassembler(ThePPC64Target,
TargetRegistry::RegisterMCDisassembler(getThePPC64Target(),
createPPCDisassembler);
TargetRegistry::RegisterMCDisassembler(ThePPC64LETarget,
TargetRegistry::RegisterMCDisassembler(getThePPC64LETarget(),
createPPCLEDisassembler);
}

3
llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp
View File

@ -228,7 +228,8 @@ static MCInstPrinter *createPPCMCInstPrinter(const Triple &T,
}
extern "C" void LLVMInitializePowerPCTargetMC() {
for (Target *T : {&ThePPC32Target, &ThePPC64Target, &ThePPC64LETarget}) {
for (Target *T :
{&getThePPC32Target(), &getThePPC64Target(), &getThePPC64LETarget()}) {
// Register the MC asm info.
RegisterMCAsmInfoFn C(*T, createPPCMCAsmInfo);

6
llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.h
View File

@ -35,9 +35,9 @@ class StringRef;
class raw_pwrite_stream;
class raw_ostream;
extern Target ThePPC32Target;
extern Target ThePPC64Target;
extern Target ThePPC64LETarget;
Target &getThePPC32Target();
Target &getThePPC64Target();
Target &getThePPC64LETarget();
MCCodeEmitter *createPPCMCCodeEmitter(const MCInstrInfo &MCII,
const MCRegisterInfo &MRI,

9
llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
View File

@ -1447,7 +1447,10 @@ createPPCAsmPrinterPass(TargetMachine &tm,
// Force static initialization.
extern "C" void LLVMInitializePowerPCAsmPrinter() {
TargetRegistry::RegisterAsmPrinter(ThePPC32Target, createPPCAsmPrinterPass);
TargetRegistry::RegisterAsmPrinter(ThePPC64Target, createPPCAsmPrinterPass);
TargetRegistry::RegisterAsmPrinter(ThePPC64LETarget, createPPCAsmPrinterPass);
TargetRegistry::RegisterAsmPrinter(getThePPC32Target(),
createPPCAsmPrinterPass);
TargetRegistry::RegisterAsmPrinter(getThePPC64Target(),
createPPCAsmPrinterPass);
TargetRegistry::RegisterAsmPrinter(getThePPC64LETarget(),
createPPCAsmPrinterPass);
}

6
llvm/lib/Target/PowerPC/PPCTargetMachine.cpp
View File

@ -74,9 +74,9 @@ EnableMachineCombinerPass("ppc-machine-combiner",
extern "C" void LLVMInitializePowerPCTarget() {
// Register the targets
RegisterTargetMachine<PPC32TargetMachine> A(ThePPC32Target);
RegisterTargetMachine<PPC64TargetMachine> B(ThePPC64Target);
RegisterTargetMachine<PPC64TargetMachine> C(ThePPC64LETarget);
RegisterTargetMachine<PPC32TargetMachine> A(getThePPC32Target());
RegisterTargetMachine<PPC64TargetMachine> B(getThePPC64Target());
RegisterTargetMachine<PPC64TargetMachine> C(getThePPC64LETarget());
PassRegistry &PR = *PassRegistry::getPassRegistry();
initializePPCBoolRetToIntPass(PR);

25
llvm/lib/Target/PowerPC/TargetInfo/PowerPCTargetInfo.cpp
View File

@ -12,15 +12,26 @@
#include "llvm/Support/TargetRegistry.h"
using namespace llvm;
Target llvm::ThePPC32Target, llvm::ThePPC64Target, llvm::ThePPC64LETarget;
Target &llvm::getThePPC32Target() {
static Target ThePPC32Target;
return ThePPC32Target;
}
Target &llvm::getThePPC64Target() {
static Target ThePPC64Target;
return ThePPC64Target;
}
Target &llvm::getThePPC64LETarget() {
static Target ThePPC64LETarget;
return ThePPC64LETarget;
}
extern "C" void LLVMInitializePowerPCTargetInfo() {
RegisterTarget<Triple::ppc, /*HasJIT=*/true>
X(ThePPC32Target, "ppc32", "PowerPC 32");
RegisterTarget<Triple::ppc, /*HasJIT=*/true> X(getThePPC32Target(), "ppc32",
"PowerPC 32");
RegisterTarget<Triple::ppc64, /*HasJIT=*/true>
Y(ThePPC64Target, "ppc64", "PowerPC 64");
RegisterTarget<Triple::ppc64, /*HasJIT=*/true> Y(getThePPC64Target(), "ppc64",
"PowerPC 64");
RegisterTarget<Triple::ppc64le, /*HasJIT=*/true>
Z(ThePPC64LETarget, "ppc64le", "PowerPC 64 LE");
RegisterTarget<Triple::ppc64le, /*HasJIT=*/true> Z(
getThePPC64LETarget(), "ppc64le", "PowerPC 64 LE");
}

6
llvm/lib/Target/Sparc/AsmParser/SparcAsmParser.cpp
View File

@ -1263,9 +1263,9 @@ bool SparcAsmParser::matchSparcAsmModifiers(const MCExpr *&EVal,
}
extern "C" void LLVMInitializeSparcAsmParser() {
RegisterMCAsmParser<SparcAsmParser> A(TheSparcTarget);
RegisterMCAsmParser<SparcAsmParser> B(TheSparcV9Target);
RegisterMCAsmParser<SparcAsmParser> C(TheSparcelTarget);
RegisterMCAsmParser<SparcAsmParser> A(getTheSparcTarget());
RegisterMCAsmParser<SparcAsmParser> B(getTheSparcV9Target());
RegisterMCAsmParser<SparcAsmParser> C(getTheSparcelTarget());
}
#define GET_REGISTER_MATCHER

10
llvm/lib/Target/Sparc/Disassembler/SparcDisassembler.cpp
View File

@ -44,7 +44,9 @@ public:
}
namespace llvm {
extern Target TheSparcTarget, TheSparcV9Target, TheSparcelTarget;
Target &getTheSparcTarget();
Target &getTheSparcV9Target();
Target &getTheSparcelTarget();
}
static MCDisassembler *createSparcDisassembler(const Target &T,
@ -56,11 +58,11 @@ static MCDisassembler *createSparcDisassembler(const Target &T,
extern "C" void LLVMInitializeSparcDisassembler() {
// Register the disassembler.
TargetRegistry::RegisterMCDisassembler(TheSparcTarget,
TargetRegistry::RegisterMCDisassembler(getTheSparcTarget(),
createSparcDisassembler);
TargetRegistry::RegisterMCDisassembler(TheSparcV9Target,
TargetRegistry::RegisterMCDisassembler(getTheSparcV9Target(),
createSparcDisassembler);
TargetRegistry::RegisterMCDisassembler(TheSparcelTarget,
TargetRegistry::RegisterMCDisassembler(getTheSparcelTarget(),
createSparcDisassembler);
}

15
llvm/lib/Target/Sparc/MCTargetDesc/SparcMCTargetDesc.cpp
View File

@ -128,11 +128,12 @@ static MCInstPrinter *createSparcMCInstPrinter(const Triple &T,
extern "C" void LLVMInitializeSparcTargetMC() {
// Register the MC asm info.
RegisterMCAsmInfoFn X(TheSparcTarget, createSparcMCAsmInfo);
RegisterMCAsmInfoFn Y(TheSparcV9Target, createSparcV9MCAsmInfo);
RegisterMCAsmInfoFn Z(TheSparcelTarget, createSparcMCAsmInfo);
RegisterMCAsmInfoFn X(getTheSparcTarget(), createSparcMCAsmInfo);
RegisterMCAsmInfoFn Y(getTheSparcV9Target(), createSparcV9MCAsmInfo);
RegisterMCAsmInfoFn Z(getTheSparcelTarget(), createSparcMCAsmInfo);
for (Target *T : {&TheSparcTarget, &TheSparcV9Target, &TheSparcelTarget}) {
for (Target *T :
{&getTheSparcTarget(), &getTheSparcV9Target(), &getTheSparcelTarget()}) {
// Register the MC instruction info.
TargetRegistry::RegisterMCInstrInfo(*T, createSparcMCInstrInfo);
@ -160,10 +161,10 @@ extern "C" void LLVMInitializeSparcTargetMC() {
}
// Register the MC codegen info.
TargetRegistry::registerMCAdjustCodeGenOpts(TheSparcTarget,
TargetRegistry::registerMCAdjustCodeGenOpts(getTheSparcTarget(),
adjustCodeGenOpts);
TargetRegistry::registerMCAdjustCodeGenOpts(TheSparcV9Target,
TargetRegistry::registerMCAdjustCodeGenOpts(getTheSparcV9Target(),
adjustCodeGenOptsV9);
TargetRegistry::registerMCAdjustCodeGenOpts(TheSparcelTarget,
TargetRegistry::registerMCAdjustCodeGenOpts(getTheSparcelTarget(),
adjustCodeGenOpts);
}

6
llvm/lib/Target/Sparc/MCTargetDesc/SparcMCTargetDesc.h
View File

@ -31,9 +31,9 @@ class StringRef;
class raw_pwrite_stream;
class raw_ostream;
extern Target TheSparcTarget;
extern Target TheSparcV9Target;
extern Target TheSparcelTarget;
Target &getTheSparcTarget();
Target &getTheSparcV9Target();
Target &getTheSparcelTarget();
MCCodeEmitter *createSparcMCCodeEmitter(const MCInstrInfo &MCII,
const MCRegisterInfo &MRI,

6
llvm/lib/Target/Sparc/SparcAsmPrinter.cpp
View File

@ -443,7 +443,7 @@ bool SparcAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI,
// Force static initialization.
extern "C" void LLVMInitializeSparcAsmPrinter() {
RegisterAsmPrinter<SparcAsmPrinter> X(TheSparcTarget);
RegisterAsmPrinter<SparcAsmPrinter> Y(TheSparcV9Target);
RegisterAsmPrinter<SparcAsmPrinter> Z(TheSparcelTarget);
RegisterAsmPrinter<SparcAsmPrinter> X(getTheSparcTarget());
RegisterAsmPrinter<SparcAsmPrinter> Y(getTheSparcV9Target());
RegisterAsmPrinter<SparcAsmPrinter> Z(getTheSparcelTarget());
}

6
llvm/lib/Target/Sparc/SparcTargetMachine.cpp
View File

@ -22,9 +22,9 @@ using namespace llvm;
extern "C" void LLVMInitializeSparcTarget() {
// Register the target.
RegisterTargetMachine<SparcV8TargetMachine> X(TheSparcTarget);
RegisterTargetMachine<SparcV9TargetMachine> Y(TheSparcV9Target);
RegisterTargetMachine<SparcelTargetMachine> Z(TheSparcelTarget);
RegisterTargetMachine<SparcV8TargetMachine> X(getTheSparcTarget());
RegisterTargetMachine<SparcV9TargetMachine> Y(getTheSparcV9Target());
RegisterTargetMachine<SparcelTargetMachine> Z(getTheSparcelTarget());
}
static std::string computeDataLayout(const Triple &T, bool is64Bit) {

21
llvm/lib/Target/Sparc/TargetInfo/SparcTargetInfo.cpp
View File

@ -12,15 +12,24 @@
#include "llvm/Support/TargetRegistry.h"
using namespace llvm;
Target llvm::TheSparcTarget;
Target llvm::TheSparcV9Target;
Target llvm::TheSparcelTarget;
Target &llvm::getTheSparcTarget() {
static Target TheSparcTarget;
return TheSparcTarget;
}
Target &llvm::getTheSparcV9Target() {
static Target TheSparcV9Target;
return TheSparcV9Target;
}
Target &llvm::getTheSparcelTarget() {
static Target TheSparcelTarget;
return TheSparcelTarget;
}
extern "C" void LLVMInitializeSparcTargetInfo() {
RegisterTarget<Triple::sparc, /*HasJIT=*/true> X(TheSparcTarget, "sparc",
RegisterTarget<Triple::sparc, /*HasJIT=*/true> X(getTheSparcTarget(), "sparc",
"Sparc");
RegisterTarget<Triple::sparcv9, /*HasJIT=*/true> Y(TheSparcV9Target,
RegisterTarget<Triple::sparcv9, /*HasJIT=*/true> Y(getTheSparcV9Target(),
"sparcv9", "Sparc V9");
RegisterTarget<Triple::sparcel, /*HasJIT=*/true> Z(TheSparcelTarget,
RegisterTarget<Triple::sparcel, /*HasJIT=*/true> Z(getTheSparcelTarget(),
"sparcel", "Sparc LE");
}

2
llvm/lib/Target/SystemZ/AsmParser/SystemZAsmParser.cpp
View File

@ -1171,5 +1171,5 @@ SystemZAsmParser::parsePCRel(OperandVector &Operands, int64_t MinVal,
// Force static initialization.
extern "C" void LLVMInitializeSystemZAsmParser() {
RegisterMCAsmParser<SystemZAsmParser> X(TheSystemZTarget);
RegisterMCAsmParser<SystemZAsmParser> X(getTheSystemZTarget());
}

2
llvm/lib/Target/SystemZ/Disassembler/SystemZDisassembler.cpp
View File

@ -42,7 +42,7 @@ static MCDisassembler *createSystemZDisassembler(const Target &T,
extern "C" void LLVMInitializeSystemZDisassembler() {
// Register the disassembler.
TargetRegistry::RegisterMCDisassembler(TheSystemZTarget,
TargetRegistry::RegisterMCDisassembler(getTheSystemZTarget(),
createSystemZDisassembler);
}

16
llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCTargetDesc.cpp
View File

@ -205,34 +205,34 @@ static MCInstPrinter *createSystemZMCInstPrinter(const Triple &T,
extern "C" void LLVMInitializeSystemZTargetMC() {
// Register the MCAsmInfo.
TargetRegistry::RegisterMCAsmInfo(TheSystemZTarget,
TargetRegistry::RegisterMCAsmInfo(getTheSystemZTarget(),
createSystemZMCAsmInfo);
// Register the adjustCodeGenOpts.
TargetRegistry::registerMCAdjustCodeGenOpts(TheSystemZTarget,
TargetRegistry::registerMCAdjustCodeGenOpts(getTheSystemZTarget(),
adjustCodeGenOpts);
// Register the MCCodeEmitter.
TargetRegistry::RegisterMCCodeEmitter(TheSystemZTarget,
TargetRegistry::RegisterMCCodeEmitter(getTheSystemZTarget(),
createSystemZMCCodeEmitter);
// Register the MCInstrInfo.
TargetRegistry::RegisterMCInstrInfo(TheSystemZTarget,
TargetRegistry::RegisterMCInstrInfo(getTheSystemZTarget(),
createSystemZMCInstrInfo);
// Register the MCRegisterInfo.
TargetRegistry::RegisterMCRegInfo(TheSystemZTarget,
TargetRegistry::RegisterMCRegInfo(getTheSystemZTarget(),
createSystemZMCRegisterInfo);
// Register the MCSubtargetInfo.
TargetRegistry::RegisterMCSubtargetInfo(TheSystemZTarget,
TargetRegistry::RegisterMCSubtargetInfo(getTheSystemZTarget(),
createSystemZMCSubtargetInfo);
// Register the MCAsmBackend.
TargetRegistry::RegisterMCAsmBackend(TheSystemZTarget,
TargetRegistry::RegisterMCAsmBackend(getTheSystemZTarget(),
createSystemZMCAsmBackend);
// Register the MCInstPrinter.
TargetRegistry::RegisterMCInstPrinter(TheSystemZTarget,
TargetRegistry::RegisterMCInstPrinter(getTheSystemZTarget(),
createSystemZMCInstPrinter);
}

2
llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCTargetDesc.h
View File

@ -28,7 +28,7 @@ class Triple;
class raw_pwrite_stream;
class raw_ostream;
extern Target TheSystemZTarget;
Target &getTheSystemZTarget();
namespace SystemZMC {
// How many bytes are in the ABI-defined, caller-allocated part of

2
llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp
View File

@ -523,5 +523,5 @@ bool SystemZAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI,
// Force static initialization.
extern "C" void LLVMInitializeSystemZAsmPrinter() {
RegisterAsmPrinter<SystemZAsmPrinter> X(TheSystemZTarget);
RegisterAsmPrinter<SystemZAsmPrinter> X(getTheSystemZTarget());
}

2
llvm/lib/Target/SystemZ/SystemZTargetMachine.cpp
View File

@ -20,7 +20,7 @@ using namespace llvm;
extern cl::opt<bool> MISchedPostRA;
extern "C" void LLVMInitializeSystemZTarget() {
// Register the target.
RegisterTargetMachine<SystemZTargetMachine> X(TheSystemZTarget);
RegisterTargetMachine<SystemZTargetMachine> X(getTheSystemZTarget());
}
// Determine whether we use the vector ABI.

9
llvm/lib/Target/SystemZ/TargetInfo/SystemZTargetInfo.cpp
View File

@ -12,9 +12,12 @@
using namespace llvm;
Target llvm::TheSystemZTarget;
Target &llvm::getTheSystemZTarget() {
static Target TheSystemZTarget;
return TheSystemZTarget;
}
extern "C" void LLVMInitializeSystemZTargetInfo() {
RegisterTarget<Triple::systemz, /*HasJIT=*/true>
X(TheSystemZTarget, "systemz", "SystemZ");
RegisterTarget<Triple::systemz, /*HasJIT=*/true> X(getTheSystemZTarget(),
"systemz", "SystemZ");
}

4
llvm/lib/Target/WebAssembly/Disassembler/WebAssemblyDisassembler.cpp
View File

@ -54,9 +54,9 @@ static MCDisassembler *createWebAssemblyDisassembler(const Target &T,
extern "C" void LLVMInitializeWebAssemblyDisassembler() {
// Register the disassembler for each target.
TargetRegistry::RegisterMCDisassembler(TheWebAssemblyTarget32,
TargetRegistry::RegisterMCDisassembler(getTheWebAssemblyTarget32(),
createWebAssemblyDisassembler);
TargetRegistry::RegisterMCDisassembler(TheWebAssemblyTarget64,
TargetRegistry::RegisterMCDisassembler(getTheWebAssemblyTarget64(),
createWebAssemblyDisassembler);
}

3
llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.cpp
View File

@ -101,7 +101,8 @@ static MCTargetStreamer *createAsmTargetStreamer(MCStreamer &S,
// Force static initialization.
extern "C" void LLVMInitializeWebAssemblyTargetMC() {
for (Target *T : {&TheWebAssemblyTarget32, &TheWebAssemblyTarget64}) {
for (Target *T :
{&getTheWebAssemblyTarget32(), &getTheWebAssemblyTarget64()}) {
// Register the MC asm info.
RegisterMCAsmInfoFn X(*T, createMCAsmInfo);

4
llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.h
View File

@ -30,8 +30,8 @@ class Target;
class Triple;
class raw_pwrite_stream;
extern Target TheWebAssemblyTarget32;
extern Target TheWebAssemblyTarget64;
Target &getTheWebAssemblyTarget32();
Target &getTheWebAssemblyTarget64();
MCCodeEmitter *createWebAssemblyMCCodeEmitter(const MCInstrInfo &MCII);

8
llvm/lib/Target/WebAssembly/TargetInfo/WebAssemblyTargetInfo.cpp
View File

@ -19,12 +19,12 @@ using namespace llvm;
#define DEBUG_TYPE "wasm-target-info"
Target llvm::TheWebAssemblyTarget32;
Target llvm::TheWebAssemblyTarget64;
Target llvm::getTheWebAssemblyTarget32();
Target llvm::getTheWebAssemblyTarget64();
extern "C" void LLVMInitializeWebAssemblyTargetInfo() {
RegisterTarget<Triple::wasm32> X(TheWebAssemblyTarget32, "wasm32",
RegisterTarget<Triple::wasm32> X(getTheWebAssemblyTarget32(), "wasm32",
"WebAssembly 32-bit");
RegisterTarget<Triple::wasm64> Y(TheWebAssemblyTarget64, "wasm64",
RegisterTarget<Triple::wasm64> Y(getTheWebAssemblyTarget64(), "wasm64",
"WebAssembly 64-bit");
}

4
llvm/lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp
View File

@ -313,6 +313,6 @@ bool WebAssemblyAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI,
// Force static initialization.
extern "C" void LLVMInitializeWebAssemblyAsmPrinter() {
RegisterAsmPrinter<WebAssemblyAsmPrinter> X(TheWebAssemblyTarget32);
RegisterAsmPrinter<WebAssemblyAsmPrinter> Y(TheWebAssemblyTarget64);
RegisterAsmPrinter<WebAssemblyAsmPrinter> X(getTheWebAssemblyTarget32());
RegisterAsmPrinter<WebAssemblyAsmPrinter> Y(getTheWebAssemblyTarget64());
}

6
llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
View File

@ -43,8 +43,10 @@ static cl::opt<bool> EnableEmSjLj(
extern "C" void LLVMInitializeWebAssemblyTarget() {
// Register the target.
RegisterTargetMachine<WebAssemblyTargetMachine> X(TheWebAssemblyTarget32);
RegisterTargetMachine<WebAssemblyTargetMachine> Y(TheWebAssemblyTarget64);
RegisterTargetMachine<WebAssemblyTargetMachine> X(
getTheWebAssemblyTarget32());
RegisterTargetMachine<WebAssemblyTargetMachine> Y(
getTheWebAssemblyTarget64());
// Register exception handling pass to opt
initializeWebAssemblyLowerEmscriptenEHSjLjPass(

4
llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
View File

@ -3065,8 +3065,8 @@ bool X86AsmParser::ParseDirectiveCode(StringRef IDVal, SMLoc L) {
// Force static initialization.
extern "C" void LLVMInitializeX86AsmParser() {
RegisterMCAsmParser<X86AsmParser> X(TheX86_32Target);
RegisterMCAsmParser<X86AsmParser> Y(TheX86_64Target);
RegisterMCAsmParser<X86AsmParser> X(getTheX86_32Target());
RegisterMCAsmParser<X86AsmParser> Y(getTheX86_64Target());
}
#define GET_REGISTER_MATCHER

4
llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp
View File

@ -1066,8 +1066,8 @@ static MCDisassembler *createX86Disassembler(const Target &T,
extern "C" void LLVMInitializeX86Disassembler() {
// Register the disassembler.
TargetRegistry::RegisterMCDisassembler(TheX86_32Target,
TargetRegistry::RegisterMCDisassembler(getTheX86_32Target(),
createX86Disassembler);
TargetRegistry::RegisterMCDisassembler(TheX86_64Target,
TargetRegistry::RegisterMCDisassembler(getTheX86_64Target(),
createX86Disassembler);
}

6
llvm/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp
View File

@ -234,7 +234,7 @@ static MCInstrAnalysis *createX86MCInstrAnalysis(const MCInstrInfo *Info) {
// Force static initialization.
extern "C" void LLVMInitializeX86TargetMC() {
for (Target *T : {&TheX86_32Target, &TheX86_64Target}) {
for (Target *T : {&getTheX86_32Target(), &getTheX86_64Target()}) {
// Register the MC asm info.
RegisterMCAsmInfoFn X(*T, createX86MCAsmInfo);
@ -268,9 +268,9 @@ extern "C" void LLVMInitializeX86TargetMC() {
}
// Register the asm backend.
TargetRegistry::RegisterMCAsmBackend(TheX86_32Target,
TargetRegistry::RegisterMCAsmBackend(getTheX86_32Target(),
createX86_32AsmBackend);
TargetRegistry::RegisterMCAsmBackend(TheX86_64Target,
TargetRegistry::RegisterMCAsmBackend(getTheX86_64Target(),
createX86_64AsmBackend);
}

3
llvm/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.h
View File

@ -34,7 +34,8 @@ class StringRef;
class raw_ostream;
class raw_pwrite_stream;
extern Target TheX86_32Target, TheX86_64Target;
Target &getTheX86_32Target();
Target &getTheX86_64Target();
/// Flavour of dwarf regnumbers
///

17
llvm/lib/Target/X86/TargetInfo/X86TargetInfo.cpp
View File

@ -11,12 +11,19 @@
#include "llvm/Support/TargetRegistry.h"
using namespace llvm;
Target llvm::TheX86_32Target, llvm::TheX86_64Target;
Target &llvm::getTheX86_32Target() {
static Target TheX86_32Target;
return TheX86_32Target;
}
Target &llvm::getTheX86_64Target() {
static Target TheX86_64Target;
return TheX86_64Target;
}
extern "C" void LLVMInitializeX86TargetInfo() {
RegisterTarget<Triple::x86, /*HasJIT=*/true>
X(TheX86_32Target, "x86", "32-bit X86: Pentium-Pro and above");
RegisterTarget<Triple::x86, /*HasJIT=*/true> X(
getTheX86_32Target(), "x86", "32-bit X86: Pentium-Pro and above");
RegisterTarget<Triple::x86_64, /*HasJIT=*/true>
Y(TheX86_64Target, "x86-64", "64-bit X86: EM64T and AMD64");
RegisterTarget<Triple::x86_64, /*HasJIT=*/true> Y(
getTheX86_64Target(), "x86-64", "64-bit X86: EM64T and AMD64");
}

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