forked from OSchip/llvm-project
AMDGPU/SI: Don't use fixup_si_rodata for scratch rsrc relocations
Summary: We need to set the fixup type to FK_Data_4 for the SCRATCH_RSRC_DWORD[01] symbols, since these require absolute relocations, and fixup_si_rodata is for relative relocations. Reviewers: arsenm, kzhuravl Subscribers: arsenm, kzhuravl, llvm-commits Differential Revision: http://reviews.llvm.org/D21153 llvm-svn: 272417
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@ -75,6 +75,7 @@ void AMDGPUMCInstLower::lower(const MachineInstr *MI, MCInst &OutMI) const {
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}
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case MachineOperand::MO_ExternalSymbol: {
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MCSymbol *Sym = Ctx.getOrCreateSymbol(StringRef(MO.getSymbolName()));
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Sym->setExternal(true);
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const MCSymbolRefExpr *Expr = MCSymbolRefExpr::create(Sym, Ctx);
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MCOp = MCOperand::createExpr(Expr);
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break;
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@ -249,7 +249,12 @@ uint64_t SIMCCodeEmitter::getMachineOpValue(const MCInst &MI,
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if (MO.isExpr()) {
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const MCSymbolRefExpr *Expr = cast<MCSymbolRefExpr>(MO.getExpr());
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MCFixupKind Kind = (MCFixupKind)AMDGPU::fixup_si_rodata;
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const MCSymbol &Sym = Expr->getSymbol();
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MCFixupKind Kind;
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if (Sym.isExternal())
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Kind = FK_Data_4;
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else
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Kind = (MCFixupKind)AMDGPU::fixup_si_rodata;
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Fixups.push_back(MCFixup::create(4, Expr, Kind, MI.getLoc()));
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}
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@ -1,5 +1,5 @@
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; RUN: llc -march=amdgcn -mcpu=bonaire < %s | FileCheck -check-prefix=GCN -check-prefix=CI -check-prefix=ALL %s
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; RUN: llc -march=amdgcn -mcpu=carrizo < %s | FileCheck -check-prefix=GCN -check-prefix=VI -check-prefix=ALL %s
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; RUN: llc -march=amdgcn -mcpu=bonaire -show-mc-encoding < %s | FileCheck -check-prefix=GCN -check-prefix=CI -check-prefix=ALL %s
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; RUN: llc -march=amdgcn -mcpu=carrizo --show-mc-encoding < %s | FileCheck -check-prefix=GCN -check-prefix=VI -check-prefix=ALL %s
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; RUN: llc -march=amdgcn -mcpu=bonaire -mtriple=amdgcn-unknown-amdhsa < %s -mattr=-flat-for-global | FileCheck -check-prefix=GCNHSA -check-prefix=CIHSA -check-prefix=ALL %s
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; RUN: llc -march=amdgcn -mcpu=carrizo -mtriple=amdgcn-unknown-amdhsa -mattr=-flat-for-global < %s | FileCheck -check-prefix=GCNHSA -check-prefix=VIHSA -check-prefix=ALL %s
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@ -8,7 +8,9 @@
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; ALL-LABEL: {{^}}large_alloca_compute_shader:
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; GCN-DAG: s_mov_b32 s{{[0-9]+}}, SCRATCH_RSRC_DWORD0
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; GCN-DAG: ; fixup A - offset: 4, value: SCRATCH_RSRC_DWORD0, kind: FK_Data_4
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; GCN-DAG: s_mov_b32 s{{[0-9]+}}, SCRATCH_RSRC_DWORD1
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; GCN-DAG: ; fixup A - offset: 4, value: SCRATCH_RSRC_DWORD1, kind: FK_Data_4
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; GCN-DAG: s_mov_b32 s{{[0-9]+}}, -1
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; CI-DAG: s_mov_b32 s{{[0-9]+}}, 0x88f000
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; VI-DAG: s_mov_b32 s{{[0-9]+}}, 0x880000
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