[X86][AMX] Report error when shapes are not pre-defined.

Instead of report fatal error, this patch emit error message and exit
when shapes are not pre-defined. This would cause the compiling fail but
not crash.

Differential Revision: https://reviews.llvm.org/D124342
This commit is contained in:
Luo, Yuanke 2022-04-24 16:31:43 +08:00
parent a83f4b9cda
commit f3ad7ea03a
3 changed files with 40 additions and 8 deletions

View File

@ -31,6 +31,7 @@
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/CodeGen/MachineLoopInfo.h"
#include "llvm/CodeGen/MachineModuleInfo.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/Passes.h"
#include "llvm/CodeGen/TargetInstrInfo.h"
@ -40,10 +41,15 @@
using namespace llvm;
#define DEBUG_TYPE "tile-pre-config"
#define REPORT_CONFIG_FAIL \
report_fatal_error( \
MF.getName() + \
": Failed to config tile register, please define the shape earlier");
static void emitErrorMsg(MachineFunction &MF) {
SmallString<32> Str;
Twine ErrorMsg =
MF.getName() +
": Failed to config tile register, please define the shape earlier";
LLVMContext &Context = MF.getMMI().getModule()->getContext();
Context.emitError(ErrorMsg);
}
namespace {
@ -302,12 +308,19 @@ bool X86PreTileConfig::runOnMachineFunction(MachineFunction &MF) {
SmallVector<MachineBasicBlock *, 8> WorkList;
for (auto &I : ShapeBBs) {
// TODO: We can hoist shapes across BBs here.
if (BBVisitedInfo[I.first].HasAMXRegLiveIn)
REPORT_CONFIG_FAIL
if (BBVisitedInfo[I.first].HasAMXRegLiveIn) {
// We are not able to config tile registers since the shape to config
// is not defined yet. Emit error message and continue. The function
// would not config tile registers.
emitErrorMsg(MF);
return false;
}
if (BBVisitedInfo[I.first].FirstAMX &&
BBVisitedInfo[I.first].FirstAMX < I.second.back() &&
!hoistShapesInBB(I.first, I.second))
REPORT_CONFIG_FAIL
!hoistShapesInBB(I.first, I.second)) {
emitErrorMsg(MF);
return false;
}
WorkList.push_back(I.first);
}
while (!WorkList.empty()) {

View File

@ -98,6 +98,9 @@ bool X86TileConfig::runOnMachineFunction(MachineFunction &MF) {
if (SS != INT_MAX)
break;
}
// Didn't find LDTILECFG, just return false;
if (SS == INT_MAX)
return false;
// Try to find a point to insert MIs for constant shapes.
// Here we are leveraging the palette id inserted in PreRA pass.

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@ -0,0 +1,16 @@
; RUN: not llc < %s -mtriple=x86_64-unknown-unknown -mattr=+amx-tile -o /dev/null 2>&1 | FileCheck %s
@row = dso_local global i16 8, align 2
@col = dso_local global i16 8, align 2
define dso_local void @add() {
entry:
; CHECK: Failed to config tile register
%t0 = load i16, ptr @row, align 2
%t1 = call x86_amx @llvm.x86.tilezero.internal(i16 %t0, i16 64)
%t2 = load i16, ptr @col, align 2
%t3 = call x86_amx @llvm.x86.tilezero.internal(i16 16, i16 %t2)
ret void
}
declare x86_amx @llvm.x86.tilezero.internal(i16, i16)