forked from OSchip/llvm-project
AMDGPU: Change API for checking for exec modification
Invert the name and return value to better reflect the imprecise nature. Force passing in the DefMI, since it's known in the 2 users and could possibly fail for an arbitrary vreg. Allow specifying a specific user instruction. Scan through use instructions, instead of use operands. Add scan thresholds instead of searching infinitely. Stop using a set to track seen uses. I didn't understand this usage, or why it would not check the last use. I don't think the use list has any particular order. llvm-svn: 363675
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@ -331,7 +331,7 @@ bool GCNDPPCombine::combineDPPMov(MachineInstr &MovMI) const {
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auto *DstOpnd = TII->getNamedOperand(MovMI, AMDGPU::OpName::vdst);
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assert(DstOpnd && DstOpnd->isReg());
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auto DPPMovReg = DstOpnd->getReg();
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if (!isEXECMaskConstantBetweenDefAndUses(DPPMovReg, *MRI)) {
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if (execMayBeModifiedBeforeUse(*MRI, DPPMovReg, MovMI)) {
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LLVM_DEBUG(dbgs() << " failed: EXEC mask should remain the same"
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" for all uses\n");
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return false;
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@ -516,8 +516,10 @@ void SIFoldOperands::foldOperand(
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// =>
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// %sgpr = S_MOV_B32 imm
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if (FoldingImm) {
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if (!isEXECMaskConstantBetweenDefAndUses(
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UseMI->getOperand(UseOpIdx).getReg(), *MRI))
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if (execMayBeModifiedBeforeUse(*MRI,
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UseMI->getOperand(UseOpIdx).getReg(),
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*OpToFold.getParent(),
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UseMI))
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return;
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UseMI->setDesc(TII->get(AMDGPU::S_MOV_B32));
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@ -527,8 +529,10 @@ void SIFoldOperands::foldOperand(
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}
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if (OpToFold.isReg() && TRI->isSGPRReg(*MRI, OpToFold.getReg())) {
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if (!isEXECMaskConstantBetweenDefAndUses(
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UseMI->getOperand(UseOpIdx).getReg(), *MRI))
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if (execMayBeModifiedBeforeUse(*MRI,
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UseMI->getOperand(UseOpIdx).getReg(),
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*OpToFold.getParent(),
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UseMI))
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return;
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// %vgpr = COPY %sgpr0
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@ -6073,28 +6073,49 @@ MachineInstr *llvm::getVRegSubRegDef(const TargetInstrInfo::RegSubRegPair &P,
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return nullptr;
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}
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bool llvm::isEXECMaskConstantBetweenDefAndUses(unsigned VReg,
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const MachineRegisterInfo &MRI) {
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bool llvm::execMayBeModifiedBeforeUse(const MachineRegisterInfo &MRI,
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unsigned VReg,
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const MachineInstr &DefMI,
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const MachineInstr *UseMI) {
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assert(MRI.isSSA() && "Must be run on SSA");
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assert(DefMI.definesRegister(VReg) && "wrong def instruction");
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auto *TRI = MRI.getTargetRegisterInfo();
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auto *DefBB = DefMI.getParent();
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auto *DefI = MRI.getVRegDef(VReg);
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auto *BB = DefI->getParent();
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if (UseMI) {
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// Don't bother searching between blocks, although it is possible this block
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// doesn't modify exec.
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if (UseMI->getParent() != DefBB)
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return true;
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} else {
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int NumUse = 0;
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const int MaxUseScan = 10;
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DenseSet<MachineInstr*> Uses;
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for (auto &Use : MRI.use_nodbg_operands(VReg)) {
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auto *I = Use.getParent();
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if (I->getParent() != BB)
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return false;
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Uses.insert(I);
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for (auto &UseInst : MRI.use_nodbg_instructions(VReg)) {
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if (UseInst.getParent() != DefBB)
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return true;
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if (NumUse++ > MaxUseScan)
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return true;
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}
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}
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auto E = BB->end();
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for (auto I = std::next(DefI->getIterator()); I != E; ++I) {
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Uses.erase(&*I);
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// don't check the last use
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if (Uses.empty() || I->modifiesRegister(AMDGPU::EXEC, TRI))
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break;
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const int MaxInstScan = 20;
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int NumScan = 0;
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// Stop scan at the use if known.
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auto E = UseMI ? UseMI->getIterator() : DefBB->end();
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for (auto I = std::next(DefMI.getIterator()); I != E; ++I) {
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if (I->isDebugInstr())
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continue;
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if (NumScan++ > MaxInstScan)
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return true;
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if (I->modifiesRegister(AMDGPU::EXEC, TRI))
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return true;
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}
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return Uses.empty();
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return false;
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}
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@ -977,11 +977,14 @@ TargetInstrInfo::RegSubRegPair getRegSequenceSubReg(MachineInstr &MI,
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MachineInstr *getVRegSubRegDef(const TargetInstrInfo::RegSubRegPair &P,
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MachineRegisterInfo &MRI);
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/// \brief Return true if EXEC mask isnt' changed between the def and
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/// all uses of VReg. Currently if def and uses are in different BBs -
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/// simply return false. Should be run on SSA.
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bool isEXECMaskConstantBetweenDefAndUses(unsigned VReg,
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const MachineRegisterInfo &MRI);
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/// \brief Return false if EXEC is not changed between the def of \p VReg at \p
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/// DefMI and uses. If \p UseMI is not specified, this checks all uses of \p
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/// VReg. Should be run on SSA. Currently does not attempt to track between
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/// blocks.
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bool execMayBeModifiedBeforeUse(const MachineRegisterInfo &MRI,
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unsigned VReg,
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const MachineInstr &DefMI,
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const MachineInstr *UseMI = nullptr);
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namespace AMDGPU {
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