maxjhandsome
/
llvm-project
forked from OSchip/llvm-project
1
0
Fork 0
Code Issues Pull Requests Packages Releases Wiki Activity

[X86] When expanding LCMPXCHG16B_NO_RBX in EmitInstrWithCustomInserter, directly copy address operands instead of going through X86AddressMode. 

I suspect getAddressFromInstr and addFullAddress are not handling
all addresses cases properly based on a report from MaskRay.

So just copy the operands directly. This should be more efficient
anyway.
This commit is contained in:
Craig Topper 2020-10-09 11:48:10 -07:00
parent 662024df33
commit f34bb06935
1 changed files with 10 additions and 6 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

16
llvm/lib/Target/X86/X86ISelLowering.cpp
View File

@ -33765,7 +33765,6 @@ X86TargetLowering::EmitInstrWithCustomInserter(MachineInstr &MI,
case X86::LCMPXCHG16B_NO_RBX: { case X86::LCMPXCHG16B_NO_RBX: {
const X86RegisterInfo *TRI = Subtarget.getRegisterInfo(); const X86RegisterInfo *TRI = Subtarget.getRegisterInfo();
Register BasePtr = TRI->getBaseRegister(); Register BasePtr = TRI->getBaseRegister();
X86AddressMode AM = getAddressFromInstr(&MI, 0);
if (TRI->hasBasePointer(*MF) && if (TRI->hasBasePointer(*MF) &&
(BasePtr == X86::RBX || BasePtr == X86::EBX)) { (BasePtr == X86::RBX || BasePtr == X86::EBX)) {
if (!BB->isLiveIn(BasePtr)) if (!BB->isLiveIn(BasePtr))
@ -33776,15 +33775,20 @@ X86TargetLowering::EmitInstrWithCustomInserter(MachineInstr &MI,
BuildMI(*BB, MI, DL, TII->get(TargetOpcode::COPY), SaveRBX) BuildMI(*BB, MI, DL, TII->get(TargetOpcode::COPY), SaveRBX)
.addReg(X86::RBX); .addReg(X86::RBX);
Register Dst = MF->getRegInfo().createVirtualRegister(&X86::GR64RegClass); Register Dst = MF->getRegInfo().createVirtualRegister(&X86::GR64RegClass);
addFullAddress( MachineInstrBuilder MIB =
BuildMI(*BB, MI, DL, TII->get(X86::LCMPXCHG16B_SAVE_RBX), Dst), AM) BuildMI(*BB, MI, DL, TII->get(X86::LCMPXCHG16B_SAVE_RBX), Dst);
.add(MI.getOperand(X86::AddrNumOperands)) for (unsigned Idx = 0; Idx < X86::AddrNumOperands; ++Idx)
.addReg(SaveRBX); MIB.add(MI.getOperand(Idx));
MIB.add(MI.getOperand(X86::AddrNumOperands));
MIB.addReg(SaveRBX);
} else { } else {
// Simple case, just copy the virtual register to RBX. // Simple case, just copy the virtual register to RBX.
BuildMI(*BB, MI, DL, TII->get(TargetOpcode::COPY), X86::RBX) BuildMI(*BB, MI, DL, TII->get(TargetOpcode::COPY), X86::RBX)
.add(MI.getOperand(X86::AddrNumOperands)); .add(MI.getOperand(X86::AddrNumOperands));
addFullAddress(BuildMI(*BB, MI, DL, TII->get(X86::LCMPXCHG16B)), AM); MachineInstrBuilder MIB =
BuildMI(*BB, MI, DL, TII->get(X86::LCMPXCHG16B));
for (unsigned Idx = 0; Idx < X86::AddrNumOperands; ++Idx)
MIB.add(MI.getOperand(Idx));
} }
MI.eraseFromParent(); MI.eraseFromParent();
return BB; return BB;