forked from OSchip/llvm-project
R600/SI: Fix illegal VGPR->SGPR copy inside of loop
llvm-svn: 195026
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@ -188,8 +188,7 @@ bool SIFixSGPRCopies::isVGPRToSGPRCopy(const MachineInstr &Copy,
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return false;
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SrcRC = inferRegClassFromDef(TRI, MRI, SrcReg, SrcSubReg);
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return TRI->isSGPRClass(DstRC) &&
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!TRI->getCommonSubClass(DstRC, SrcRC);
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return TRI->isSGPRClass(DstRC) && TRI->hasVGPRs(SrcRC);
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}
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bool SIFixSGPRCopies::runOnMachineFunction(MachineFunction &MF) {
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@ -294,3 +294,34 @@ endif:
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store float %6, float addrspace(1)* %out
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ret void
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}
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; This test is just checking that we don't crash / assertion fail.
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; CHECK-LABEL: @copy2
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; CHECK: S_ENDPGM
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define void @copy2([17 x <16 x i8>] addrspace(2)* byval, [32 x <16 x i8>] addrspace(2)* byval, [16 x <32 x i8>] addrspace(2)* byval, float inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #0 {
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entry:
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br label %LOOP68
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LOOP68:
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%temp4.7 = phi float [ 0.000000e+00, %entry ], [ %v, %ENDIF69 ]
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%t = phi i32 [ 20, %entry ], [ %x, %ENDIF69 ]
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%g = icmp eq i32 0, %t
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%l = bitcast float %temp4.7 to i32
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br i1 %g, label %IF70, label %ENDIF69
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IF70:
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%q = icmp ne i32 %l, 13
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%temp.8 = select i1 %q, float 1.000000e+00, float 0.000000e+00
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call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 0, float %temp.8, float 0.000000e+00, float 0.000000e+00, float 1.000000e+00)
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ret void
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ENDIF69:
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%u = add i32 %l, %t
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%v = bitcast i32 %u to float
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%x = add i32 %t, -1
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br label %LOOP68
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}
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attributes #0 = { "ShaderType"="0" }
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