From f30ee8820a9dc7dcdb28928af1adfb993b83dd1a Mon Sep 17 00:00:00 2001
From: Evan Cheng <evan.cheng@apple.com>
Date: Fri, 3 Jul 2009 00:08:19 +0000
Subject: [PATCH] t2LDR_PRE etc are loads.

llvm-svn: 74741
---
 llvm/lib/Target/ARM/ARMInstrThumb2.td | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/llvm/lib/Target/ARM/ARMInstrThumb2.td b/llvm/lib/Target/ARM/ARMInstrThumb2.td
index 2b9c9d42f8c0..d8ce1b3f7a32 100644
--- a/llvm/lib/Target/ARM/ARMInstrThumb2.td
+++ b/llvm/lib/Target/ARM/ARMInstrThumb2.td
@@ -546,6 +546,7 @@ def : T2Pat<(extloadi16 (ARMWrapper tconstpool:$addr)),
             (t2LDRHpci  tconstpool:$addr)>;
 
 // Indexed loads
+let mayLoad = 1 in {
 def t2LDR_PRE  : T2Iidxldst<(outs GPR:$dst, GPR:$base_wb),
                             (ins t2addrmode_imm8:$addr),
                             AddrModeT2_i8, IndexModePre,
@@ -601,6 +602,7 @@ def t2LDRSH_POST : T2Iidxldst<(outs GPR:$dst, GPR:$base_wb),
                             AddrModeT2_i8, IndexModePost,
                          "ldrsh", " $dst, [$base], $offset", "$base = $base_wb",
                             []>;
+}
 
 // Store
 defm t2STR   : T2I_st<"str",  BinOpFrag<(store node:$LHS, node:$RHS)>>;