forked from OSchip/llvm-project
[InstCombine] Add vector udiv tests
Tests for X udiv C, where C >= signbit llvm-svn: 324635
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@ -19,6 +19,33 @@ define <4 x i32> @test_v4i32_const_pow2(<4 x i32> %a0) {
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ret <4 x i32> %1
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}
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; X udiv C, where C >= signbit
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define <4 x i32> @test_v4i32_negconstsplat(<4 x i32> %a0) {
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; CHECK-LABEL: @test_v4i32_negconstsplat(
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; CHECK-NEXT: [[TMP1:%.*]] = udiv <4 x i32> [[A0:%.*]], <i32 -3, i32 -3, i32 -3, i32 -3>
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; CHECK-NEXT: ret <4 x i32> [[TMP1]]
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;
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%1 = udiv <4 x i32> %a0, <i32 -3, i32 -3, i32 -3, i32 -3>
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ret <4 x i32> %1
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}
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define <4 x i32> @test_v4i32_negconst(<4 x i32> %a0) {
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; CHECK-LABEL: @test_v4i32_negconst(
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; CHECK-NEXT: [[TMP1:%.*]] = udiv <4 x i32> [[A0:%.*]], <i32 -3, i32 -5, i32 -7, i32 -9>
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; CHECK-NEXT: ret <4 x i32> [[TMP1]]
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;
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%1 = udiv <4 x i32> %a0, <i32 -3, i32 -5, i32 -7, i32 -9>
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ret <4 x i32> %1
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}
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define <4 x i32> @test_v4i32_negconst_undef(<4 x i32> %a0) {
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; CHECK-LABEL: @test_v4i32_negconst_undef(
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; CHECK-NEXT: ret <4 x i32> undef
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;
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%1 = udiv <4 x i32> %a0, <i32 -3, i32 -5, i32 -7, i32 undef>
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ret <4 x i32> %1
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}
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; X udiv (C1 << N), where C1 is "1<<C2" --> X >> (N+C2)
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define <4 x i32> @test_v4i32_shl_splatconst_pow2(<4 x i32> %a0, <4 x i32> %a1) {
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; CHECK-LABEL: @test_v4i32_shl_splatconst_pow2(
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