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[XCore] Add missing l2r instructions. 

These instructions are not targeted by the compiler but they are
needed for the MC layer.

llvm-svn: 173629
This commit is contained in:
Richard Osborne 2013-01-27 21:26:02 +00:00
parent 56b0b2a8e4
commit f2ecd40929
2 changed files with 24 additions and 1 deletions
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13
llvm/lib/Target/XCore/XCoreInstrInfo.td
View File

@ -811,7 +811,6 @@ def ENDIN_2r : _F2R<0b100101, (outs GRRegs:$dst), (ins GRRegs:$src),
[(set GRRegs:$dst, (int_xcore_endin GRRegs:$src))]>;
// Two operand long
// getd, testlcl
def BITREV_l2r : _FL2R<0b0000011000, (outs GRRegs:$dst), (ins GRRegs:$src),
"bitrev $dst, $src",
[(set GRRegs:$dst, (int_xcore_bitrev GRRegs:$src))]>;
@ -824,6 +823,12 @@ def CLZ_l2r : _FL2R<0b000111000, (outs GRRegs:$dst), (ins GRRegs:$src),
"clz $dst, $src",
[(set GRRegs:$dst, (ctlz GRRegs:$src))]>;
def GETD_l2r : _FL2R<0b0001111001, (outs GRRegs:$dst), (ins GRRegs:$src),
"getd $dst, res[$src]", []>;
def GETN_l2r : _FL2R<0b0011011001, (outs GRRegs:$dst), (ins GRRegs:$src),
"getn $dst, res[$src]", []>;
def SETC_l2r : _FL2R<0b0010111001, (outs), (ins GRRegs:$r, GRRegs:$val),
"setc res[$r], $val",
[(int_xcore_setc GRRegs:$r, GRRegs:$val)]>;
@ -848,10 +853,16 @@ def SETCLK_l2r : _FLR2R<0b0000111001, (outs), (ins GRRegs:$src1, GRRegs:$src2),
"setclk res[$src1], $src2",
[(int_xcore_setclk GRRegs:$src1, GRRegs:$src2)]>;
def SETN_l2r : _FLR2R<0b0011011000, (outs), (ins GRRegs:$src1, GRRegs:$src2),
"setn res[$src1], $src2", []>;
def SETRDY_l2r : _FLR2R<0b0010111000, (outs), (ins GRRegs:$src1, GRRegs:$src2),
"setrdy res[$src1], $src2",
[(int_xcore_setrdy GRRegs:$src1, GRRegs:$src2)]>;
def TESTLCL_l2r : _FL2R<0b0010011000, (outs GRRegs:$dst), (ins GRRegs:$src),
"testlcl $dst, res[$src]", []>;
// One operand short
def MSYNC_1r : _F1R<0b000111, (outs), (ins GRRegs:$a),
"msync res[$a]",

12
llvm/test/MC/Disassembler/XCore/xcore.txt
View File

@ -275,6 +275,18 @@
# CHECK: settw res[r7], r2
0x9b 0xff 0xec 0x27
# CHECK: getd r8, res[r3]
0x53 0xff 0xec 0x1f
# CHECK: getn r10, res[r11]
0xbb 0xff 0xec 0x37
# CHECK: testlcl r2, res[r0]
0xc8 0xfe 0xec 0x27
# CHECK: setn res[r9], r7
0x6d 0xff 0xec 0x37
# 3r instructions
# CHECK: add r1, r2, r3