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Revert "[PowerPC] Fix assert from machine verify pass that unmatched register class about fcmp selection in fast-isel" 

This reverts commit r350685.

See compile assert in compiler-rt.

llvm-svn: 350693
This commit is contained in:
Zi Xuan Wu 2019-01-09 06:12:24 +00:00
parent 7b03b66e5c
commit f2a75eef41
3 changed files with 22 additions and 29 deletions
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33
llvm/lib/Target/PowerPC/PPCFastISel.cpp
View File

@ -861,20 +861,8 @@ bool PPCFastISel::PPCEmitCmp(const Value *SrcValue1, const Value *SrcValue2,
}
}
unsigned SrcReg1 = getRegForValue(SrcValue1);
if (SrcReg1 == 0)
return false;
unsigned SrcReg2 = 0;
if (!UseImm) {
SrcReg2 = getRegForValue(SrcValue2);
if (SrcReg2 == 0)
return false;
}
unsigned CmpOpc;
bool NeedsExt = false;
auto RC = MRI.getRegClass(SrcReg1);
switch (SrcVT.SimpleTy) {
default: return false;
case MVT::f32:
@ -891,11 +879,8 @@ bool PPCFastISel::PPCEmitCmp(const Value *SrcValue1, const Value *SrcValue2,
CmpOpc = PPC::EFSCMPGT;
break;
}
} else if (isVSSRCRegClass(RC)) {
llvm_unreachable("Unsupposed f32 VSX comparison");
} else {
} else
CmpOpc = PPC::FCMPUS;
}
break;
case MVT::f64:
if (HasSPE) {
@ -911,11 +896,8 @@ bool PPCFastISel::PPCEmitCmp(const Value *SrcValue1, const Value *SrcValue2,
CmpOpc = PPC::EFDCMPGT;
break;
}
} else if (isVSFRCRegClass(RC)) {
CmpOpc = PPC::XSCMPUDP;
} else {
} else
CmpOpc = PPC::FCMPUD;
}
break;
case MVT::i1:
case MVT::i8:
@ -936,6 +918,17 @@ bool PPCFastISel::PPCEmitCmp(const Value *SrcValue1, const Value *SrcValue2,
break;
}
unsigned SrcReg1 = getRegForValue(SrcValue1);
if (SrcReg1 == 0)
return false;
unsigned SrcReg2 = 0;
if (!UseImm) {
SrcReg2 = getRegForValue(SrcValue2);
if (SrcReg2 == 0)
return false;
}
if (NeedsExt) {
unsigned ExtReg = createResultReg(&PPC::GPRCRegClass);
if (!PPCEmitIntExt(SrcVT, SrcReg1, MVT::i32, ExtReg, IsZExt))

14
llvm/test/CodeGen/PowerPC/fast-isel-fcmp-nan.ll
View File

@ -1,4 +1,4 @@
; RUN: llc -verify-machineinstrs -mtriple powerpc64le-unknown-linux-gnu -fast-isel -O0 < %s | FileCheck %s
; RUN: llc -mtriple powerpc64le-unknown-linux-gnu -fast-isel -O0 < %s | FileCheck %s
define i1 @TestULT(double %t0) {
; CHECK-LABEL: TestULT:
@ -17,7 +17,7 @@ good:
define i1 @TestULE(double %t0) {
; CHECK-LABEL: TestULE:
; CHECK: xscmpudp
; CHECK: fcmpu
; CHECK-NEXT: ble
; CHECK: blr
entry:
@ -33,7 +33,7 @@ good:
define i1 @TestUNE(double %t0) {
; CHECK-LABEL: TestUNE:
; CHECK: xscmpudp
; CHECK: fcmpu
; CHECK-NEXT: bne
; CHECK: blr
entry:
@ -79,7 +79,7 @@ good:
define i1 @TestUGE(double %t0) {
; CHECK-LABEL: TestUGE:
; CHECK: xscmpudp
; CHECK: fcmpu
; CHECK-NEXT: bge
; CHECK: blr
entry:
@ -95,7 +95,7 @@ good:
define i1 @TestOLT(double %t0) {
; CHECK-LABEL: TestOLT:
; CHECK: xscmpudp
; CHECK: fcmpu
; CHECK-NEXT: blt
; CHECK: blr
entry:
@ -141,7 +141,7 @@ good:
define i1 @TestOEQ(double %t0) {
; CHECK-LABEL: TestOEQ:
; CHECK: xscmpudp
; CHECK: fcmpu
; CHECK-NEXT: beq
; CHECK: blr
entry:
@ -157,7 +157,7 @@ good:
define i1 @TestOGT(double %t0) {
; CHECK-LABEL: TestOGT:
; CHECK: xscmpudp
; CHECK: fcmpu
; CHECK-NEXT: bgt
; CHECK: blr
entry:

4
llvm/test/CodeGen/PowerPC/vsx-self-copy.ll
View File

@ -1,5 +1,5 @@
; RUN: llc -mcpu=pwr7 -mattr=+vsx < %s -verify-machineinstrs | FileCheck %s
; RUN: llc -mcpu=pwr7 -mattr=+vsx -fast-isel -O0 < %s -verify-machineinstrs | FileCheck %s
; RUN: llc -mcpu=pwr7 -mattr=+vsx < %s | FileCheck %s
; RUN: llc -mcpu=pwr7 -mattr=+vsx -fast-isel -O0 < %s | FileCheck %s
target datalayout = "E-m:e-i64:64-n32:64"
target triple = "powerpc64-unknown-linux-gnu"