forked from OSchip/llvm-project
Handle the case where the 'g' packet doesn't get all regs.
lldb would silently accept a response to the 'g' packet (read all registers) which was too large; this handles the case where it is too small. Differential Revision: https://reviews.llvm.org/D70417 <rdar://problem/34916465>
This commit is contained in:
Jason Molenda
parent
4f0b0bf5c6
commit
f24ed3a051
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@ -0,0 +1,196 @@
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from __future__ import print_function
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import lldb
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from lldbsuite.test.lldbtest import *
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from lldbsuite.test.decorators import *
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from gdbclientutils import *
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class TestJLink6Armv7RegisterDefinition(GDBRemoteTestBase):
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@skipIfXmlSupportMissing
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@skipIfRemote
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def test(self):
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"""
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Test lldb's parsing of SEGGER J-Link v6.54 register
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definition for a Cortex M-4 dev board, and the fact
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that the J-Link only supports g/G for reading/writing
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register AND the J-Link v6.54 doesn't provide anything
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but the general purpose registers."""
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class MyResponder(MockGDBServerResponder):
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def qXferRead(self, obj, annex, offset, length):
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if annex == "target.xml":
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return """<?xml version="1.0"?>
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<!-- Copyright (C) 2008 Free Software Foundation, Inc.
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Copying and distribution of this file, with or without modification,
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are permitted in any medium without royalty provided the copyright
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notice and this notice are preserved. -->
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<!DOCTYPE feature SYSTEM "gdb-target.dtd">
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<target version="1.0">
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<architecture>arm</architecture>
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<feature name="org.gnu.gdb.arm.m-profile">
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<reg name="r0" bitsize="32" regnum="0" type="uint32" group="general"/>
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<reg name="r1" bitsize="32" regnum="1" type="uint32" group="general"/>
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<reg name="r2" bitsize="32" regnum="2" type="uint32" group="general"/>
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<reg name="r3" bitsize="32" regnum="3" type="uint32" group="general"/>
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<reg name="r4" bitsize="32" regnum="4" type="uint32" group="general"/>
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<reg name="r5" bitsize="32" regnum="5" type="uint32" group="general"/>
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<reg name="r6" bitsize="32" regnum="6" type="uint32" group="general"/>
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<reg name="r7" bitsize="32" regnum="7" type="uint32" group="general"/>
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<reg name="r8" bitsize="32" regnum="8" type="uint32" group="general"/>
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<reg name="r9" bitsize="32" regnum="9" type="uint32" group="general"/>
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<reg name="r10" bitsize="32" regnum="10" type="uint32" group="general"/>
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<reg name="r11" bitsize="32" regnum="11" type="uint32" group="general"/>
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<reg name="r12" bitsize="32" regnum="12" type="uint32" group="general"/>
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<reg name="sp" bitsize="32" regnum="13" type="data_ptr" group="general"/>
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<reg name="lr" bitsize="32" regnum="14" type="uint32" group="general"/>
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<reg name="pc" bitsize="32" regnum="15" type="code_ptr" group="general"/>
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<reg name="xpsr" bitsize="32" regnum="25" type="uint32" group="general"/>
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</feature>
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<feature name="org.gnu.gdb.arm.m-system">
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<reg name="msp" bitsize="32" regnum="26" type="uint32" group="general"/>
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<reg name="psp" bitsize="32" regnum="27" type="uint32" group="general"/>
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<reg name="primask" bitsize="32" regnum="28" type="uint32" group="general"/>
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<reg name="basepri" bitsize="32" regnum="29" type="uint32" group="general"/>
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<reg name="faultmask" bitsize="32" regnum="30" type="uint32" group="general"/>
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<reg name="control" bitsize="32" regnum="31" type="uint32" group="general"/>
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</feature>
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<feature name="org.gnu.gdb.arm.m-float">
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<reg name="fpscr" bitsize="32" regnum="32" type="uint32" group="float"/>
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<reg name="s0" bitsize="32" regnum="33" type="float" group="float"/>
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<reg name="s1" bitsize="32" regnum="34" type="float" group="float"/>
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<reg name="s2" bitsize="32" regnum="35" type="float" group="float"/>
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<reg name="s3" bitsize="32" regnum="36" type="float" group="float"/>
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<reg name="s4" bitsize="32" regnum="37" type="float" group="float"/>
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<reg name="s5" bitsize="32" regnum="38" type="float" group="float"/>
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<reg name="s6" bitsize="32" regnum="39" type="float" group="float"/>
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<reg name="s7" bitsize="32" regnum="40" type="float" group="float"/>
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<reg name="s8" bitsize="32" regnum="41" type="float" group="float"/>
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<reg name="s9" bitsize="32" regnum="42" type="float" group="float"/>
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<reg name="s10" bitsize="32" regnum="43" type="float" group="float"/>
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<reg name="s11" bitsize="32" regnum="44" type="float" group="float"/>
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<reg name="s12" bitsize="32" regnum="45" type="float" group="float"/>
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<reg name="s13" bitsize="32" regnum="46" type="float" group="float"/>
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<reg name="s14" bitsize="32" regnum="47" type="float" group="float"/>
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<reg name="s15" bitsize="32" regnum="48" type="float" group="float"/>
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<reg name="s16" bitsize="32" regnum="49" type="float" group="float"/>
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<reg name="s17" bitsize="32" regnum="50" type="float" group="float"/>
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<reg name="s18" bitsize="32" regnum="51" type="float" group="float"/>
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<reg name="s19" bitsize="32" regnum="52" type="float" group="float"/>
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<reg name="s20" bitsize="32" regnum="53" type="float" group="float"/>
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<reg name="s21" bitsize="32" regnum="54" type="float" group="float"/>
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<reg name="s22" bitsize="32" regnum="55" type="float" group="float"/>
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<reg name="s23" bitsize="32" regnum="56" type="float" group="float"/>
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<reg name="s24" bitsize="32" regnum="57" type="float" group="float"/>
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<reg name="s25" bitsize="32" regnum="58" type="float" group="float"/>
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<reg name="s26" bitsize="32" regnum="59" type="float" group="float"/>
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<reg name="s27" bitsize="32" regnum="60" type="float" group="float"/>
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<reg name="s28" bitsize="32" regnum="61" type="float" group="float"/>
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<reg name="s29" bitsize="32" regnum="62" type="float" group="float"/>
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<reg name="s30" bitsize="32" regnum="63" type="float" group="float"/>
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<reg name="s31" bitsize="32" regnum="64" type="float" group="float"/>
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<reg name="d0" bitsize="64" regnum="65" type="ieee_double" group="float"/>
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<reg name="d1" bitsize="64" regnum="66" type="ieee_double" group="float"/>
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<reg name="d2" bitsize="64" regnum="67" type="ieee_double" group="float"/>
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<reg name="d3" bitsize="64" regnum="68" type="ieee_double" group="float"/>
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<reg name="d4" bitsize="64" regnum="69" type="ieee_double" group="float"/>
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<reg name="d5" bitsize="64" regnum="70" type="ieee_double" group="float"/>
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<reg name="d6" bitsize="64" regnum="71" type="ieee_double" group="float"/>
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<reg name="d7" bitsize="64" regnum="72" type="ieee_double" group="float"/>
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<reg name="d8" bitsize="64" regnum="73" type="ieee_double" group="float"/>
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<reg name="d9" bitsize="64" regnum="74" type="ieee_double" group="float"/>
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<reg name="d10" bitsize="64" regnum="75" type="ieee_double" group="float"/>
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<reg name="d11" bitsize="64" regnum="76" type="ieee_double" group="float"/>
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<reg name="d12" bitsize="64" regnum="77" type="ieee_double" group="float"/>
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<reg name="d13" bitsize="64" regnum="78" type="ieee_double" group="float"/>
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<reg name="d14" bitsize="64" regnum="79" type="ieee_double" group="float"/>
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<reg name="d15" bitsize="64" regnum="80" type="ieee_double" group="float"/>
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</feature>
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</target>""", False
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else:
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return None, False
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def readRegister(self, regnum):
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return "E01"
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# Initial r1 bytes, in little-endian order
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r1_bytes = "01000000"
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## readRegisters only provides reg values up through xpsr (0x61000000)
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## it doesn't send up any of the exception registers or floating point
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## registers that the above register xml describes.
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def readRegisters(self):
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return "00000000" + self.r1_bytes + "010000000100000001000000000000008c080020a872012000000000a0790120000000008065012041ad0008a0720120692a00089e26000800000061"
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## the J-Link accepts a register write packet with just the GPRs
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## defined.
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def writeRegisters(self, registers_hex):
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# Check that lldb returns the full 704 hex-byte register context,
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# or the 136 hex-byte general purpose register reg ctx.
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if len(registers_hex) != 704 and len(register_hex) != 136:
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return "E06"
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if registers_hex.startswith("0000000044332211010000000100000001000000000000008c080020a872012000000000a0790120000000008065012041ad0008a0720120692a00089e26000800000061"):
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self.r1_bytes = "44332211"
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return "OK"
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else:
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return "E07"
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def haltReason(self):
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return "S05"
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def qfThreadInfo(self):
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return "mdead"
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def qC(self):
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return ""
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def qSupported(self, client_supported):
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return "PacketSize=4000;qXfer:memory-map:read-;QStartNoAckMode+;hwbreak+;qXfer:features:read+"
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def QThreadSuffixSupported(self):
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return "OK"
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def QListThreadsInStopReply(self):
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return "OK"
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self.server.responder = MyResponder()
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if self.TraceOn():
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self.runCmd("log enable gdb-remote packets")
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self.addTearDownHook(
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lambda: self.runCmd("log disable gdb-remote packets"))
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self.dbg.SetDefaultArchitecture("armv7em")
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target = self.dbg.CreateTargetWithFileAndArch(None, None)
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process = self.connect(target)
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if self.TraceOn():
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interp = self.dbg.GetCommandInterpreter()
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result = lldb.SBCommandReturnObject()
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interp.HandleCommand("target list", result)
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print(result.GetOutput())
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r1_valobj = process.GetThreadAtIndex(0).GetFrameAtIndex(0).FindRegister("r1")
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self.assertEqual(r1_valobj.GetValueAsUnsigned(), 1)
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pc_valobj = process.GetThreadAtIndex(0).GetFrameAtIndex(0).FindRegister("pc")
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self.assertEqual(pc_valobj.GetValueAsUnsigned(), 0x0800269e)
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xpsr_valobj = process.GetThreadAtIndex(0).GetFrameAtIndex(0).FindRegister("xpsr")
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self.assertEqual(xpsr_valobj.GetValueAsUnsigned(), 0x61000000)
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msp_valobj = process.GetThreadAtIndex(0).GetFrameAtIndex(0).FindRegister("msp")
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err = msp_valobj.GetError()
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self.assertTrue(err.Fail(), "lldb should not be able to fetch the msp register")
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val = b'\x11\x22\x33\x44'
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error = lldb.SBError()
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data = lldb.SBData()
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data.SetData(error, val, lldb.eByteOrderBig, 4)
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self.assertEqual(r1_valobj.SetData(data, error), True)
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self.assertTrue(error.Success())
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r1_valobj = process.GetThreadAtIndex(0).GetFrameAtIndex(0).FindRegister("r1")
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self.assertEqual(r1_valobj.GetValueAsUnsigned(), 0x11223344)
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@ -109,7 +109,9 @@ class MockGDBServerResponder:
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if packet[0] == "g":
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return self.readRegisters()
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if packet[0] == "G":
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return self.writeRegisters(packet[1:])
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# Gxxxxxxxxxxx
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# Gxxxxxxxxxxx;thread:1234;
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return self.writeRegisters(packet[1:].split(';')[0])
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if packet[0] == "p":
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regnum = packet[1:].split(';')[0]
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return self.readRegister(int(regnum, 16))
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@ -89,6 +89,9 @@ bool GDBRemoteRegisterContext::ReadRegister(const RegisterInfo *reg_info,
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RegisterValue &value) {
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// Read the register
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if (ReadRegisterBytes(reg_info, m_reg_data)) {
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const uint32_t reg = reg_info->kinds[eRegisterKindLLDB];
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if (m_reg_valid[reg] == false)
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return false;
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const bool partial_data_ok = false;
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Status error(value.SetValueFromData(
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reg_info, m_reg_data, reg_info->byte_offset, partial_data_ok));
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@ -205,6 +208,18 @@ bool GDBRemoteRegisterContext::ReadRegisterBytes(const RegisterInfo *reg_info,
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if (buffer_sp->GetByteSize() >= m_reg_data.GetByteSize()) {
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SetAllRegisterValid(true);
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return true;
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} else if (buffer_sp->GetByteSize() > 0) {
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const int regcount = m_reg_info.GetNumRegisters();
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for (int i = 0; i < regcount; i++) {
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struct RegisterInfo *reginfo = m_reg_info.GetRegisterInfoAtIndex(i);
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if (reginfo->byte_offset + reginfo->byte_size
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<= buffer_sp->GetByteSize()) {
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m_reg_valid[i] = true;
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} else {
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m_reg_valid[i] = false;
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}
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}
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return true;
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} else {
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Log *log(ProcessGDBRemoteLog::GetLogIfAnyCategoryIsSet(GDBR_LOG_THREAD |
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GDBR_LOG_PACKETS));
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