forked from OSchip/llvm-project
parent
669d8dd8e1
commit
f1f1c010e4
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@ -38,7 +38,7 @@ public:
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bool canSimplifyCallFramePseudos(const MachineFunction &MF) const override;
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void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs,
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RegScavenger *RS = nullptr) const override;
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void
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MachineBasicBlock::iterator
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eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
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MachineBasicBlock::iterator MI) const override;
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};
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@ -105,7 +105,6 @@ void AVRInstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB,
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const TargetRegisterClass *RC,
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const TargetRegisterInfo *TRI) const {
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MachineFunction &MF = *MBB.getParent();
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AVRMachineFunctionInfo *AFI = MF.getInfo<AVRMachineFunctionInfo>();
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DebugLoc DL;
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if (MI != MBB.end()) {
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@ -26,7 +26,7 @@
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namespace llvm {
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/// Processes a CPU name.
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static StringRef getTargetCPU(StringRef CPU) {
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static StringRef getCPU(StringRef CPU) {
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if (CPU.empty() || CPU == "generic") {
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return "avr2";
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}
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@ -41,8 +41,8 @@ AVRTargetMachine::AVRTargetMachine(const Target &T, const Triple &TT,
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CodeGenOpt::Level OL)
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: LLVMTargetMachine(
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T, "e-p:16:8:8-i8:8:8-i16:8:8-i32:8:8-i64:8:8-f32:8:8-f64:8:8-n8", TT,
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getTargetCPU(CPU), FS, Options, RM, CM, OL),
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SubTarget(TT, GetTargetCPU(CPU), FS, *this) {
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getCPU(CPU), FS, Options, RM, CM, OL),
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SubTarget(TT, getCPU(CPU), FS, *this) {
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this->TLOF = make_unique<AVRTargetObjectFile>();
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initAsmInfo();
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}
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