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[Sparc] Expand FP_TO_UINT, UINT_TO_FP for fp128. 

llvm-svn: 193947
This commit is contained in:
Venkatraman Govindaraju 2013-11-03 08:00:19 +00:00
parent 3e0c21ed53
commit f1d807ee13
2 changed files with 74 additions and 3 deletions
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45
llvm/lib/Target/Sparc/SparcISelLowering.cpp
View File

@ -1354,9 +1354,9 @@ SparcTargetLowering::SparcTargetLowering(TargetMachine &TM)
setOperationAction(ISD::FP_TO_SINT, MVT::i32, Custom);
setOperationAction(ISD::SINT_TO_FP, MVT::i32, Custom);
// Expand fp<->uint
setOperationAction(ISD::FP_TO_UINT, MVT::i32, Expand);
setOperationAction(ISD::UINT_TO_FP, MVT::i32, Expand);
// Custom Expand fp<->uint
setOperationAction(ISD::FP_TO_UINT, MVT::i32, Custom);
setOperationAction(ISD::UINT_TO_FP, MVT::i32, Custom);
setOperationAction(ISD::BITCAST, MVT::f32, Expand);
setOperationAction(ISD::BITCAST, MVT::i32, Expand);
@ -1520,7 +1520,9 @@ SparcTargetLowering::SparcTargetLowering(TargetMachine &TM)
setLibcallName(RTLIB::DIV_F128, "_Qp_div");
setLibcallName(RTLIB::SQRT_F128, "_Qp_sqrt");
setLibcallName(RTLIB::FPTOSINT_F128_I32, "_Qp_qtoi");
setLibcallName(RTLIB::FPTOUINT_F128_I32, "_Qp_qtoui");
setLibcallName(RTLIB::SINTTOFP_I32_F128, "_Qp_itoq");
setLibcallName(RTLIB::UINTTOFP_I32_F128, "_Qp_uitoq");
setLibcallName(RTLIB::FPEXT_F32_F128, "_Qp_stoq");
setLibcallName(RTLIB::FPEXT_F64_F128, "_Qp_dtoq");
setLibcallName(RTLIB::FPROUND_F128_F32, "_Qp_qtos");
@ -1532,7 +1534,9 @@ SparcTargetLowering::SparcTargetLowering(TargetMachine &TM)
setLibcallName(RTLIB::DIV_F128, "_Q_div");
setLibcallName(RTLIB::SQRT_F128, "_Q_sqrt");
setLibcallName(RTLIB::FPTOSINT_F128_I32, "_Q_qtoi");
setLibcallName(RTLIB::FPTOUINT_F128_I32, "_Q_qtou");
setLibcallName(RTLIB::SINTTOFP_I32_F128, "_Q_itoq");
setLibcallName(RTLIB::UINTTOFP_I32_F128, "_Q_utoq");
setLibcallName(RTLIB::FPEXT_F32_F128, "_Q_stoq");
setLibcallName(RTLIB::FPEXT_F64_F128, "_Q_dtoq");
setLibcallName(RTLIB::FPROUND_F128_F32, "_Q_qtos");
@ -2075,6 +2079,37 @@ static SDValue LowerSINT_TO_FP(SDValue Op, SelectionDAG &DAG,
return DAG.getNode(SPISD::ITOF, dl, Op.getValueType(), Tmp);
}
static SDValue LowerFP_TO_UINT(SDValue Op, SelectionDAG &DAG,
const SparcTargetLowering &TLI,
bool hasHardQuad) {
// Expand if it does not involve f128 or the target has support for
// quad floating point instructions.
if (Op.getOperand(0).getValueType() != MVT::f128 || hasHardQuad)
return SDValue(0, 0);
SDLoc dl(Op);
assert(Op.getValueType() == MVT::i32);
return TLI.LowerF128Op(Op, DAG,
TLI.getLibcallName(RTLIB::FPTOUINT_F128_I32), 1);
}
static SDValue LowerUINT_TO_FP(SDValue Op, SelectionDAG &DAG,
const SparcTargetLowering &TLI,
bool hasHardQuad) {
// Expand if it does not involve f128 or the target has support for
// quad floating point instructions.
if (Op.getValueType() != MVT::f128 || hasHardQuad)
return SDValue(0, 0);
SDLoc dl(Op);
assert(Op.getOperand(0).getValueType() == MVT::i32);
return TLI.LowerF128Op(Op, DAG,
TLI.getLibcallName(RTLIB::UINTTOFP_I32_F128), 1);
}
static SDValue LowerBR_CC(SDValue Op, SelectionDAG &DAG,
const SparcTargetLowering &TLI,
bool hasHardQuad) {
@ -2518,6 +2553,10 @@ LowerOperation(SDValue Op, SelectionDAG &DAG) const {
hasHardQuad);
case ISD::SINT_TO_FP: return LowerSINT_TO_FP(Op, DAG, *this,
hasHardQuad);
case ISD::FP_TO_UINT: return LowerFP_TO_UINT(Op, DAG, *this,
hasHardQuad);
case ISD::UINT_TO_FP: return LowerUINT_TO_FP(Op, DAG, *this,
hasHardQuad);
case ISD::BR_CC: return LowerBR_CC(Op, DAG, *this,
hasHardQuad);
case ISD::SELECT_CC: return LowerSELECT_CC(Op, DAG, *this,

32
llvm/test/CodeGen/SPARC/fp128.ll
View File

@ -148,3 +148,35 @@ entry:
store fp128 %2, fp128* %c, align 1
ret void
}
; HARD-LABEL: uint_to_f128
; HARD: fdtoq
; SOFT-LABEL: uint_to_f128
; SOFT: _Q_utoq
define void @uint_to_f128(fp128* noalias sret %scalar.result, i32 %i) {
entry:
%0 = uitofp i32 %i to fp128
store fp128 %0, fp128* %scalar.result, align 8
ret void
}
; HARD-LABEL: f128_to_i32
; HARD: fqtoi
; HARD: fqtoi
; SOFT-LABEL: f128_to_i32
; SOFT: call _Q_qtou
; SOFT: call _Q_qtoi
define i32 @f128_to_i32(fp128* %a, fp128* %b) {
entry:
%0 = load fp128* %a, align 8
%1 = load fp128* %b, align 8
%2 = fptoui fp128 %0 to i32
%3 = fptosi fp128 %1 to i32
%4 = add i32 %2, %3
ret i32 %4
}