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fix typo and 80-col; NFC 

llvm-svn: 233427
This commit is contained in:
Sanjay Patel 2015-03-27 21:45:18 +00:00
parent f089372c5c
commit f176566a00
1 changed files with 2 additions and 2 deletions
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4
llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
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@ -379,8 +379,8 @@ SDValue VectorLegalizer::Promote(SDValue Op) {
// There are currently two cases of vector promotion:
// 1) Bitcasting a vector of integers to a different type to a vector of the
// same overall length. For example, x86 promotes ISD::AND on v2i32 to v1i64.
// 2) Extending a vector of floats to a vector of the same number oflarger
// same overall length. For example, x86 promotes ISD::AND v2i32 to v1i64.
// 2) Extending a vector of floats to a vector of the same number of larger
// floats. For example, AArch64 promotes ISD::FADD on v4f16 to v4f32.
MVT VT = Op.getSimpleValueType();
assert(Op.getNode()->getNumValues() == 1 &&