forked from OSchip/llvm-project
[X86][SSE] Permit UNDEFs in combineAddToSUBUS matching (PR40083)
llvm-svn: 352328
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@ -41106,11 +41106,12 @@ static SDValue combineAddToSUBUS(SDNode *N, SelectionDAG &DAG,
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return SDValue();
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// The add should have a constant that is the negative of the max.
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// TODO: Handle build_vectors with undef elements.
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auto MatchUSUBSAT = [](ConstantSDNode *Max, ConstantSDNode *Op) {
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return Max->getAPIntValue() == (-Op->getAPIntValue());
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return (!Max && !Op) ||
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(Max && Op && Max->getAPIntValue() == (-Op->getAPIntValue()));
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};
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if (!ISD::matchBinaryPredicate(Op0.getOperand(1), Op1, MatchUSUBSAT))
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if (!ISD::matchBinaryPredicate(Op0.getOperand(1), Op1, MatchUSUBSAT,
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/*AllowUndefs*/ true))
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return SDValue();
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SDLoc DL(N);
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@ -2728,37 +2728,15 @@ entry:
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; PR40083
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define i64 @test30(<8 x i16> %x) {
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; SSE2-LABEL: test30:
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; SSE2: # %bb.0: # %entry
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; SSE2-NEXT: movdqa {{.*#+}} xmm1 = [32768,32768,32768,32768,32768,32768,32768,32768]
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; SSE2-NEXT: pxor %xmm1, %xmm0
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; SSE2-NEXT: pmaxsw {{.*}}(%rip), %xmm0
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; SSE2-NEXT: pxor %xmm1, %xmm0
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; SSE2-NEXT: paddw {{.*}}(%rip), %xmm0
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; SSE2-NEXT: movq %xmm0, %rax
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; SSE2-NEXT: retq
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;
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; SSSE3-LABEL: test30:
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; SSSE3: # %bb.0: # %entry
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; SSSE3-NEXT: movdqa {{.*#+}} xmm1 = [32768,32768,32768,32768,32768,32768,32768,32768]
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; SSSE3-NEXT: pxor %xmm1, %xmm0
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; SSSE3-NEXT: pmaxsw {{.*}}(%rip), %xmm0
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; SSSE3-NEXT: pxor %xmm1, %xmm0
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; SSSE3-NEXT: paddw {{.*}}(%rip), %xmm0
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; SSSE3-NEXT: movq %xmm0, %rax
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; SSSE3-NEXT: retq
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;
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; SSE41-LABEL: test30:
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; SSE41: # %bb.0: # %entry
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; SSE41-NEXT: pmaxuw {{.*}}(%rip), %xmm0
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; SSE41-NEXT: paddw {{.*}}(%rip), %xmm0
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; SSE41-NEXT: movq %xmm0, %rax
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; SSE41-NEXT: retq
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; SSE-LABEL: test30:
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; SSE: # %bb.0: # %entry
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; SSE-NEXT: psubusw {{.*}}(%rip), %xmm0
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; SSE-NEXT: movq %xmm0, %rax
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; SSE-NEXT: retq
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;
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; AVX-LABEL: test30:
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; AVX: # %bb.0: # %entry
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; AVX-NEXT: vpmaxuw {{.*}}(%rip), %xmm0, %xmm0
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; AVX-NEXT: vpaddw {{.*}}(%rip), %xmm0, %xmm0
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; AVX-NEXT: vpsubusw {{.*}}(%rip), %xmm0, %xmm0
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; AVX-NEXT: vmovq %xmm0, %rax
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; AVX-NEXT: retq
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entry:
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