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[x86] use zero-extending load of a byte outside of loops too (2nd try) 

The first attempt missed changing test files for tools
(update_llc_test_checks.py).

Original commit message:

This implements the main suggested change from issue #56498.
Using the shorter (non-extending) instruction with only
-Oz ("minsize") rather than -Os ("optsize") is left as a
possible follow-up.

As noted in the bug report, the zero-extending load may have
shorter latency/better throughput across a wide range of x86
micro-arches, and it avoids a potential false dependency.
The cost is an extra instruction byte.

This could cause perf ups and downs from secondary effects,
but I don't think it is possible to account for those in
advance, and that will likely also depend on exact micro-arch.
This does bring LLVM x86 codegen more in line with existing
gcc codegen, so if problems are exposed they are more likely
to occur for both compilers.

Differential Revision: https://reviews.llvm.org/D129775
This commit is contained in:
Sanjay Patel 2022-07-19 21:25:41 -04:00
parent 2d889a87fb
commit f0dd12ec5c
211 changed files with 3834 additions and 3292 deletions
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12
llvm/lib/Target/X86/X86FixupBWInsts.cpp
View File

@ -393,12 +393,12 @@ MachineInstr *FixupBWInstPass::tryReplaceInstr(MachineInstr *MI,
switch (MI->getOpcode()) {
case X86::MOV8rm:
// Only replace 8 bit loads with the zero extending versions if
// in an inner most loop and not optimizing for size. This takes
// an extra byte to encode, and provides limited performance upside.
if (MachineLoop *ML = MLI->getLoopFor(&MBB))
if (ML->begin() == ML->end() && !OptForSize)
return tryReplaceLoad(X86::MOVZX32rm8, MI);
// Replace 8-bit loads with the zero-extending version if not optimizing
// for size. The extending op is cheaper across a wide range of uarch and
// it avoids a potentially expensive partial register stall. It takes an
// extra byte to encode, however, so don't do this when optimizing for size.
if (!OptForSize)
return tryReplaceLoad(X86::MOVZX32rm8, MI);
break;
case X86::MOV16rm:

2
llvm/test/CodeGen/X86/2006-01-19-ISelFoldingBug.ll
View File

@ -11,7 +11,7 @@ target triple = "i686-unknown-unknown"
define i32 @test5(i32 %B, i8 %C) {
; CHECK-LABEL: test5:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movb {{[0-9]+}}(%esp), %cl
; CHECK-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %edx
; CHECK-NEXT: movl A, %eax
; CHECK-NEXT: shldl %cl, %edx, %eax

2
llvm/test/CodeGen/X86/2006-05-08-InstrSched.ll
View File

@ -10,7 +10,7 @@ define void @test() {
; CHECK: # %bb.0:
; CHECK-NEXT: movl A, %eax
; CHECK-NEXT: movzwl 2(%eax), %eax
; CHECK-NEXT: movb B, %cl
; CHECK-NEXT: movzbl B, %ecx
; CHECK-NEXT: movl C, %edx
; CHECK-NEXT: andb $16, %cl
; CHECK-NEXT: shll %cl, %edx

4
llvm/test/CodeGen/X86/2006-11-17-IllegalMove.ll
View File

@ -9,8 +9,8 @@ define void @handle_vector_size_attribute() nounwind {
; CHECK-NEXT: cmpl $1, %eax
; CHECK-NEXT: ja .LBB0_2
; CHECK-NEXT: # %bb.1: # %bb77
; CHECK-NEXT: movb 0, %al
; CHECK-NEXT: movb 0, %al
; CHECK-NEXT: movzbl 0, %eax
; CHECK-NEXT: movzbl 0, %eax
; CHECK-NEXT: xorl %eax, %eax
; CHECK-NEXT: testb %al, %al
; CHECK-NEXT: .LBB0_2: # %bb84

8
llvm/test/CodeGen/X86/2007-08-09-IllegalX86-64Asm.ll
View File

@ -69,11 +69,11 @@ define ptr @ubyte_divmod(ptr %a, ptr %b) {
; CHECK-NEXT: movq _PyUFunc_API@GOTPCREL(%rip), %rbp
; CHECK-NEXT: movq (%rbp), %rax
; CHECK-NEXT: callq *216(%rax)
; CHECK-NEXT: movb {{[0-9]+}}(%rsp), %dl
; CHECK-NEXT: movzbl {{[0-9]+}}(%rsp), %edx
; CHECK-NEXT: testb %dl, %dl
; CHECK-NEXT: je LBB0_11
; CHECK-NEXT: ## %bb.7: ## %cond_false.i
; CHECK-NEXT: movb {{[0-9]+}}(%rsp), %bl
; CHECK-NEXT: movzbl {{[0-9]+}}(%rsp), %ebx
; CHECK-NEXT: movzbl %bl, %ecx
; CHECK-NEXT: movl %ecx, %eax
; CHECK-NEXT: divb %dl
@ -98,8 +98,8 @@ define ptr @ubyte_divmod(ptr %a, ptr %b) {
; CHECK-NEXT: LBB0_11: ## %cond_true.i
; CHECK-NEXT: movl $4, %edi
; CHECK-NEXT: callq _feraiseexcept
; CHECK-NEXT: movb {{[0-9]+}}(%rsp), %dl
; CHECK-NEXT: movb {{[0-9]+}}(%rsp), %bl
; CHECK-NEXT: movzbl {{[0-9]+}}(%rsp), %edx
; CHECK-NEXT: movzbl {{[0-9]+}}(%rsp), %ebx
; CHECK-NEXT: xorl %r14d, %r14d
; CHECK-NEXT: testb %bl, %bl
; CHECK-NEXT: je LBB0_14

2
llvm/test/CodeGen/X86/2008-04-17-CoalescerBug.ll
View File

@ -31,7 +31,7 @@ define void @_ZNK10wxDateTime6FormatEPKwRKNS_8TimeZoneE(ptr noalias sret(%struct
; CHECK-NEXT: .cfi_offset %ebx, -12
; CHECK-NEXT: .cfi_offset %ebp, -8
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %esi
; CHECK-NEXT: movb {{[0-9]+}}(%esp), %bl
; CHECK-NEXT: movzbl {{[0-9]+}}(%esp), %ebx
; CHECK-NEXT: testb $1, %bl
; CHECK-NEXT: je LBB0_25
; CHECK-NEXT: ## %bb.1: ## %bb116.i

2
llvm/test/CodeGen/X86/2008-04-24-MemCpyBug.ll
View File

@ -17,7 +17,7 @@ define void @testit63_entry_2E_ce() nounwind {
; CHECK-NEXT: movl %esp, %edi
; CHECK-NEXT: movl $g1s63, %esi
; CHECK-NEXT: rep;movsl (%esi), %es:(%edi)
; CHECK-NEXT: movb g1s63+62, %al
; CHECK-NEXT: movzbl g1s63+62, %eax
; CHECK-NEXT: movb %al, {{[0-9]+}}(%esp)
; CHECK-NEXT: movzwl g1s63+60, %eax
; CHECK-NEXT: movw %ax, {{[0-9]+}}(%esp)

2
llvm/test/CodeGen/X86/2008-09-11-CoalescerBug2.ll
View File

@ -15,7 +15,7 @@ define i32 @func_44(i16 signext %p_46) nounwind {
; SOURCE-SCHED-NEXT: xorl %ecx, %ecx
; SOURCE-SCHED-NEXT: cmpl $2, %eax
; SOURCE-SCHED-NEXT: setge %cl
; SOURCE-SCHED-NEXT: movb g_73, %dl
; SOURCE-SCHED-NEXT: movzbl g_73, %edx
; SOURCE-SCHED-NEXT: xorl %eax, %eax
; SOURCE-SCHED-NEXT: subb {{[0-9]+}}(%esp), %al
; SOURCE-SCHED-NEXT: testb %dl, %dl

45
llvm/test/CodeGen/X86/2010-09-17-SideEffectsInChain.ll
View File

@ -1,10 +1,44 @@
; RUN: llc < %s -mcpu=core2 | FileCheck %s
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=x86_64-- -mcpu=core2 | FileCheck %s
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
target triple = "x86_64-apple-darwin10.4"
declare void @llvm.memcpy.p0.p0.i64(ptr nocapture, ptr nocapture, i64, i1) nounwind
define fastcc i32 @cli_magic_scandesc(ptr %in) nounwind ssp {
; CHECK-LABEL: cli_magic_scandesc:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: subq $72, %rsp
; CHECK-NEXT: movq __stack_chk_guard(%rip), %rax
; CHECK-NEXT: movq %rax, {{[0-9]+}}(%rsp)
; CHECK-NEXT: movzbl (%rsp), %eax
; CHECK-NEXT: movzbl {{[0-9]+}}(%rsp), %ecx
; CHECK-NEXT: movq (%rdi), %rdx
; CHECK-NEXT: movq 8(%rdi), %rsi
; CHECK-NEXT: movq %rdx, (%rsp)
; CHECK-NEXT: movq 24(%rdi), %rdx
; CHECK-NEXT: movq %rdx, {{[0-9]+}}(%rsp)
; CHECK-NEXT: movq %rsi, {{[0-9]+}}(%rsp)
; CHECK-NEXT: movq 16(%rdi), %rdx
; CHECK-NEXT: movq %rdx, {{[0-9]+}}(%rsp)
; CHECK-NEXT: movq 32(%rdi), %rdx
; CHECK-NEXT: movq %rdx, {{[0-9]+}}(%rsp)
; CHECK-NEXT: movq 40(%rdi), %rdx
; CHECK-NEXT: movq %rdx, {{[0-9]+}}(%rsp)
; CHECK-NEXT: movq 48(%rdi), %rdx
; CHECK-NEXT: movq %rdx, {{[0-9]+}}(%rsp)
; CHECK-NEXT: movq 56(%rdi), %rdx
; CHECK-NEXT: movq %rdx, {{[0-9]+}}(%rsp)
; CHECK-NEXT: movb %al, (%rsp)
; CHECK-NEXT: movb %cl, {{[0-9]+}}(%rsp)
; CHECK-NEXT: movq __stack_chk_guard(%rip), %rax
; CHECK-NEXT: cmpq {{[0-9]+}}(%rsp), %rax
; CHECK-NEXT: jne .LBB0_2
; CHECK-NEXT: # %bb.1: # %entry
; CHECK-NEXT: xorl %eax, %eax
; CHECK-NEXT: addq $72, %rsp
; CHECK-NEXT: retq
; CHECK-NEXT: .LBB0_2: # %entry
; CHECK-NEXT: callq __stack_chk_fail@PLT
entry:
%a = alloca [64 x i8]
%c = getelementptr inbounds [64 x i8], ptr %a, i64 0, i32 30
@ -15,10 +49,3 @@ entry:
store i8 %e, ptr %c, align 8
ret i32 0
}
; CHECK: movq ___stack_chk_guard@GOTPCREL(%rip)
; CHECK: movb (%rsp), [[R1:%.+]]
; CHECK: movb 30(%rsp), [[R0:%.+]]
; CHECK: movb [[R1]], (%rsp)
; CHECK: movb [[R0]], 30(%rsp)
; CHECK: callq ___stack_chk_fail

12
llvm/test/CodeGen/X86/8bit_cmov_of_trunc_promotion.ll
View File

@ -233,7 +233,7 @@ define i8 @neg_type_mismatch(i32 %a1_wide_orig, i16 %a2_wide_orig, i32 %inc) nou
define i8 @negative_CopyFromReg(i32 %a1_wide, i32 %a2_wide_orig, i32 %inc) nounwind {
; I386-NOCMOV-LABEL: negative_CopyFromReg:
; I386-NOCMOV: # %bb.0:
; I386-NOCMOV-NEXT: movb {{[0-9]+}}(%esp), %al
; I386-NOCMOV-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; I386-NOCMOV-NEXT: movl {{[0-9]+}}(%esp), %ecx
; I386-NOCMOV-NEXT: addl {{[0-9]+}}(%esp), %ecx
; I386-NOCMOV-NEXT: cmpb %cl, %al
@ -255,7 +255,7 @@ define i8 @negative_CopyFromReg(i32 %a1_wide, i32 %a2_wide_orig, i32 %inc) nounw
;
; I686-NOCMOV-LABEL: negative_CopyFromReg:
; I686-NOCMOV: # %bb.0:
; I686-NOCMOV-NEXT: movb {{[0-9]+}}(%esp), %al
; I686-NOCMOV-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; I686-NOCMOV-NEXT: movl {{[0-9]+}}(%esp), %ecx
; I686-NOCMOV-NEXT: addl {{[0-9]+}}(%esp), %ecx
; I686-NOCMOV-NEXT: cmpb %cl, %al
@ -297,8 +297,8 @@ define i8 @negative_CopyFromReg(i32 %a1_wide, i32 %a2_wide_orig, i32 %inc) nounw
define i8 @negative_CopyFromRegs(i32 %a1_wide, i32 %a2_wide) nounwind {
; I386-NOCMOV-LABEL: negative_CopyFromRegs:
; I386-NOCMOV: # %bb.0:
; I386-NOCMOV-NEXT: movb {{[0-9]+}}(%esp), %cl
; I386-NOCMOV-NEXT: movb {{[0-9]+}}(%esp), %al
; I386-NOCMOV-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; I386-NOCMOV-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; I386-NOCMOV-NEXT: cmpb %cl, %al
; I386-NOCMOV-NEXT: jg .LBB4_2
; I386-NOCMOV-NEXT: # %bb.1:
@ -317,8 +317,8 @@ define i8 @negative_CopyFromRegs(i32 %a1_wide, i32 %a2_wide) nounwind {
;
; I686-NOCMOV-LABEL: negative_CopyFromRegs:
; I686-NOCMOV: # %bb.0:
; I686-NOCMOV-NEXT: movb {{[0-9]+}}(%esp), %cl
; I686-NOCMOV-NEXT: movb {{[0-9]+}}(%esp), %al
; I686-NOCMOV-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; I686-NOCMOV-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; I686-NOCMOV-NEXT: cmpb %cl, %al
; I686-NOCMOV-NEXT: jg .LBB4_2
; I686-NOCMOV-NEXT: # %bb.1:

4
llvm/test/CodeGen/X86/GlobalISel/callingconv.ll
View File

@ -324,7 +324,7 @@ define void @test_abi_exts_call(ptr %addr) {
; X32-NEXT: .cfi_offset %esi, -12
; X32-NEXT: .cfi_offset %ebx, -8
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-NEXT: movb (%eax), %bl
; X32-NEXT: movzbl (%eax), %ebx
; X32-NEXT: movzbl %bl, %esi
; X32-NEXT: movl %esi, (%esp)
; X32-NEXT: calll take_char
@ -346,7 +346,7 @@ define void @test_abi_exts_call(ptr %addr) {
; X64-NEXT: pushq %rbx
; X64-NEXT: .cfi_def_cfa_offset 16
; X64-NEXT: .cfi_offset %rbx, -16
; X64-NEXT: movb (%rdi), %al
; X64-NEXT: movzbl (%rdi), %eax
; X64-NEXT: movzbl %al, %ebx
; X64-NEXT: movl %ebx, %edi
; X64-NEXT: callq take_char

4
llvm/test/CodeGen/X86/GlobalISel/memop-scalar-x32.ll
View File

@ -8,7 +8,7 @@ define i1 @test_load_i1(ptr %p1) {
; CHECK-LABEL: test_load_i1:
; CHECK: # %bb.0:
; CHECK-NEXT: movl 4(%esp), %eax
; CHECK-NEXT: movb (%eax), %al
; CHECK-NEXT: movzbl (%eax), %eax
; CHECK-NEXT: retl
%r = load i1, ptr %p1
ret i1 %r
@ -18,7 +18,7 @@ define i8 @test_load_i8(ptr %p1) {
; CHECK-LABEL: test_load_i8:
; CHECK: # %bb.0:
; CHECK-NEXT: movl 4(%esp), %eax
; CHECK-NEXT: movb (%eax), %al
; CHECK-NEXT: movzbl (%eax), %eax
; CHECK-NEXT: retl
%r = load i8, ptr %p1
ret i8 %r

4
llvm/test/CodeGen/X86/GlobalISel/memop-scalar.ll
View File

@ -5,7 +5,7 @@
define i1 @test_load_i1(ptr %p1) {
; ALL-LABEL: test_load_i1:
; ALL: # %bb.0:
; ALL-NEXT: movb (%rdi), %al
; ALL-NEXT: movzbl (%rdi), %eax
; ALL-NEXT: retq
%r = load i1, ptr %p1
ret i1 %r
@ -14,7 +14,7 @@ define i1 @test_load_i1(ptr %p1) {
define i8 @test_load_i8(ptr %p1) {
; ALL-LABEL: test_load_i8:
; ALL: # %bb.0:
; ALL-NEXT: movb (%rdi), %al
; ALL-NEXT: movzbl (%rdi), %eax
; ALL-NEXT: retq
%r = load i8, ptr %p1
ret i8 %r

2
llvm/test/CodeGen/X86/PR40322.ll
View File

@ -15,7 +15,7 @@ define void @_Z2ami(i32) #0 personality ptr @__gxx_personality_v0 {
; CHECK-MINGW-X86-NEXT: .cfi_def_cfa_offset 12
; CHECK-MINGW-X86-NEXT: .cfi_offset %esi, -12
; CHECK-MINGW-X86-NEXT: .cfi_offset %edi, -8
; CHECK-MINGW-X86-NEXT: movb __ZGVZ2amiE2au, %al
; CHECK-MINGW-X86-NEXT: movzbl __ZGVZ2amiE2au, %eax
; CHECK-MINGW-X86-NEXT: testb %al, %al
; CHECK-MINGW-X86-NEXT: jne LBB0_4
; CHECK-MINGW-X86-NEXT: # %bb.1: # %init.check

26
llvm/test/CodeGen/X86/abs.ll
View File

@ -35,7 +35,7 @@ define i8 @test_i8(i8 %a) nounwind {
;
; X86-LABEL: test_i8:
; X86: # %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl %eax, %ecx
; X86-NEXT: sarb $7, %cl
; X86-NEXT: xorb %cl, %al
@ -530,13 +530,13 @@ define <16 x i8> @test_v16i8(<16 x i8> %a) nounwind {
; X86-NEXT: xorb %al, %bh
; X86-NEXT: subb %al, %bh
; X86-NEXT: movb %bh, {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Spill
; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl %ecx, %eax
; X86-NEXT: sarb $7, %al
; X86-NEXT: xorb %al, %cl
; X86-NEXT: subb %al, %cl
; X86-NEXT: movb %cl, {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Spill
; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl %ecx, %eax
; X86-NEXT: sarb $7, %al
; X86-NEXT: xorb %al, %cl
@ -572,7 +572,7 @@ define <16 x i8> @test_v16i8(<16 x i8> %a) nounwind {
; X86-NEXT: sarb $7, %al
; X86-NEXT: xorb %al, %cl
; X86-NEXT: subb %al, %cl
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movb %al, %ah
; X86-NEXT: sarb $7, %ah
; X86-NEXT: xorb %ah, %al
@ -585,23 +585,23 @@ define <16 x i8> @test_v16i8(<16 x i8> %a) nounwind {
; X86-NEXT: movb %dh, 11(%esi)
; X86-NEXT: movb %bl, 10(%esi)
; X86-NEXT: movb %bh, 9(%esi)
; X86-NEXT: movb {{[-0-9]+}}(%e{{[sb]}}p), %al # 1-byte Reload
; X86-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload
; X86-NEXT: movb %al, 8(%esi)
; X86-NEXT: movb {{[-0-9]+}}(%e{{[sb]}}p), %al # 1-byte Reload
; X86-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload
; X86-NEXT: movb %al, 7(%esi)
; X86-NEXT: movb {{[-0-9]+}}(%e{{[sb]}}p), %al # 1-byte Reload
; X86-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload
; X86-NEXT: movb %al, 6(%esi)
; X86-NEXT: movb {{[-0-9]+}}(%e{{[sb]}}p), %al # 1-byte Reload
; X86-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload
; X86-NEXT: movb %al, 5(%esi)
; X86-NEXT: movb {{[-0-9]+}}(%e{{[sb]}}p), %al # 1-byte Reload
; X86-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload
; X86-NEXT: movb %al, 4(%esi)
; X86-NEXT: movb {{[-0-9]+}}(%e{{[sb]}}p), %al # 1-byte Reload
; X86-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload
; X86-NEXT: movb %al, 3(%esi)
; X86-NEXT: movb {{[-0-9]+}}(%e{{[sb]}}p), %al # 1-byte Reload
; X86-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload
; X86-NEXT: movb %al, 2(%esi)
; X86-NEXT: movb {{[-0-9]+}}(%e{{[sb]}}p), %al # 1-byte Reload
; X86-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload
; X86-NEXT: movb %al, 1(%esi)
; X86-NEXT: movb {{[-0-9]+}}(%e{{[sb]}}p), %al # 1-byte Reload
; X86-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload
; X86-NEXT: movb %al, (%esi)
; X86-NEXT: movl %esi, %eax
; X86-NEXT: addl $12, %esp

4
llvm/test/CodeGen/X86/add-sub-bool.ll
View File

@ -390,7 +390,7 @@ define i64 @test_i64_add_add_var(i64 %x, i64 %y, i64 %z, i64 %w) nounwind {
; X86-NEXT: pushl %ebx
; X86-NEXT: pushl %edi
; X86-NEXT: pushl %esi
; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
; X86-NEXT: movl {{[0-9]+}}(%esp), %ebx
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
@ -529,7 +529,7 @@ define i32 @test_i32_sub_add_sext_var(i32 %x, i32 %y, i32 %z, i32 %w) nounwind {
; X86-LABEL: test_i32_sub_add_sext_var:
; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NEXT: shll %cl, %edx
; X86-NEXT: sarl $31, %edx

2
llvm/test/CodeGen/X86/and-load-fold.ll
View File

@ -6,7 +6,7 @@
define i8 @foo(ptr %V) {
; CHECK-LABEL: foo:
; CHECK: # %bb.0:
; CHECK-NEXT: movb 2(%rdi), %al
; CHECK-NEXT: movzbl 2(%rdi), %eax
; CHECK-NEXT: andb $95, %al
; CHECK-NEXT: retq
%V3i8 = load <3 x i8>, ptr %V, align 4

2
llvm/test/CodeGen/X86/and-sink.ll
View File

@ -51,7 +51,7 @@ define i32 @and_sink2(i32 %a, i1 %c, i1 %c2) {
; CHECK-NEXT: testb $1, {{[0-9]+}}(%esp)
; CHECK-NEXT: je .LBB1_5
; CHECK-NEXT: # %bb.1: # %bb0.preheader
; CHECK-NEXT: movb {{[0-9]+}}(%esp), %al
; CHECK-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .LBB1_2: # %bb0

6
llvm/test/CodeGen/X86/and-with-overflow.ll
View File

@ -9,7 +9,7 @@
define i8 @and_i8_ri(i8 zeroext %0, i8 zeroext %1) {
; X86-LABEL: and_i8_ri:
; X86: # %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl %eax, %ecx
; X86-NEXT: andb $-17, %cl
; X86-NEXT: je .LBB0_2
@ -35,8 +35,8 @@ define i8 @and_i8_ri(i8 zeroext %0, i8 zeroext %1) {
define i8 @and_i8_rr(i8 zeroext %0, i8 zeroext %1) {
; X86-LABEL: and_i8_rr:
; X86: # %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: andb %al, %cl
; X86-NEXT: je .LBB1_2
; X86-NEXT: # %bb.1:

6
llvm/test/CodeGen/X86/arg-copy-elide.ll
View File

@ -74,7 +74,7 @@ define i1 @i1_arg(i1 %x) {
; CHECK: # %bb.0:
; CHECK-NEXT: pushl %ebx
; CHECK-NEXT: pushl %eax
; CHECK-NEXT: movb {{[0-9]+}}(%esp), %bl
; CHECK-NEXT: movzbl {{[0-9]+}}(%esp), %ebx
; CHECK-NEXT: movl %ebx, %eax
; CHECK-NEXT: andb $1, %al
; CHECK-NEXT: movb %al, {{[0-9]+}}(%esp)
@ -403,9 +403,9 @@ define i1 @use_i3(i3 %a1, i3 %a2) {
; CHECK-LABEL: use_i3:
; CHECK: # %bb.0:
; CHECK-NEXT: pushl %eax
; CHECK-NEXT: movb {{[0-9]+}}(%esp), %al
; CHECK-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; CHECK-NEXT: andb $7, %al
; CHECK-NEXT: movb {{[0-9]+}}(%esp), %cl
; CHECK-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; CHECK-NEXT: andb $7, %cl
; CHECK-NEXT: movb %cl, {{[0-9]+}}(%esp)
; CHECK-NEXT: cmpb %cl, %al

4
llvm/test/CodeGen/X86/atom-cmpb.ll
View File

@ -1,7 +1,7 @@
; RUN: llc < %s -mtriple=i686-- -mcpu=atom | FileCheck %s
; CHECK: movl
; CHECK: movb
; CHECK: movb
; CHECK: movzbl
; CHECK: movzbl
; CHECK: cmpb
; CHECK: notb
; CHECK: notb

4
llvm/test/CodeGen/X86/atomic-idempotent.ll
View File

@ -15,14 +15,14 @@ define i8 @add8(ptr %p) {
; X64-LABEL: add8:
; X64: # %bb.0:
; X64-NEXT: mfence
; X64-NEXT: movb (%rdi), %al
; X64-NEXT: movzbl (%rdi), %eax
; X64-NEXT: retq
;
; X86-SSE2-LABEL: add8:
; X86-SSE2: # %bb.0:
; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-SSE2-NEXT: mfence
; X86-SSE2-NEXT: movb (%eax), %al
; X86-SSE2-NEXT: movzbl (%eax), %eax
; X86-SSE2-NEXT: retl
;
; X86-SLM-LABEL: add8:

10
llvm/test/CodeGen/X86/atomic-mi.ll
View File

@ -182,7 +182,7 @@ define void @add_8r(ptr %p, i8 %v) {
;
; X32-LABEL: add_8r:
; X32: # %bb.0:
; X32-NEXT: movb {{[0-9]+}}(%esp), %al
; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X32-NEXT: addb %al, (%ecx)
; X32-NEXT: retl
@ -437,7 +437,7 @@ define void @sub_8r(ptr %p, i8 %v) {
;
; X32-LABEL: sub_8r:
; X32: # %bb.0:
; X32-NEXT: movb {{[0-9]+}}(%esp), %al
; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X32-NEXT: subb %al, (%ecx)
; X32-NEXT: retl
@ -616,7 +616,7 @@ define void @and_8r(ptr %p, i8 %v) {
;
; X32-LABEL: and_8r:
; X32: # %bb.0:
; X32-NEXT: movb {{[0-9]+}}(%esp), %al
; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X32-NEXT: andb %al, (%ecx)
; X32-NEXT: retl
@ -837,7 +837,7 @@ define void @or_8r(ptr %p, i8 %v) {
;
; X32-LABEL: or_8r:
; X32: # %bb.0:
; X32-NEXT: movb {{[0-9]+}}(%esp), %al
; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X32-NEXT: orb %al, (%ecx)
; X32-NEXT: retl
@ -1059,7 +1059,7 @@ define void @xor_8r(ptr %p, i8 %v) {
;
; X32-LABEL: xor_8r:
; X32: # %bb.0:
; X32-NEXT: movb {{[0-9]+}}(%esp), %al
; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X32-NEXT: xorb %al, (%ecx)
; X32-NEXT: retl

13
llvm/test/CodeGen/X86/atomic-monotonic.ll
View File

@ -3,10 +3,15 @@
; RUN: llc -O3 < %s -mtriple=x86_64-linux-generic -verify-machineinstrs -mattr=sse2 | FileCheck --check-prefixes=CHECK,CHECK-O3 %s
define i8 @load_i8(ptr %ptr) {
; CHECK-LABEL: load_i8:
; CHECK: # %bb.0:
; CHECK-NEXT: movb (%rdi), %al
; CHECK-NEXT: retq
; CHECK-O0-LABEL: load_i8:
; CHECK-O0: # %bb.0:
; CHECK-O0-NEXT: movb (%rdi), %al
; CHECK-O0-NEXT: retq
;
; CHECK-O3-LABEL: load_i8:
; CHECK-O3: # %bb.0:
; CHECK-O3-NEXT: movzbl (%rdi), %eax
; CHECK-O3-NEXT: retq
%v = load atomic i8, ptr %ptr monotonic, align 1
ret i8 %v
}

13
llvm/test/CodeGen/X86/atomic-unordered.ll
View File

@ -5,10 +5,15 @@
; RUN: llc -O3 < %s -mtriple=x86_64-linux-generic -verify-machineinstrs -mcpu=skylake -x86-experimental-unordered-atomic-isel=1 | FileCheck --check-prefixes=CHECK,CHECK-O3,CHECK-O3-EX %s
define i8 @load_i8(i8* %ptr) {
; CHECK-LABEL: load_i8:
; CHECK: # %bb.0:
; CHECK-NEXT: movb (%rdi), %al
; CHECK-NEXT: retq
; CHECK-O0-LABEL: load_i8:
; CHECK-O0: # %bb.0:
; CHECK-O0-NEXT: movb (%rdi), %al
; CHECK-O0-NEXT: retq
;
; CHECK-O3-LABEL: load_i8:
; CHECK-O3: # %bb.0:
; CHECK-O3-NEXT: movzbl (%rdi), %eax
; CHECK-O3-NEXT: retq
%v = load atomic i8, i8* %ptr unordered, align 1
ret i8 %v
}

48
llvm/test/CodeGen/X86/avoid-sfb-overlaps.ll
View File

@ -30,9 +30,9 @@ define dso_local void @test_overlap_1(ptr nocapture %A, i32 %x) local_unnamed_ad
; CHECK-NEXT: movl %eax, 24(%rdi)
; CHECK-NEXT: movzwl -4(%rdi), %eax
; CHECK-NEXT: movw %ax, 28(%rdi)
; CHECK-NEXT: movb -2(%rdi), %al
; CHECK-NEXT: movzbl -2(%rdi), %eax
; CHECK-NEXT: movb %al, 30(%rdi)
; CHECK-NEXT: movb -1(%rdi), %al
; CHECK-NEXT: movzbl -1(%rdi), %eax
; CHECK-NEXT: movb %al, 31(%rdi)
; CHECK-NEXT: retq
;
@ -68,9 +68,9 @@ define dso_local void @test_overlap_1(ptr nocapture %A, i32 %x) local_unnamed_ad
; CHECK-AVX2-NEXT: movl %eax, 24(%rdi)
; CHECK-AVX2-NEXT: movzwl -4(%rdi), %eax
; CHECK-AVX2-NEXT: movw %ax, 28(%rdi)
; CHECK-AVX2-NEXT: movb -2(%rdi), %al
; CHECK-AVX2-NEXT: movzbl -2(%rdi), %eax
; CHECK-AVX2-NEXT: movb %al, 30(%rdi)
; CHECK-AVX2-NEXT: movb -1(%rdi), %al
; CHECK-AVX2-NEXT: movzbl -1(%rdi), %eax
; CHECK-AVX2-NEXT: movb %al, 31(%rdi)
; CHECK-AVX2-NEXT: retq
;
@ -93,9 +93,9 @@ define dso_local void @test_overlap_1(ptr nocapture %A, i32 %x) local_unnamed_ad
; CHECK-AVX512-NEXT: movl %eax, 24(%rdi)
; CHECK-AVX512-NEXT: movzwl -4(%rdi), %eax
; CHECK-AVX512-NEXT: movw %ax, 28(%rdi)
; CHECK-AVX512-NEXT: movb -2(%rdi), %al
; CHECK-AVX512-NEXT: movzbl -2(%rdi), %eax
; CHECK-AVX512-NEXT: movb %al, 30(%rdi)
; CHECK-AVX512-NEXT: movb -1(%rdi), %al
; CHECK-AVX512-NEXT: movzbl -1(%rdi), %eax
; CHECK-AVX512-NEXT: movb %al, 31(%rdi)
; CHECK-AVX512-NEXT: retq
entry:
@ -223,9 +223,9 @@ define dso_local void @test_overlap_3(ptr nocapture %A, i32 %x) local_unnamed_ad
; CHECK-NEXT: movw %ax, 24(%rdi)
; CHECK-NEXT: movl -6(%rdi), %eax
; CHECK-NEXT: movl %eax, 26(%rdi)
; CHECK-NEXT: movb -2(%rdi), %al
; CHECK-NEXT: movzbl -2(%rdi), %eax
; CHECK-NEXT: movb %al, 30(%rdi)
; CHECK-NEXT: movb -1(%rdi), %al
; CHECK-NEXT: movzbl -1(%rdi), %eax
; CHECK-NEXT: movb %al, 31(%rdi)
; CHECK-NEXT: retq
;
@ -265,9 +265,9 @@ define dso_local void @test_overlap_3(ptr nocapture %A, i32 %x) local_unnamed_ad
; CHECK-AVX2-NEXT: movw %ax, 24(%rdi)
; CHECK-AVX2-NEXT: movl -6(%rdi), %eax
; CHECK-AVX2-NEXT: movl %eax, 26(%rdi)
; CHECK-AVX2-NEXT: movb -2(%rdi), %al
; CHECK-AVX2-NEXT: movzbl -2(%rdi), %eax
; CHECK-AVX2-NEXT: movb %al, 30(%rdi)
; CHECK-AVX2-NEXT: movb -1(%rdi), %al
; CHECK-AVX2-NEXT: movzbl -1(%rdi), %eax
; CHECK-AVX2-NEXT: movb %al, 31(%rdi)
; CHECK-AVX2-NEXT: retq
;
@ -294,9 +294,9 @@ define dso_local void @test_overlap_3(ptr nocapture %A, i32 %x) local_unnamed_ad
; CHECK-AVX512-NEXT: movw %ax, 24(%rdi)
; CHECK-AVX512-NEXT: movl -6(%rdi), %eax
; CHECK-AVX512-NEXT: movl %eax, 26(%rdi)
; CHECK-AVX512-NEXT: movb -2(%rdi), %al
; CHECK-AVX512-NEXT: movzbl -2(%rdi), %eax
; CHECK-AVX512-NEXT: movb %al, 30(%rdi)
; CHECK-AVX512-NEXT: movb -1(%rdi), %al
; CHECK-AVX512-NEXT: movzbl -1(%rdi), %eax
; CHECK-AVX512-NEXT: movb %al, 31(%rdi)
; CHECK-AVX512-NEXT: retq
entry:
@ -327,7 +327,7 @@ define dso_local void @test_overlap_4(ptr nocapture %A, i32 %x) local_unnamed_ad
; CHECK-NEXT: movl $0, -11(%rdi)
; CHECK-NEXT: movl -16(%rdi), %eax
; CHECK-NEXT: movl %eax, 16(%rdi)
; CHECK-NEXT: movb -12(%rdi), %al
; CHECK-NEXT: movzbl -12(%rdi), %eax
; CHECK-NEXT: movb %al, 20(%rdi)
; CHECK-NEXT: movl -11(%rdi), %eax
; CHECK-NEXT: movl %eax, 21(%rdi)
@ -335,7 +335,7 @@ define dso_local void @test_overlap_4(ptr nocapture %A, i32 %x) local_unnamed_ad
; CHECK-NEXT: movl %eax, 25(%rdi)
; CHECK-NEXT: movzwl -3(%rdi), %eax
; CHECK-NEXT: movw %ax, 29(%rdi)
; CHECK-NEXT: movb -1(%rdi), %al
; CHECK-NEXT: movzbl -1(%rdi), %eax
; CHECK-NEXT: movb %al, 31(%rdi)
; CHECK-NEXT: retq
;
@ -361,7 +361,7 @@ define dso_local void @test_overlap_4(ptr nocapture %A, i32 %x) local_unnamed_ad
; CHECK-AVX2-NEXT: movl $0, -11(%rdi)
; CHECK-AVX2-NEXT: movl -16(%rdi), %eax
; CHECK-AVX2-NEXT: movl %eax, 16(%rdi)
; CHECK-AVX2-NEXT: movb -12(%rdi), %al
; CHECK-AVX2-NEXT: movzbl -12(%rdi), %eax
; CHECK-AVX2-NEXT: movb %al, 20(%rdi)
; CHECK-AVX2-NEXT: movl -11(%rdi), %eax
; CHECK-AVX2-NEXT: movl %eax, 21(%rdi)
@ -369,7 +369,7 @@ define dso_local void @test_overlap_4(ptr nocapture %A, i32 %x) local_unnamed_ad
; CHECK-AVX2-NEXT: movl %eax, 25(%rdi)
; CHECK-AVX2-NEXT: movzwl -3(%rdi), %eax
; CHECK-AVX2-NEXT: movw %ax, 29(%rdi)
; CHECK-AVX2-NEXT: movb -1(%rdi), %al
; CHECK-AVX2-NEXT: movzbl -1(%rdi), %eax
; CHECK-AVX2-NEXT: movb %al, 31(%rdi)
; CHECK-AVX2-NEXT: retq
;
@ -383,7 +383,7 @@ define dso_local void @test_overlap_4(ptr nocapture %A, i32 %x) local_unnamed_ad
; CHECK-AVX512-NEXT: movl $0, -11(%rdi)
; CHECK-AVX512-NEXT: movl -16(%rdi), %eax
; CHECK-AVX512-NEXT: movl %eax, 16(%rdi)
; CHECK-AVX512-NEXT: movb -12(%rdi), %al
; CHECK-AVX512-NEXT: movzbl -12(%rdi), %eax
; CHECK-AVX512-NEXT: movb %al, 20(%rdi)
; CHECK-AVX512-NEXT: movl -11(%rdi), %eax
; CHECK-AVX512-NEXT: movl %eax, 21(%rdi)
@ -391,7 +391,7 @@ define dso_local void @test_overlap_4(ptr nocapture %A, i32 %x) local_unnamed_ad
; CHECK-AVX512-NEXT: movl %eax, 25(%rdi)
; CHECK-AVX512-NEXT: movzwl -3(%rdi), %eax
; CHECK-AVX512-NEXT: movw %ax, 29(%rdi)
; CHECK-AVX512-NEXT: movb -1(%rdi), %al
; CHECK-AVX512-NEXT: movzbl -1(%rdi), %eax
; CHECK-AVX512-NEXT: movb %al, 31(%rdi)
; CHECK-AVX512-NEXT: retq
entry:
@ -420,11 +420,11 @@ define dso_local void @test_overlap_5(ptr nocapture %A, i32 %x) local_unnamed_ad
; CHECK-NEXT: movb $0, -11(%rdi)
; CHECK-NEXT: movzwl -16(%rdi), %eax
; CHECK-NEXT: movw %ax, 16(%rdi)
; CHECK-NEXT: movb -14(%rdi), %al
; CHECK-NEXT: movzbl -14(%rdi), %eax
; CHECK-NEXT: movb %al, 18(%rdi)
; CHECK-NEXT: movzwl -13(%rdi), %eax
; CHECK-NEXT: movw %ax, 19(%rdi)
; CHECK-NEXT: movb -11(%rdi), %al
; CHECK-NEXT: movzbl -11(%rdi), %eax
; CHECK-NEXT: movb %al, 21(%rdi)
; CHECK-NEXT: movq -10(%rdi), %rax
; CHECK-NEXT: movq %rax, 22(%rdi)
@ -454,11 +454,11 @@ define dso_local void @test_overlap_5(ptr nocapture %A, i32 %x) local_unnamed_ad
; CHECK-AVX2-NEXT: movb $0, -11(%rdi)
; CHECK-AVX2-NEXT: movzwl -16(%rdi), %eax
; CHECK-AVX2-NEXT: movw %ax, 16(%rdi)
; CHECK-AVX2-NEXT: movb -14(%rdi), %al
; CHECK-AVX2-NEXT: movzbl -14(%rdi), %eax
; CHECK-AVX2-NEXT: movb %al, 18(%rdi)
; CHECK-AVX2-NEXT: movzwl -13(%rdi), %eax
; CHECK-AVX2-NEXT: movw %ax, 19(%rdi)
; CHECK-AVX2-NEXT: movb -11(%rdi), %al
; CHECK-AVX2-NEXT: movzbl -11(%rdi), %eax
; CHECK-AVX2-NEXT: movb %al, 21(%rdi)
; CHECK-AVX2-NEXT: movq -10(%rdi), %rax
; CHECK-AVX2-NEXT: movq %rax, 22(%rdi)
@ -476,11 +476,11 @@ define dso_local void @test_overlap_5(ptr nocapture %A, i32 %x) local_unnamed_ad
; CHECK-AVX512-NEXT: movb $0, -11(%rdi)
; CHECK-AVX512-NEXT: movzwl -16(%rdi), %eax
; CHECK-AVX512-NEXT: movw %ax, 16(%rdi)
; CHECK-AVX512-NEXT: movb -14(%rdi), %al
; CHECK-AVX512-NEXT: movzbl -14(%rdi), %eax
; CHECK-AVX512-NEXT: movb %al, 18(%rdi)
; CHECK-AVX512-NEXT: movzwl -13(%rdi), %eax
; CHECK-AVX512-NEXT: movw %ax, 19(%rdi)
; CHECK-AVX512-NEXT: movb -11(%rdi), %al
; CHECK-AVX512-NEXT: movzbl -11(%rdi), %eax
; CHECK-AVX512-NEXT: movb %al, 21(%rdi)
; CHECK-AVX512-NEXT: movq -10(%rdi), %rax
; CHECK-AVX512-NEXT: movq %rax, 22(%rdi)

12
llvm/test/CodeGen/X86/avoid-sfb.ll
View File

@ -436,13 +436,13 @@ define void @test_mixed_type(ptr nocapture noalias %s1, ptr nocapture %s2, i32 %
; CHECK-NEXT: .LBB5_2: # %if.end
; CHECK-NEXT: movq (%rdi), %rax
; CHECK-NEXT: movq %rax, (%rsi)
; CHECK-NEXT: movb 8(%rdi), %al
; CHECK-NEXT: movzbl 8(%rdi), %eax
; CHECK-NEXT: movb %al, 8(%rsi)
; CHECK-NEXT: movl 9(%rdi), %eax
; CHECK-NEXT: movl %eax, 9(%rsi)
; CHECK-NEXT: movzwl 13(%rdi), %eax
; CHECK-NEXT: movw %ax, 13(%rsi)
; CHECK-NEXT: movb 15(%rdi), %al
; CHECK-NEXT: movzbl 15(%rdi), %eax
; CHECK-NEXT: movb %al, 15(%rsi)
; CHECK-NEXT: retq
;
@ -470,13 +470,13 @@ define void @test_mixed_type(ptr nocapture noalias %s1, ptr nocapture %s2, i32 %
; CHECK-AVX2-NEXT: .LBB5_2: # %if.end
; CHECK-AVX2-NEXT: movq (%rdi), %rax
; CHECK-AVX2-NEXT: movq %rax, (%rsi)
; CHECK-AVX2-NEXT: movb 8(%rdi), %al
; CHECK-AVX2-NEXT: movzbl 8(%rdi), %eax
; CHECK-AVX2-NEXT: movb %al, 8(%rsi)
; CHECK-AVX2-NEXT: movl 9(%rdi), %eax
; CHECK-AVX2-NEXT: movl %eax, 9(%rsi)
; CHECK-AVX2-NEXT: movzwl 13(%rdi), %eax
; CHECK-AVX2-NEXT: movw %ax, 13(%rsi)
; CHECK-AVX2-NEXT: movb 15(%rdi), %al
; CHECK-AVX2-NEXT: movzbl 15(%rdi), %eax
; CHECK-AVX2-NEXT: movb %al, 15(%rsi)
; CHECK-AVX2-NEXT: retq
;
@ -491,13 +491,13 @@ define void @test_mixed_type(ptr nocapture noalias %s1, ptr nocapture %s2, i32 %
; CHECK-AVX512-NEXT: .LBB5_2: # %if.end
; CHECK-AVX512-NEXT: movq (%rdi), %rax
; CHECK-AVX512-NEXT: movq %rax, (%rsi)
; CHECK-AVX512-NEXT: movb 8(%rdi), %al
; CHECK-AVX512-NEXT: movzbl 8(%rdi), %eax
; CHECK-AVX512-NEXT: movb %al, 8(%rsi)
; CHECK-AVX512-NEXT: movl 9(%rdi), %eax
; CHECK-AVX512-NEXT: movl %eax, 9(%rsi)
; CHECK-AVX512-NEXT: movzwl 13(%rdi), %eax
; CHECK-AVX512-NEXT: movw %ax, 13(%rsi)
; CHECK-AVX512-NEXT: movb 15(%rdi), %al
; CHECK-AVX512-NEXT: movzbl 15(%rdi), %eax
; CHECK-AVX512-NEXT: movb %al, 15(%rsi)
; CHECK-AVX512-NEXT: retq
entry:

360
llvm/test/CodeGen/X86/avx512-calling-conv.ll
View File

File diff suppressed because it is too large Load Diff

232
llvm/test/CodeGen/X86/avx512-ext.ll
View File

@ -1886,10 +1886,10 @@ define void @extload_v8i64(ptr %a, ptr %res) {
define <64 x i16> @test21(<64 x i16> %x , <64 x i1> %mask) nounwind readnone {
; KNL-LABEL: test21:
; KNL: # %bb.0:
; KNL-NEXT: movb {{[0-9]+}}(%rsp), %al
; KNL-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; KNL-NEXT: andl $1, %eax
; KNL-NEXT: kmovw %eax, %k0
; KNL-NEXT: movb {{[0-9]+}}(%rsp), %al
; KNL-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; KNL-NEXT: kmovw %eax, %k1
; KNL-NEXT: kshiftlw $15, %k1, %k1
; KNL-NEXT: kshiftrw $14, %k1, %k1
@ -1899,7 +1899,7 @@ define <64 x i16> @test21(<64 x i16> %x , <64 x i1> %mask) nounwind readnone {
; KNL-NEXT: kandw %k1, %k0, %k0
; KNL-NEXT: kmovw %k1, %k7
; KNL-NEXT: kmovw %k1, {{[-0-9]+}}(%r{{[sb]}}p) # 2-byte Spill
; KNL-NEXT: movb {{[0-9]+}}(%rsp), %al
; KNL-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; KNL-NEXT: kmovw %eax, %k1
; KNL-NEXT: kshiftlw $15, %k1, %k1
; KNL-NEXT: kshiftrw $13, %k1, %k1
@ -1908,7 +1908,7 @@ define <64 x i16> @test21(<64 x i16> %x , <64 x i1> %mask) nounwind readnone {
; KNL-NEXT: kmovw %eax, %k1
; KNL-NEXT: kmovw %k1, {{[-0-9]+}}(%r{{[sb]}}p) # 2-byte Spill
; KNL-NEXT: kandw %k1, %k0, %k0
; KNL-NEXT: movb {{[0-9]+}}(%rsp), %al
; KNL-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; KNL-NEXT: kmovw %eax, %k1
; KNL-NEXT: kshiftlw $15, %k1, %k1
; KNL-NEXT: kshiftrw $12, %k1, %k1
@ -1917,7 +1917,7 @@ define <64 x i16> @test21(<64 x i16> %x , <64 x i1> %mask) nounwind readnone {
; KNL-NEXT: kmovw %eax, %k1
; KNL-NEXT: kmovw %k1, {{[-0-9]+}}(%r{{[sb]}}p) # 2-byte Spill
; KNL-NEXT: kandw %k1, %k0, %k0
; KNL-NEXT: movb {{[0-9]+}}(%rsp), %al
; KNL-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; KNL-NEXT: kmovw %eax, %k1
; KNL-NEXT: kshiftlw $15, %k1, %k1
; KNL-NEXT: kshiftrw $11, %k1, %k1
@ -1927,7 +1927,7 @@ define <64 x i16> @test21(<64 x i16> %x , <64 x i1> %mask) nounwind readnone {
; KNL-NEXT: kandw %k1, %k0, %k0
; KNL-NEXT: kmovw %k1, %k2
; KNL-NEXT: kmovw %k1, {{[-0-9]+}}(%r{{[sb]}}p) # 2-byte Spill
; KNL-NEXT: movb {{[0-9]+}}(%rsp), %al
; KNL-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; KNL-NEXT: kmovw %eax, %k1
; KNL-NEXT: kshiftlw $15, %k1, %k1
; KNL-NEXT: kshiftrw $10, %k1, %k1
@ -1936,7 +1936,7 @@ define <64 x i16> @test21(<64 x i16> %x , <64 x i1> %mask) nounwind readnone {
; KNL-NEXT: kmovw %eax, %k1
; KNL-NEXT: kmovw %k1, {{[-0-9]+}}(%r{{[sb]}}p) # 2-byte Spill
; KNL-NEXT: kandw %k1, %k0, %k0
; KNL-NEXT: movb {{[0-9]+}}(%rsp), %al
; KNL-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; KNL-NEXT: kmovw %eax, %k1
; KNL-NEXT: kshiftlw $15, %k1, %k1
; KNL-NEXT: kshiftrw $9, %k1, %k1
@ -1946,7 +1946,7 @@ define <64 x i16> @test21(<64 x i16> %x , <64 x i1> %mask) nounwind readnone {
; KNL-NEXT: kandw %k1, %k0, %k0
; KNL-NEXT: kmovw %k1, %k3
; KNL-NEXT: kmovw %k1, {{[-0-9]+}}(%r{{[sb]}}p) # 2-byte Spill
; KNL-NEXT: movb {{[0-9]+}}(%rsp), %al
; KNL-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; KNL-NEXT: kmovw %eax, %k1
; KNL-NEXT: kshiftlw $15, %k1, %k1
; KNL-NEXT: kshiftrw $8, %k1, %k1
@ -1955,7 +1955,7 @@ define <64 x i16> @test21(<64 x i16> %x , <64 x i1> %mask) nounwind readnone {
; KNL-NEXT: kmovw %eax, %k1
; KNL-NEXT: kmovw %k1, {{[-0-9]+}}(%r{{[sb]}}p) # 2-byte Spill
; KNL-NEXT: kandw %k1, %k0, %k0
; KNL-NEXT: movb {{[0-9]+}}(%rsp), %al
; KNL-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; KNL-NEXT: kmovw %eax, %k1
; KNL-NEXT: kshiftlw $15, %k1, %k1
; KNL-NEXT: kshiftrw $7, %k1, %k1
@ -1965,7 +1965,7 @@ define <64 x i16> @test21(<64 x i16> %x , <64 x i1> %mask) nounwind readnone {
; KNL-NEXT: kandw %k1, %k0, %k0
; KNL-NEXT: kmovw %k1, %k4
; KNL-NEXT: kmovw %k1, {{[-0-9]+}}(%r{{[sb]}}p) # 2-byte Spill
; KNL-NEXT: movb {{[0-9]+}}(%rsp), %al
; KNL-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; KNL-NEXT: kmovw %eax, %k1
; KNL-NEXT: kshiftlw $15, %k1, %k1
; KNL-NEXT: kshiftrw $6, %k1, %k1
@ -1974,7 +1974,7 @@ define <64 x i16> @test21(<64 x i16> %x , <64 x i1> %mask) nounwind readnone {
; KNL-NEXT: kmovw %eax, %k1
; KNL-NEXT: kmovw %k1, {{[-0-9]+}}(%r{{[sb]}}p) # 2-byte Spill
; KNL-NEXT: kandw %k1, %k0, %k0
; KNL-NEXT: movb {{[0-9]+}}(%rsp), %al
; KNL-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; KNL-NEXT: kmovw %eax, %k1
; KNL-NEXT: kshiftlw $15, %k1, %k1
; KNL-NEXT: kshiftrw $5, %k1, %k1
@ -1982,7 +1982,7 @@ define <64 x i16> @test21(<64 x i16> %x , <64 x i1> %mask) nounwind readnone {
; KNL-NEXT: movw $-2049, %ax # imm = 0xF7FF
; KNL-NEXT: kmovw %eax, %k5
; KNL-NEXT: kandw %k5, %k0, %k0
; KNL-NEXT: movb {{[0-9]+}}(%rsp), %al
; KNL-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; KNL-NEXT: kmovw %eax, %k1
; KNL-NEXT: kshiftlw $15, %k1, %k1
; KNL-NEXT: kshiftrw $4, %k1, %k1
@ -1991,7 +1991,7 @@ define <64 x i16> @test21(<64 x i16> %x , <64 x i1> %mask) nounwind readnone {
; KNL-NEXT: kmovw %eax, %k1
; KNL-NEXT: kmovw %k1, {{[-0-9]+}}(%r{{[sb]}}p) # 2-byte Spill
; KNL-NEXT: kandw %k1, %k0, %k0
; KNL-NEXT: movb {{[0-9]+}}(%rsp), %al
; KNL-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; KNL-NEXT: kmovw %eax, %k1
; KNL-NEXT: kshiftlw $15, %k1, %k1
; KNL-NEXT: kshiftrw $3, %k1, %k1
@ -2000,7 +2000,7 @@ define <64 x i16> @test21(<64 x i16> %x , <64 x i1> %mask) nounwind readnone {
; KNL-NEXT: kmovw %eax, %k1
; KNL-NEXT: kmovw %k1, {{[-0-9]+}}(%r{{[sb]}}p) # 2-byte Spill
; KNL-NEXT: kandw %k1, %k0, %k0
; KNL-NEXT: movb {{[0-9]+}}(%rsp), %al
; KNL-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; KNL-NEXT: kmovw %eax, %k1
; KNL-NEXT: kshiftlw $15, %k1, %k1
; KNL-NEXT: kshiftrw $2, %k1, %k1
@ -2009,13 +2009,13 @@ define <64 x i16> @test21(<64 x i16> %x , <64 x i1> %mask) nounwind readnone {
; KNL-NEXT: kmovw %eax, %k0
; KNL-NEXT: kmovw %k0, {{[-0-9]+}}(%r{{[sb]}}p) # 2-byte Spill
; KNL-NEXT: kandw %k0, %k1, %k1
; KNL-NEXT: movb {{[0-9]+}}(%rsp), %al
; KNL-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; KNL-NEXT: kmovw %eax, %k6
; KNL-NEXT: kshiftlw $14, %k6, %k6
; KNL-NEXT: korw %k6, %k1, %k1
; KNL-NEXT: kshiftlw $1, %k1, %k1
; KNL-NEXT: kshiftrw $1, %k1, %k1
; KNL-NEXT: movb {{[0-9]+}}(%rsp), %al
; KNL-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; KNL-NEXT: kmovw %eax, %k6
; KNL-NEXT: kshiftlw $15, %k6, %k6
; KNL-NEXT: korw %k6, %k1, %k1
@ -2050,74 +2050,74 @@ define <64 x i16> @test21(<64 x i16> %x , <64 x i1> %mask) nounwind readnone {
; KNL-NEXT: korw %k6, %k1, %k1
; KNL-NEXT: kmovw {{[-0-9]+}}(%r{{[sb]}}p), %k2 # 2-byte Reload
; KNL-NEXT: kandw %k2, %k1, %k1
; KNL-NEXT: movb {{[0-9]+}}(%rsp), %al
; KNL-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; KNL-NEXT: kmovw %eax, %k6
; KNL-NEXT: kshiftlw $15, %k6, %k6
; KNL-NEXT: kshiftrw $9, %k6, %k6
; KNL-NEXT: korw %k6, %k1, %k1
; KNL-NEXT: kandw %k3, %k1, %k1
; KNL-NEXT: movb {{[0-9]+}}(%rsp), %al
; KNL-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; KNL-NEXT: kmovw %eax, %k6
; KNL-NEXT: kshiftlw $15, %k6, %k6
; KNL-NEXT: kshiftrw $8, %k6, %k6
; KNL-NEXT: korw %k6, %k1, %k1
; KNL-NEXT: kmovw {{[-0-9]+}}(%r{{[sb]}}p), %k3 # 2-byte Reload
; KNL-NEXT: kandw %k3, %k1, %k1
; KNL-NEXT: movb {{[0-9]+}}(%rsp), %al
; KNL-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; KNL-NEXT: kmovw %eax, %k6
; KNL-NEXT: kshiftlw $15, %k6, %k6
; KNL-NEXT: kshiftrw $7, %k6, %k6
; KNL-NEXT: korw %k6, %k1, %k1
; KNL-NEXT: kandw %k4, %k1, %k1
; KNL-NEXT: movb {{[0-9]+}}(%rsp), %al
; KNL-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; KNL-NEXT: kmovw %eax, %k6
; KNL-NEXT: kshiftlw $15, %k6, %k6
; KNL-NEXT: kshiftrw $6, %k6, %k6
; KNL-NEXT: korw %k6, %k1, %k1
; KNL-NEXT: kmovw {{[-0-9]+}}(%r{{[sb]}}p), %k4 # 2-byte Reload
; KNL-NEXT: kandw %k4, %k1, %k1
; KNL-NEXT: movb {{[0-9]+}}(%rsp), %al
; KNL-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; KNL-NEXT: kmovw %eax, %k6
; KNL-NEXT: kshiftlw $15, %k6, %k6
; KNL-NEXT: kshiftrw $5, %k6, %k6
; KNL-NEXT: korw %k6, %k1, %k1
; KNL-NEXT: kmovw %k5, {{[-0-9]+}}(%r{{[sb]}}p) # 2-byte Spill
; KNL-NEXT: kandw %k5, %k1, %k1
; KNL-NEXT: movb {{[0-9]+}}(%rsp), %al
; KNL-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; KNL-NEXT: kmovw %eax, %k6
; KNL-NEXT: kshiftlw $15, %k6, %k6
; KNL-NEXT: kshiftrw $4, %k6, %k6
; KNL-NEXT: korw %k6, %k1, %k1
; KNL-NEXT: kmovw {{[-0-9]+}}(%r{{[sb]}}p), %k6 # 2-byte Reload
; KNL-NEXT: kandw %k6, %k1, %k1
; KNL-NEXT: movb {{[0-9]+}}(%rsp), %al
; KNL-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; KNL-NEXT: kmovw %eax, %k6
; KNL-NEXT: kshiftlw $15, %k6, %k6
; KNL-NEXT: kshiftrw $3, %k6, %k6
; KNL-NEXT: korw %k6, %k1, %k1
; KNL-NEXT: kmovw {{[-0-9]+}}(%r{{[sb]}}p), %k6 # 2-byte Reload
; KNL-NEXT: kandw %k6, %k1, %k1
; KNL-NEXT: movb {{[0-9]+}}(%rsp), %al
; KNL-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; KNL-NEXT: kmovw %eax, %k6
; KNL-NEXT: kshiftlw $15, %k6, %k6
; KNL-NEXT: kshiftrw $2, %k6, %k6
; KNL-NEXT: korw %k6, %k1, %k1
; KNL-NEXT: kmovw {{[-0-9]+}}(%r{{[sb]}}p), %k6 # 2-byte Reload
; KNL-NEXT: kandw %k6, %k1, %k1
; KNL-NEXT: movb {{[0-9]+}}(%rsp), %al
; KNL-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; KNL-NEXT: kmovw %eax, %k6
; KNL-NEXT: kshiftlw $14, %k6, %k6
; KNL-NEXT: korw %k6, %k1, %k1
; KNL-NEXT: kshiftlw $1, %k1, %k1
; KNL-NEXT: kshiftrw $1, %k1, %k1
; KNL-NEXT: movb {{[0-9]+}}(%rsp), %al
; KNL-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; KNL-NEXT: kmovw %eax, %k6
; KNL-NEXT: kshiftlw $15, %k6, %k6
; KNL-NEXT: korw %k6, %k1, %k1
; KNL-NEXT: kmovw %k1, {{[-0-9]+}}(%r{{[sb]}}p) # 2-byte Spill
; KNL-NEXT: movb {{[0-9]+}}(%rsp), %al
; KNL-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; KNL-NEXT: andl $1, %eax
; KNL-NEXT: movb {{[0-9]+}}(%rsp), %cl
; KNL-NEXT: movzbl {{[0-9]+}}(%rsp), %ecx
; KNL-NEXT: kmovw %ecx, %k1
; KNL-NEXT: kshiftlw $15, %k1, %k1
; KNL-NEXT: kshiftrw $14, %k1, %k1
@ -2125,97 +2125,97 @@ define <64 x i16> @test21(<64 x i16> %x , <64 x i1> %mask) nounwind readnone {
; KNL-NEXT: korw %k1, %k6, %k1
; KNL-NEXT: kmovw {{[-0-9]+}}(%r{{[sb]}}p), %k6 # 2-byte Reload
; KNL-NEXT: kandw %k6, %k1, %k1
; KNL-NEXT: movb {{[0-9]+}}(%rsp), %al
; KNL-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; KNL-NEXT: kmovw %eax, %k6
; KNL-NEXT: kshiftlw $15, %k6, %k6
; KNL-NEXT: kshiftrw $13, %k6, %k6
; KNL-NEXT: korw %k6, %k1, %k1
; KNL-NEXT: kandw %k7, %k1, %k1
; KNL-NEXT: movb {{[0-9]+}}(%rsp), %al
; KNL-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; KNL-NEXT: kmovw %eax, %k6
; KNL-NEXT: kshiftlw $15, %k6, %k6
; KNL-NEXT: kshiftrw $12, %k6, %k6
; KNL-NEXT: korw %k6, %k1, %k1
; KNL-NEXT: kandw %k0, %k1, %k1
; KNL-NEXT: movb {{[0-9]+}}(%rsp), %al
; KNL-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; KNL-NEXT: kmovw %eax, %k6
; KNL-NEXT: kshiftlw $15, %k6, %k6
; KNL-NEXT: kshiftrw $11, %k6, %k6
; KNL-NEXT: korw %k6, %k1, %k1
; KNL-NEXT: kmovw {{[-0-9]+}}(%r{{[sb]}}p), %k0 # 2-byte Reload
; KNL-NEXT: kandw %k0, %k1, %k1
; KNL-NEXT: movb {{[0-9]+}}(%rsp), %al
; KNL-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; KNL-NEXT: kmovw %eax, %k6
; KNL-NEXT: kshiftlw $15, %k6, %k6
; KNL-NEXT: kshiftrw $10, %k6, %k6
; KNL-NEXT: korw %k6, %k1, %k1
; KNL-NEXT: kandw %k2, %k1, %k1
; KNL-NEXT: movb {{[0-9]+}}(%rsp), %al
; KNL-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; KNL-NEXT: kmovw %eax, %k6
; KNL-NEXT: kshiftlw $15, %k6, %k6
; KNL-NEXT: kshiftrw $9, %k6, %k6
; KNL-NEXT: korw %k6, %k1, %k1
; KNL-NEXT: kmovw {{[-0-9]+}}(%r{{[sb]}}p), %k0 # 2-byte Reload
; KNL-NEXT: kandw %k0, %k1, %k1
; KNL-NEXT: movb {{[0-9]+}}(%rsp), %al
; KNL-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; KNL-NEXT: kmovw %eax, %k6
; KNL-NEXT: kshiftlw $15, %k6, %k6
; KNL-NEXT: kshiftrw $8, %k6, %k6
; KNL-NEXT: korw %k6, %k1, %k1
; KNL-NEXT: kandw %k3, %k1, %k1
; KNL-NEXT: movb {{[0-9]+}}(%rsp), %al
; KNL-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; KNL-NEXT: kmovw %eax, %k6
; KNL-NEXT: kshiftlw $15, %k6, %k6
; KNL-NEXT: kshiftrw $7, %k6, %k6
; KNL-NEXT: korw %k6, %k1, %k1
; KNL-NEXT: kmovw {{[-0-9]+}}(%r{{[sb]}}p), %k3 # 2-byte Reload
; KNL-NEXT: kandw %k3, %k1, %k1
; KNL-NEXT: movb {{[0-9]+}}(%rsp), %al
; KNL-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; KNL-NEXT: kmovw %eax, %k6
; KNL-NEXT: kshiftlw $15, %k6, %k6
; KNL-NEXT: kshiftrw $6, %k6, %k6
; KNL-NEXT: korw %k6, %k1, %k1
; KNL-NEXT: kandw %k4, %k1, %k1
; KNL-NEXT: movb {{[0-9]+}}(%rsp), %al
; KNL-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; KNL-NEXT: kmovw %eax, %k6
; KNL-NEXT: kshiftlw $15, %k6, %k6
; KNL-NEXT: kshiftrw $5, %k6, %k6
; KNL-NEXT: korw %k6, %k1, %k1
; KNL-NEXT: kandw %k5, %k1, %k1
; KNL-NEXT: movb {{[0-9]+}}(%rsp), %al
; KNL-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; KNL-NEXT: kmovw %eax, %k6
; KNL-NEXT: kshiftlw $15, %k6, %k6
; KNL-NEXT: kshiftrw $4, %k6, %k6
; KNL-NEXT: korw %k6, %k1, %k1
; KNL-NEXT: kmovw {{[-0-9]+}}(%r{{[sb]}}p), %k0 # 2-byte Reload
; KNL-NEXT: kandw %k0, %k1, %k1
; KNL-NEXT: movb {{[0-9]+}}(%rsp), %al
; KNL-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; KNL-NEXT: kmovw %eax, %k6
; KNL-NEXT: kshiftlw $15, %k6, %k6
; KNL-NEXT: kshiftrw $3, %k6, %k6
; KNL-NEXT: korw %k6, %k1, %k1
; KNL-NEXT: kmovw {{[-0-9]+}}(%r{{[sb]}}p), %k2 # 2-byte Reload
; KNL-NEXT: kandw %k2, %k1, %k1
; KNL-NEXT: movb {{[0-9]+}}(%rsp), %al
; KNL-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; KNL-NEXT: kmovw %eax, %k6
; KNL-NEXT: kshiftlw $15, %k6, %k6
; KNL-NEXT: kshiftrw $2, %k6, %k6
; KNL-NEXT: korw %k6, %k1, %k1
; KNL-NEXT: kmovw {{[-0-9]+}}(%r{{[sb]}}p), %k5 # 2-byte Reload
; KNL-NEXT: kandw %k5, %k1, %k1
; KNL-NEXT: movb {{[0-9]+}}(%rsp), %al
; KNL-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; KNL-NEXT: kmovw %eax, %k6
; KNL-NEXT: kshiftlw $14, %k6, %k6
; KNL-NEXT: korw %k6, %k1, %k1
; KNL-NEXT: kshiftlw $1, %k1, %k1
; KNL-NEXT: kshiftrw $1, %k1, %k1
; KNL-NEXT: movb {{[0-9]+}}(%rsp), %al
; KNL-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; KNL-NEXT: kmovw %eax, %k6
; KNL-NEXT: kshiftlw $15, %k6, %k6
; KNL-NEXT: korw %k6, %k1, %k1
; KNL-NEXT: movb {{[0-9]+}}(%rsp), %al
; KNL-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; KNL-NEXT: andl $1, %eax
; KNL-NEXT: movb {{[0-9]+}}(%rsp), %cl
; KNL-NEXT: movzbl {{[0-9]+}}(%rsp), %ecx
; KNL-NEXT: kmovw %ecx, %k6
; KNL-NEXT: kshiftlw $15, %k6, %k6
; KNL-NEXT: kshiftrw $14, %k6, %k6
@ -2223,93 +2223,93 @@ define <64 x i16> @test21(<64 x i16> %x , <64 x i1> %mask) nounwind readnone {
; KNL-NEXT: korw %k6, %k7, %k6
; KNL-NEXT: kmovw {{[-0-9]+}}(%r{{[sb]}}p), %k5 # 2-byte Reload
; KNL-NEXT: kandw %k5, %k6, %k6
; KNL-NEXT: movb {{[0-9]+}}(%rsp), %al
; KNL-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; KNL-NEXT: kmovw %eax, %k7
; KNL-NEXT: kshiftlw $15, %k7, %k7
; KNL-NEXT: kshiftrw $13, %k7, %k7
; KNL-NEXT: korw %k7, %k6, %k6
; KNL-NEXT: kmovw {{[-0-9]+}}(%r{{[sb]}}p), %k5 # 2-byte Reload
; KNL-NEXT: kandw %k5, %k6, %k6
; KNL-NEXT: movb {{[0-9]+}}(%rsp), %al
; KNL-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; KNL-NEXT: kmovw %eax, %k7
; KNL-NEXT: kshiftlw $15, %k7, %k7
; KNL-NEXT: kshiftrw $12, %k7, %k7
; KNL-NEXT: korw %k7, %k6, %k6
; KNL-NEXT: kmovw {{[-0-9]+}}(%r{{[sb]}}p), %k5 # 2-byte Reload
; KNL-NEXT: kandw %k5, %k6, %k6
; KNL-NEXT: movb {{[0-9]+}}(%rsp), %al
; KNL-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; KNL-NEXT: kmovw %eax, %k7
; KNL-NEXT: kshiftlw $15, %k7, %k7
; KNL-NEXT: kshiftrw $11, %k7, %k7
; KNL-NEXT: korw %k7, %k6, %k6
; KNL-NEXT: kmovw {{[-0-9]+}}(%r{{[sb]}}p), %k5 # 2-byte Reload
; KNL-NEXT: kandw %k5, %k6, %k6
; KNL-NEXT: movb {{[0-9]+}}(%rsp), %al
; KNL-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; KNL-NEXT: kmovw %eax, %k7
; KNL-NEXT: kshiftlw $15, %k7, %k7
; KNL-NEXT: kshiftrw $10, %k7, %k7
; KNL-NEXT: korw %k7, %k6, %k6
; KNL-NEXT: kmovw {{[-0-9]+}}(%r{{[sb]}}p), %k5 # 2-byte Reload
; KNL-NEXT: kandw %k5, %k6, %k6
; KNL-NEXT: movb {{[0-9]+}}(%rsp), %al
; KNL-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; KNL-NEXT: kmovw %eax, %k7
; KNL-NEXT: kshiftlw $15, %k7, %k7
; KNL-NEXT: kshiftrw $9, %k7, %k7
; KNL-NEXT: korw %k7, %k6, %k6
; KNL-NEXT: kmovw {{[-0-9]+}}(%r{{[sb]}}p), %k5 # 2-byte Reload
; KNL-NEXT: kandw %k5, %k6, %k6
; KNL-NEXT: movb {{[0-9]+}}(%rsp), %al
; KNL-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; KNL-NEXT: kmovw %eax, %k7
; KNL-NEXT: kshiftlw $15, %k7, %k7
; KNL-NEXT: kshiftrw $8, %k7, %k7
; KNL-NEXT: korw %k7, %k6, %k6
; KNL-NEXT: kmovw {{[-0-9]+}}(%r{{[sb]}}p), %k5 # 2-byte Reload
; KNL-NEXT: kandw %k5, %k6, %k6
; KNL-NEXT: movb {{[0-9]+}}(%rsp), %al
; KNL-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; KNL-NEXT: kmovw %eax, %k7
; KNL-NEXT: kshiftlw $15, %k7, %k7
; KNL-NEXT: kshiftrw $7, %k7, %k7
; KNL-NEXT: korw %k7, %k6, %k6
; KNL-NEXT: kandw %k3, %k6, %k6
; KNL-NEXT: movb {{[0-9]+}}(%rsp), %al
; KNL-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; KNL-NEXT: kmovw %eax, %k7
; KNL-NEXT: kshiftlw $15, %k7, %k7
; KNL-NEXT: kshiftrw $6, %k7, %k7
; KNL-NEXT: korw %k7, %k6, %k6
; KNL-NEXT: kandw %k4, %k6, %k5
; KNL-NEXT: movb {{[0-9]+}}(%rsp), %al
; KNL-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; KNL-NEXT: kmovw %eax, %k6
; KNL-NEXT: kshiftlw $15, %k6, %k6
; KNL-NEXT: kshiftrw $5, %k6, %k6
; KNL-NEXT: korw %k6, %k5, %k5
; KNL-NEXT: kmovw {{[-0-9]+}}(%r{{[sb]}}p), %k3 # 2-byte Reload
; KNL-NEXT: kandw %k3, %k5, %k4
; KNL-NEXT: movb {{[0-9]+}}(%rsp), %al
; KNL-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; KNL-NEXT: kmovw %eax, %k5
; KNL-NEXT: kshiftlw $15, %k5, %k5
; KNL-NEXT: kshiftrw $4, %k5, %k5
; KNL-NEXT: korw %k5, %k4, %k4
; KNL-NEXT: kandw %k0, %k4, %k3
; KNL-NEXT: movb {{[0-9]+}}(%rsp), %al
; KNL-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; KNL-NEXT: kmovw %eax, %k4
; KNL-NEXT: kshiftlw $15, %k4, %k4
; KNL-NEXT: kshiftrw $3, %k4, %k4
; KNL-NEXT: korw %k4, %k3, %k3
; KNL-NEXT: kandw %k2, %k3, %k2
; KNL-NEXT: movb {{[0-9]+}}(%rsp), %al
; KNL-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; KNL-NEXT: kmovw %eax, %k3
; KNL-NEXT: kshiftlw $15, %k3, %k3
; KNL-NEXT: kshiftrw $2, %k3, %k3
; KNL-NEXT: korw %k3, %k2, %k2
; KNL-NEXT: kmovw {{[-0-9]+}}(%r{{[sb]}}p), %k0 # 2-byte Reload
; KNL-NEXT: kandw %k0, %k2, %k0
; KNL-NEXT: movb {{[0-9]+}}(%rsp), %al
; KNL-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; KNL-NEXT: kmovw %eax, %k2
; KNL-NEXT: kshiftlw $14, %k2, %k2
; KNL-NEXT: korw %k2, %k0, %k0
; KNL-NEXT: kshiftlw $1, %k0, %k0
; KNL-NEXT: kshiftrw $1, %k0, %k0
; KNL-NEXT: movb {{[0-9]+}}(%rsp), %al
; KNL-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; KNL-NEXT: kmovw %eax, %k2
; KNL-NEXT: kshiftlw $15, %k2, %k2
; KNL-NEXT: korw %k2, %k0, %k2
@ -2340,10 +2340,10 @@ define <64 x i16> @test21(<64 x i16> %x , <64 x i1> %mask) nounwind readnone {
;
; AVX512DQNOBW-LABEL: test21:
; AVX512DQNOBW: # %bb.0:
; AVX512DQNOBW-NEXT: movb {{[0-9]+}}(%rsp), %al
; AVX512DQNOBW-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; AVX512DQNOBW-NEXT: andl $1, %eax
; AVX512DQNOBW-NEXT: kmovw %eax, %k0
; AVX512DQNOBW-NEXT: movb {{[0-9]+}}(%rsp), %al
; AVX512DQNOBW-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; AVX512DQNOBW-NEXT: kmovw %eax, %k1
; AVX512DQNOBW-NEXT: kshiftlw $15, %k1, %k1
; AVX512DQNOBW-NEXT: kshiftrw $14, %k1, %k1
@ -2353,7 +2353,7 @@ define <64 x i16> @test21(<64 x i16> %x , <64 x i1> %mask) nounwind readnone {
; AVX512DQNOBW-NEXT: kandw %k1, %k0, %k0
; AVX512DQNOBW-NEXT: kmovw %k1, %k7
; AVX512DQNOBW-NEXT: kmovw %k1, {{[-0-9]+}}(%r{{[sb]}}p) # 2-byte Spill
; AVX512DQNOBW-NEXT: movb {{[0-9]+}}(%rsp), %al
; AVX512DQNOBW-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; AVX512DQNOBW-NEXT: kmovw %eax, %k1
; AVX512DQNOBW-NEXT: kshiftlw $15, %k1, %k1
; AVX512DQNOBW-NEXT: kshiftrw $13, %k1, %k1
@ -2362,7 +2362,7 @@ define <64 x i16> @test21(<64 x i16> %x , <64 x i1> %mask) nounwind readnone {
; AVX512DQNOBW-NEXT: kmovw %eax, %k1
; AVX512DQNOBW-NEXT: kmovw %k1, {{[-0-9]+}}(%r{{[sb]}}p) # 2-byte Spill
; AVX512DQNOBW-NEXT: kandw %k1, %k0, %k0
; AVX512DQNOBW-NEXT: movb {{[0-9]+}}(%rsp), %al
; AVX512DQNOBW-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; AVX512DQNOBW-NEXT: kmovw %eax, %k1
; AVX512DQNOBW-NEXT: kshiftlw $15, %k1, %k1
; AVX512DQNOBW-NEXT: kshiftrw $12, %k1, %k1
@ -2371,7 +2371,7 @@ define <64 x i16> @test21(<64 x i16> %x , <64 x i1> %mask) nounwind readnone {
; AVX512DQNOBW-NEXT: kmovw %eax, %k1
; AVX512DQNOBW-NEXT: kmovw %k1, {{[-0-9]+}}(%r{{[sb]}}p) # 2-byte Spill
; AVX512DQNOBW-NEXT: kandw %k1, %k0, %k0
; AVX512DQNOBW-NEXT: movb {{[0-9]+}}(%rsp), %al
; AVX512DQNOBW-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; AVX512DQNOBW-NEXT: kmovw %eax, %k1
; AVX512DQNOBW-NEXT: kshiftlw $15, %k1, %k1
; AVX512DQNOBW-NEXT: kshiftrw $11, %k1, %k1
@ -2381,7 +2381,7 @@ define <64 x i16> @test21(<64 x i16> %x , <64 x i1> %mask) nounwind readnone {
; AVX512DQNOBW-NEXT: kandw %k1, %k0, %k0
; AVX512DQNOBW-NEXT: kmovw %k1, %k2
; AVX512DQNOBW-NEXT: kmovw %k1, {{[-0-9]+}}(%r{{[sb]}}p) # 2-byte Spill
; AVX512DQNOBW-NEXT: movb {{[0-9]+}}(%rsp), %al
; AVX512DQNOBW-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; AVX512DQNOBW-NEXT: kmovw %eax, %k1
; AVX512DQNOBW-NEXT: kshiftlw $15, %k1, %k1
; AVX512DQNOBW-NEXT: kshiftrw $10, %k1, %k1
@ -2390,7 +2390,7 @@ define <64 x i16> @test21(<64 x i16> %x , <64 x i1> %mask) nounwind readnone {
; AVX512DQNOBW-NEXT: kmovw %eax, %k1
; AVX512DQNOBW-NEXT: kmovw %k1, {{[-0-9]+}}(%r{{[sb]}}p) # 2-byte Spill
; AVX512DQNOBW-NEXT: kandw %k1, %k0, %k0
; AVX512DQNOBW-NEXT: movb {{[0-9]+}}(%rsp), %al
; AVX512DQNOBW-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; AVX512DQNOBW-NEXT: kmovw %eax, %k1
; AVX512DQNOBW-NEXT: kshiftlw $15, %k1, %k1
; AVX512DQNOBW-NEXT: kshiftrw $9, %k1, %k1
@ -2400,7 +2400,7 @@ define <64 x i16> @test21(<64 x i16> %x , <64 x i1> %mask) nounwind readnone {
; AVX512DQNOBW-NEXT: kandw %k1, %k0, %k0
; AVX512DQNOBW-NEXT: kmovw %k1, %k3
; AVX512DQNOBW-NEXT: kmovw %k1, {{[-0-9]+}}(%r{{[sb]}}p) # 2-byte Spill
; AVX512DQNOBW-NEXT: movb {{[0-9]+}}(%rsp), %al
; AVX512DQNOBW-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; AVX512DQNOBW-NEXT: kmovw %eax, %k1
; AVX512DQNOBW-NEXT: kshiftlw $15, %k1, %k1
; AVX512DQNOBW-NEXT: kshiftrw $8, %k1, %k1
@ -2409,7 +2409,7 @@ define <64 x i16> @test21(<64 x i16> %x , <64 x i1> %mask) nounwind readnone {
; AVX512DQNOBW-NEXT: kmovw %eax, %k1
; AVX512DQNOBW-NEXT: kmovw %k1, {{[-0-9]+}}(%r{{[sb]}}p) # 2-byte Spill
; AVX512DQNOBW-NEXT: kandw %k1, %k0, %k0
; AVX512DQNOBW-NEXT: movb {{[0-9]+}}(%rsp), %al
; AVX512DQNOBW-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; AVX512DQNOBW-NEXT: kmovw %eax, %k1
; AVX512DQNOBW-NEXT: kshiftlw $15, %k1, %k1
; AVX512DQNOBW-NEXT: kshiftrw $7, %k1, %k1
@ -2419,7 +2419,7 @@ define <64 x i16> @test21(<64 x i16> %x , <64 x i1> %mask) nounwind readnone {
; AVX512DQNOBW-NEXT: kandw %k1, %k0, %k0
; AVX512DQNOBW-NEXT: kmovw %k1, %k4
; AVX512DQNOBW-NEXT: kmovw %k1, {{[-0-9]+}}(%r{{[sb]}}p) # 2-byte Spill
; AVX512DQNOBW-NEXT: movb {{[0-9]+}}(%rsp), %al
; AVX512DQNOBW-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; AVX512DQNOBW-NEXT: kmovw %eax, %k1
; AVX512DQNOBW-NEXT: kshiftlw $15, %k1, %k1
; AVX512DQNOBW-NEXT: kshiftrw $6, %k1, %k1
@ -2428,7 +2428,7 @@ define <64 x i16> @test21(<64 x i16> %x , <64 x i1> %mask) nounwind readnone {
; AVX512DQNOBW-NEXT: kmovw %eax, %k1
; AVX512DQNOBW-NEXT: kmovw %k1, {{[-0-9]+}}(%r{{[sb]}}p) # 2-byte Spill
; AVX512DQNOBW-NEXT: kandw %k1, %k0, %k0
; AVX512DQNOBW-NEXT: movb {{[0-9]+}}(%rsp), %al
; AVX512DQNOBW-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; AVX512DQNOBW-NEXT: kmovw %eax, %k1
; AVX512DQNOBW-NEXT: kshiftlw $15, %k1, %k1
; AVX512DQNOBW-NEXT: kshiftrw $5, %k1, %k1
@ -2436,7 +2436,7 @@ define <64 x i16> @test21(<64 x i16> %x , <64 x i1> %mask) nounwind readnone {
; AVX512DQNOBW-NEXT: movw $-2049, %ax # imm = 0xF7FF
; AVX512DQNOBW-NEXT: kmovw %eax, %k5
; AVX512DQNOBW-NEXT: kandw %k5, %k0, %k0
; AVX512DQNOBW-NEXT: movb {{[0-9]+}}(%rsp), %al
; AVX512DQNOBW-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; AVX512DQNOBW-NEXT: kmovw %eax, %k1
; AVX512DQNOBW-NEXT: kshiftlw $15, %k1, %k1
; AVX512DQNOBW-NEXT: kshiftrw $4, %k1, %k1
@ -2445,7 +2445,7 @@ define <64 x i16> @test21(<64 x i16> %x , <64 x i1> %mask) nounwind readnone {
; AVX512DQNOBW-NEXT: kmovw %eax, %k1
; AVX512DQNOBW-NEXT: kmovw %k1, {{[-0-9]+}}(%r{{[sb]}}p) # 2-byte Spill
; AVX512DQNOBW-NEXT: kandw %k1, %k0, %k0
; AVX512DQNOBW-NEXT: movb {{[0-9]+}}(%rsp), %al
; AVX512DQNOBW-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; AVX512DQNOBW-NEXT: kmovw %eax, %k1
; AVX512DQNOBW-NEXT: kshiftlw $15, %k1, %k1
; AVX512DQNOBW-NEXT: kshiftrw $3, %k1, %k1
@ -2454,7 +2454,7 @@ define <64 x i16> @test21(<64 x i16> %x , <64 x i1> %mask) nounwind readnone {
; AVX512DQNOBW-NEXT: kmovw %eax, %k1
; AVX512DQNOBW-NEXT: kmovw %k1, {{[-0-9]+}}(%r{{[sb]}}p) # 2-byte Spill
; AVX512DQNOBW-NEXT: kandw %k1, %k0, %k0
; AVX512DQNOBW-NEXT: movb {{[0-9]+}}(%rsp), %al
; AVX512DQNOBW-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; AVX512DQNOBW-NEXT: kmovw %eax, %k1
; AVX512DQNOBW-NEXT: kshiftlw $15, %k1, %k1
; AVX512DQNOBW-NEXT: kshiftrw $2, %k1, %k1
@ -2463,13 +2463,13 @@ define <64 x i16> @test21(<64 x i16> %x , <64 x i1> %mask) nounwind readnone {
; AVX512DQNOBW-NEXT: kmovw %eax, %k1
; AVX512DQNOBW-NEXT: kmovw %k1, {{[-0-9]+}}(%r{{[sb]}}p) # 2-byte Spill
; AVX512DQNOBW-NEXT: kandw %k1, %k0, %k0
; AVX512DQNOBW-NEXT: movb {{[0-9]+}}(%rsp), %al
; AVX512DQNOBW-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; AVX512DQNOBW-NEXT: kmovw %eax, %k6
; AVX512DQNOBW-NEXT: kshiftlw $14, %k6, %k6
; AVX512DQNOBW-NEXT: korw %k6, %k0, %k0
; AVX512DQNOBW-NEXT: kshiftlw $1, %k0, %k0
; AVX512DQNOBW-NEXT: kshiftrw $1, %k0, %k0
; AVX512DQNOBW-NEXT: movb {{[0-9]+}}(%rsp), %al
; AVX512DQNOBW-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; AVX512DQNOBW-NEXT: kmovw %eax, %k6
; AVX512DQNOBW-NEXT: kshiftlw $15, %k6, %k6
; AVX512DQNOBW-NEXT: korw %k6, %k0, %k0
@ -2504,74 +2504,74 @@ define <64 x i16> @test21(<64 x i16> %x , <64 x i1> %mask) nounwind readnone {
; AVX512DQNOBW-NEXT: korw %k6, %k0, %k0
; AVX512DQNOBW-NEXT: kmovw {{[-0-9]+}}(%r{{[sb]}}p), %k2 # 2-byte Reload
; AVX512DQNOBW-NEXT: kandw %k2, %k0, %k0
; AVX512DQNOBW-NEXT: movb {{[0-9]+}}(%rsp), %al
; AVX512DQNOBW-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; AVX512DQNOBW-NEXT: kmovw %eax, %k6
; AVX512DQNOBW-NEXT: kshiftlw $15, %k6, %k6
; AVX512DQNOBW-NEXT: kshiftrw $9, %k6, %k6
; AVX512DQNOBW-NEXT: korw %k6, %k0, %k0
; AVX512DQNOBW-NEXT: kandw %k3, %k0, %k0
; AVX512DQNOBW-NEXT: movb {{[0-9]+}}(%rsp), %al
; AVX512DQNOBW-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; AVX512DQNOBW-NEXT: kmovw %eax, %k6
; AVX512DQNOBW-NEXT: kshiftlw $15, %k6, %k6
; AVX512DQNOBW-NEXT: kshiftrw $8, %k6, %k6
; AVX512DQNOBW-NEXT: korw %k6, %k0, %k0
; AVX512DQNOBW-NEXT: kmovw {{[-0-9]+}}(%r{{[sb]}}p), %k3 # 2-byte Reload
; AVX512DQNOBW-NEXT: kandw %k3, %k0, %k0
; AVX512DQNOBW-NEXT: movb {{[0-9]+}}(%rsp), %al
; AVX512DQNOBW-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; AVX512DQNOBW-NEXT: kmovw %eax, %k6
; AVX512DQNOBW-NEXT: kshiftlw $15, %k6, %k6
; AVX512DQNOBW-NEXT: kshiftrw $7, %k6, %k6
; AVX512DQNOBW-NEXT: korw %k6, %k0, %k0
; AVX512DQNOBW-NEXT: kandw %k4, %k0, %k0
; AVX512DQNOBW-NEXT: movb {{[0-9]+}}(%rsp), %al
; AVX512DQNOBW-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; AVX512DQNOBW-NEXT: kmovw %eax, %k6
; AVX512DQNOBW-NEXT: kshiftlw $15, %k6, %k6
; AVX512DQNOBW-NEXT: kshiftrw $6, %k6, %k6
; AVX512DQNOBW-NEXT: korw %k6, %k0, %k0
; AVX512DQNOBW-NEXT: kmovw {{[-0-9]+}}(%r{{[sb]}}p), %k4 # 2-byte Reload
; AVX512DQNOBW-NEXT: kandw %k4, %k0, %k0
; AVX512DQNOBW-NEXT: movb {{[0-9]+}}(%rsp), %al
; AVX512DQNOBW-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; AVX512DQNOBW-NEXT: kmovw %eax, %k6
; AVX512DQNOBW-NEXT: kshiftlw $15, %k6, %k6
; AVX512DQNOBW-NEXT: kshiftrw $5, %k6, %k6
; AVX512DQNOBW-NEXT: korw %k6, %k0, %k0
; AVX512DQNOBW-NEXT: kmovw %k5, {{[-0-9]+}}(%r{{[sb]}}p) # 2-byte Spill
; AVX512DQNOBW-NEXT: kandw %k5, %k0, %k0
; AVX512DQNOBW-NEXT: movb {{[0-9]+}}(%rsp), %al
; AVX512DQNOBW-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; AVX512DQNOBW-NEXT: kmovw %eax, %k6
; AVX512DQNOBW-NEXT: kshiftlw $15, %k6, %k6
; AVX512DQNOBW-NEXT: kshiftrw $4, %k6, %k6
; AVX512DQNOBW-NEXT: korw %k6, %k0, %k0
; AVX512DQNOBW-NEXT: kmovw {{[-0-9]+}}(%r{{[sb]}}p), %k6 # 2-byte Reload
; AVX512DQNOBW-NEXT: kandw %k6, %k0, %k0
; AVX512DQNOBW-NEXT: movb {{[0-9]+}}(%rsp), %al
; AVX512DQNOBW-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; AVX512DQNOBW-NEXT: kmovw %eax, %k6
; AVX512DQNOBW-NEXT: kshiftlw $15, %k6, %k6
; AVX512DQNOBW-NEXT: kshiftrw $3, %k6, %k6
; AVX512DQNOBW-NEXT: korw %k6, %k0, %k0
; AVX512DQNOBW-NEXT: kmovw {{[-0-9]+}}(%r{{[sb]}}p), %k6 # 2-byte Reload
; AVX512DQNOBW-NEXT: kandw %k6, %k0, %k0
; AVX512DQNOBW-NEXT: movb {{[0-9]+}}(%rsp), %al
; AVX512DQNOBW-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; AVX512DQNOBW-NEXT: kmovw %eax, %k6
; AVX512DQNOBW-NEXT: kshiftlw $15, %k6, %k6
; AVX512DQNOBW-NEXT: kshiftrw $2, %k6, %k6
; AVX512DQNOBW-NEXT: korw %k6, %k0, %k0
; AVX512DQNOBW-NEXT: kmovw {{[-0-9]+}}(%r{{[sb]}}p), %k6 # 2-byte Reload
; AVX512DQNOBW-NEXT: kandw %k6, %k0, %k0
; AVX512DQNOBW-NEXT: movb {{[0-9]+}}(%rsp), %al
; AVX512DQNOBW-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; AVX512DQNOBW-NEXT: kmovw %eax, %k6
; AVX512DQNOBW-NEXT: kshiftlw $14, %k6, %k6
; AVX512DQNOBW-NEXT: korw %k6, %k0, %k0
; AVX512DQNOBW-NEXT: kshiftlw $1, %k0, %k0
; AVX512DQNOBW-NEXT: kshiftrw $1, %k0, %k0
; AVX512DQNOBW-NEXT: movb {{[0-9]+}}(%rsp), %al
; AVX512DQNOBW-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; AVX512DQNOBW-NEXT: kmovw %eax, %k6
; AVX512DQNOBW-NEXT: kshiftlw $15, %k6, %k6
; AVX512DQNOBW-NEXT: korw %k6, %k0, %k0
; AVX512DQNOBW-NEXT: kmovw %k0, {{[-0-9]+}}(%r{{[sb]}}p) # 2-byte Spill
; AVX512DQNOBW-NEXT: movb {{[0-9]+}}(%rsp), %al
; AVX512DQNOBW-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; AVX512DQNOBW-NEXT: andl $1, %eax
; AVX512DQNOBW-NEXT: movb {{[0-9]+}}(%rsp), %cl
; AVX512DQNOBW-NEXT: movzbl {{[0-9]+}}(%rsp), %ecx
; AVX512DQNOBW-NEXT: kmovw %ecx, %k0
; AVX512DQNOBW-NEXT: kshiftlw $15, %k0, %k0
; AVX512DQNOBW-NEXT: kshiftrw $14, %k0, %k0
@ -2579,97 +2579,97 @@ define <64 x i16> @test21(<64 x i16> %x , <64 x i1> %mask) nounwind readnone {
; AVX512DQNOBW-NEXT: korw %k0, %k6, %k0
; AVX512DQNOBW-NEXT: kmovw {{[-0-9]+}}(%r{{[sb]}}p), %k6 # 2-byte Reload
; AVX512DQNOBW-NEXT: kandw %k6, %k0, %k0
; AVX512DQNOBW-NEXT: movb {{[0-9]+}}(%rsp), %al
; AVX512DQNOBW-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; AVX512DQNOBW-NEXT: kmovw %eax, %k6
; AVX512DQNOBW-NEXT: kshiftlw $15, %k6, %k6
; AVX512DQNOBW-NEXT: kshiftrw $13, %k6, %k6
; AVX512DQNOBW-NEXT: korw %k6, %k0, %k0
; AVX512DQNOBW-NEXT: kandw %k7, %k0, %k0
; AVX512DQNOBW-NEXT: movb {{[0-9]+}}(%rsp), %al
; AVX512DQNOBW-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; AVX512DQNOBW-NEXT: kmovw %eax, %k6
; AVX512DQNOBW-NEXT: kshiftlw $15, %k6, %k6
; AVX512DQNOBW-NEXT: kshiftrw $12, %k6, %k6
; AVX512DQNOBW-NEXT: korw %k6, %k0, %k0
; AVX512DQNOBW-NEXT: kandw %k1, %k0, %k0
; AVX512DQNOBW-NEXT: movb {{[0-9]+}}(%rsp), %al
; AVX512DQNOBW-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; AVX512DQNOBW-NEXT: kmovw %eax, %k6
; AVX512DQNOBW-NEXT: kshiftlw $15, %k6, %k6
; AVX512DQNOBW-NEXT: kshiftrw $11, %k6, %k6
; AVX512DQNOBW-NEXT: korw %k6, %k0, %k0
; AVX512DQNOBW-NEXT: kmovw {{[-0-9]+}}(%r{{[sb]}}p), %k1 # 2-byte Reload
; AVX512DQNOBW-NEXT: kandw %k1, %k0, %k0
; AVX512DQNOBW-NEXT: movb {{[0-9]+}}(%rsp), %al
; AVX512DQNOBW-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; AVX512DQNOBW-NEXT: kmovw %eax, %k6
; AVX512DQNOBW-NEXT: kshiftlw $15, %k6, %k6
; AVX512DQNOBW-NEXT: kshiftrw $10, %k6, %k6
; AVX512DQNOBW-NEXT: korw %k6, %k0, %k0
; AVX512DQNOBW-NEXT: kandw %k2, %k0, %k0
; AVX512DQNOBW-NEXT: movb {{[0-9]+}}(%rsp), %al
; AVX512DQNOBW-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; AVX512DQNOBW-NEXT: kmovw %eax, %k6
; AVX512DQNOBW-NEXT: kshiftlw $15, %k6, %k6
; AVX512DQNOBW-NEXT: kshiftrw $9, %k6, %k6
; AVX512DQNOBW-NEXT: korw %k6, %k0, %k0
; AVX512DQNOBW-NEXT: kmovw {{[-0-9]+}}(%r{{[sb]}}p), %k1 # 2-byte Reload
; AVX512DQNOBW-NEXT: kandw %k1, %k0, %k0
; AVX512DQNOBW-NEXT: movb {{[0-9]+}}(%rsp), %al
; AVX512DQNOBW-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; AVX512DQNOBW-NEXT: kmovw %eax, %k6
; AVX512DQNOBW-NEXT: kshiftlw $15, %k6, %k6
; AVX512DQNOBW-NEXT: kshiftrw $8, %k6, %k6
; AVX512DQNOBW-NEXT: korw %k6, %k0, %k0
; AVX512DQNOBW-NEXT: kandw %k3, %k0, %k0
; AVX512DQNOBW-NEXT: movb {{[0-9]+}}(%rsp), %al
; AVX512DQNOBW-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; AVX512DQNOBW-NEXT: kmovw %eax, %k6
; AVX512DQNOBW-NEXT: kshiftlw $15, %k6, %k6
; AVX512DQNOBW-NEXT: kshiftrw $7, %k6, %k6
; AVX512DQNOBW-NEXT: korw %k6, %k0, %k0
; AVX512DQNOBW-NEXT: kmovw {{[-0-9]+}}(%r{{[sb]}}p), %k3 # 2-byte Reload
; AVX512DQNOBW-NEXT: kandw %k3, %k0, %k0
; AVX512DQNOBW-NEXT: movb {{[0-9]+}}(%rsp), %al
; AVX512DQNOBW-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; AVX512DQNOBW-NEXT: kmovw %eax, %k6
; AVX512DQNOBW-NEXT: kshiftlw $15, %k6, %k6
; AVX512DQNOBW-NEXT: kshiftrw $6, %k6, %k6
; AVX512DQNOBW-NEXT: korw %k6, %k0, %k0
; AVX512DQNOBW-NEXT: kandw %k4, %k0, %k0
; AVX512DQNOBW-NEXT: movb {{[0-9]+}}(%rsp), %al
; AVX512DQNOBW-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; AVX512DQNOBW-NEXT: kmovw %eax, %k6
; AVX512DQNOBW-NEXT: kshiftlw $15, %k6, %k6
; AVX512DQNOBW-NEXT: kshiftrw $5, %k6, %k6
; AVX512DQNOBW-NEXT: korw %k6, %k0, %k0
; AVX512DQNOBW-NEXT: kandw %k5, %k0, %k0
; AVX512DQNOBW-NEXT: movb {{[0-9]+}}(%rsp), %al
; AVX512DQNOBW-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; AVX512DQNOBW-NEXT: kmovw %eax, %k6
; AVX512DQNOBW-NEXT: kshiftlw $15, %k6, %k6
; AVX512DQNOBW-NEXT: kshiftrw $4, %k6, %k6
; AVX512DQNOBW-NEXT: korw %k6, %k0, %k0
; AVX512DQNOBW-NEXT: kmovw {{[-0-9]+}}(%r{{[sb]}}p), %k1 # 2-byte Reload
; AVX512DQNOBW-NEXT: kandw %k1, %k0, %k0
; AVX512DQNOBW-NEXT: movb {{[0-9]+}}(%rsp), %al
; AVX512DQNOBW-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; AVX512DQNOBW-NEXT: kmovw %eax, %k6
; AVX512DQNOBW-NEXT: kshiftlw $15, %k6, %k6
; AVX512DQNOBW-NEXT: kshiftrw $3, %k6, %k6
; AVX512DQNOBW-NEXT: korw %k6, %k0, %k0
; AVX512DQNOBW-NEXT: kmovw {{[-0-9]+}}(%r{{[sb]}}p), %k2 # 2-byte Reload
; AVX512DQNOBW-NEXT: kandw %k2, %k0, %k0
; AVX512DQNOBW-NEXT: movb {{[0-9]+}}(%rsp), %al
; AVX512DQNOBW-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; AVX512DQNOBW-NEXT: kmovw %eax, %k6
; AVX512DQNOBW-NEXT: kshiftlw $15, %k6, %k6
; AVX512DQNOBW-NEXT: kshiftrw $2, %k6, %k6
; AVX512DQNOBW-NEXT: korw %k6, %k0, %k0
; AVX512DQNOBW-NEXT: kmovw {{[-0-9]+}}(%r{{[sb]}}p), %k5 # 2-byte Reload
; AVX512DQNOBW-NEXT: kandw %k5, %k0, %k0
; AVX512DQNOBW-NEXT: movb {{[0-9]+}}(%rsp), %al
; AVX512DQNOBW-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; AVX512DQNOBW-NEXT: kmovw %eax, %k6
; AVX512DQNOBW-NEXT: kshiftlw $14, %k6, %k6
; AVX512DQNOBW-NEXT: korw %k6, %k0, %k0
; AVX512DQNOBW-NEXT: kshiftlw $1, %k0, %k0
; AVX512DQNOBW-NEXT: kshiftrw $1, %k0, %k0
; AVX512DQNOBW-NEXT: movb {{[0-9]+}}(%rsp), %al
; AVX512DQNOBW-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; AVX512DQNOBW-NEXT: kmovw %eax, %k6
; AVX512DQNOBW-NEXT: kshiftlw $15, %k6, %k6
; AVX512DQNOBW-NEXT: korw %k6, %k0, %k0
; AVX512DQNOBW-NEXT: movb {{[0-9]+}}(%rsp), %al
; AVX512DQNOBW-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; AVX512DQNOBW-NEXT: andl $1, %eax
; AVX512DQNOBW-NEXT: movb {{[0-9]+}}(%rsp), %cl
; AVX512DQNOBW-NEXT: movzbl {{[0-9]+}}(%rsp), %ecx
; AVX512DQNOBW-NEXT: kmovw %ecx, %k6
; AVX512DQNOBW-NEXT: kshiftlw $15, %k6, %k6
; AVX512DQNOBW-NEXT: kshiftrw $14, %k6, %k6
@ -2677,93 +2677,93 @@ define <64 x i16> @test21(<64 x i16> %x , <64 x i1> %mask) nounwind readnone {
; AVX512DQNOBW-NEXT: korw %k6, %k7, %k6
; AVX512DQNOBW-NEXT: kmovw {{[-0-9]+}}(%r{{[sb]}}p), %k5 # 2-byte Reload
; AVX512DQNOBW-NEXT: kandw %k5, %k6, %k6
; AVX512DQNOBW-NEXT: movb {{[0-9]+}}(%rsp), %al
; AVX512DQNOBW-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; AVX512DQNOBW-NEXT: kmovw %eax, %k7
; AVX512DQNOBW-NEXT: kshiftlw $15, %k7, %k7
; AVX512DQNOBW-NEXT: kshiftrw $13, %k7, %k7
; AVX512DQNOBW-NEXT: korw %k7, %k6, %k6
; AVX512DQNOBW-NEXT: kmovw {{[-0-9]+}}(%r{{[sb]}}p), %k5 # 2-byte Reload
; AVX512DQNOBW-NEXT: kandw %k5, %k6, %k6
; AVX512DQNOBW-NEXT: movb {{[0-9]+}}(%rsp), %al
; AVX512DQNOBW-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; AVX512DQNOBW-NEXT: kmovw %eax, %k7
; AVX512DQNOBW-NEXT: kshiftlw $15, %k7, %k7
; AVX512DQNOBW-NEXT: kshiftrw $12, %k7, %k7
; AVX512DQNOBW-NEXT: korw %k7, %k6, %k6
; AVX512DQNOBW-NEXT: kmovw {{[-0-9]+}}(%r{{[sb]}}p), %k5 # 2-byte Reload
; AVX512DQNOBW-NEXT: kandw %k5, %k6, %k6
; AVX512DQNOBW-NEXT: movb {{[0-9]+}}(%rsp), %al
; AVX512DQNOBW-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; AVX512DQNOBW-NEXT: kmovw %eax, %k7
; AVX512DQNOBW-NEXT: kshiftlw $15, %k7, %k7
; AVX512DQNOBW-NEXT: kshiftrw $11, %k7, %k7
; AVX512DQNOBW-NEXT: korw %k7, %k6, %k6
; AVX512DQNOBW-NEXT: kmovw {{[-0-9]+}}(%r{{[sb]}}p), %k5 # 2-byte Reload
; AVX512DQNOBW-NEXT: kandw %k5, %k6, %k6
; AVX512DQNOBW-NEXT: movb {{[0-9]+}}(%rsp), %al
; AVX512DQNOBW-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; AVX512DQNOBW-NEXT: kmovw %eax, %k7
; AVX512DQNOBW-NEXT: kshiftlw $15, %k7, %k7
; AVX512DQNOBW-NEXT: kshiftrw $10, %k7, %k7
; AVX512DQNOBW-NEXT: korw %k7, %k6, %k6
; AVX512DQNOBW-NEXT: kmovw {{[-0-9]+}}(%r{{[sb]}}p), %k5 # 2-byte Reload
; AVX512DQNOBW-NEXT: kandw %k5, %k6, %k6
; AVX512DQNOBW-NEXT: movb {{[0-9]+}}(%rsp), %al
; AVX512DQNOBW-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; AVX512DQNOBW-NEXT: kmovw %eax, %k7
; AVX512DQNOBW-NEXT: kshiftlw $15, %k7, %k7
; AVX512DQNOBW-NEXT: kshiftrw $9, %k7, %k7
; AVX512DQNOBW-NEXT: korw %k7, %k6, %k6
; AVX512DQNOBW-NEXT: kmovw {{[-0-9]+}}(%r{{[sb]}}p), %k5 # 2-byte Reload
; AVX512DQNOBW-NEXT: kandw %k5, %k6, %k6
; AVX512DQNOBW-NEXT: movb {{[0-9]+}}(%rsp), %al
; AVX512DQNOBW-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; AVX512DQNOBW-NEXT: kmovw %eax, %k7
; AVX512DQNOBW-NEXT: kshiftlw $15, %k7, %k7
; AVX512DQNOBW-NEXT: kshiftrw $8, %k7, %k7
; AVX512DQNOBW-NEXT: korw %k7, %k6, %k6
; AVX512DQNOBW-NEXT: kmovw {{[-0-9]+}}(%r{{[sb]}}p), %k5 # 2-byte Reload
; AVX512DQNOBW-NEXT: kandw %k5, %k6, %k6
; AVX512DQNOBW-NEXT: movb {{[0-9]+}}(%rsp), %al
; AVX512DQNOBW-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; AVX512DQNOBW-NEXT: kmovw %eax, %k7
; AVX512DQNOBW-NEXT: kshiftlw $15, %k7, %k7
; AVX512DQNOBW-NEXT: kshiftrw $7, %k7, %k7
; AVX512DQNOBW-NEXT: korw %k7, %k6, %k6
; AVX512DQNOBW-NEXT: kandw %k3, %k6, %k6
; AVX512DQNOBW-NEXT: movb {{[0-9]+}}(%rsp), %al
; AVX512DQNOBW-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; AVX512DQNOBW-NEXT: kmovw %eax, %k7
; AVX512DQNOBW-NEXT: kshiftlw $15, %k7, %k7
; AVX512DQNOBW-NEXT: kshiftrw $6, %k7, %k7
; AVX512DQNOBW-NEXT: korw %k7, %k6, %k6
; AVX512DQNOBW-NEXT: kandw %k4, %k6, %k5
; AVX512DQNOBW-NEXT: movb {{[0-9]+}}(%rsp), %al
; AVX512DQNOBW-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; AVX512DQNOBW-NEXT: kmovw %eax, %k6
; AVX512DQNOBW-NEXT: kshiftlw $15, %k6, %k6
; AVX512DQNOBW-NEXT: kshiftrw $5, %k6, %k6
; AVX512DQNOBW-NEXT: korw %k6, %k5, %k5
; AVX512DQNOBW-NEXT: kmovw {{[-0-9]+}}(%r{{[sb]}}p), %k3 # 2-byte Reload
; AVX512DQNOBW-NEXT: kandw %k3, %k5, %k4
; AVX512DQNOBW-NEXT: movb {{[0-9]+}}(%rsp), %al
; AVX512DQNOBW-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; AVX512DQNOBW-NEXT: kmovw %eax, %k5
; AVX512DQNOBW-NEXT: kshiftlw $15, %k5, %k5
; AVX512DQNOBW-NEXT: kshiftrw $4, %k5, %k5
; AVX512DQNOBW-NEXT: korw %k5, %k4, %k4
; AVX512DQNOBW-NEXT: kandw %k1, %k4, %k3
; AVX512DQNOBW-NEXT: movb {{[0-9]+}}(%rsp), %al
; AVX512DQNOBW-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; AVX512DQNOBW-NEXT: kmovw %eax, %k4
; AVX512DQNOBW-NEXT: kshiftlw $15, %k4, %k4
; AVX512DQNOBW-NEXT: kshiftrw $3, %k4, %k4
; AVX512DQNOBW-NEXT: korw %k4, %k3, %k3
; AVX512DQNOBW-NEXT: kandw %k2, %k3, %k2
; AVX512DQNOBW-NEXT: movb {{[0-9]+}}(%rsp), %al
; AVX512DQNOBW-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; AVX512DQNOBW-NEXT: kmovw %eax, %k3
; AVX512DQNOBW-NEXT: kshiftlw $15, %k3, %k3
; AVX512DQNOBW-NEXT: kshiftrw $2, %k3, %k3
; AVX512DQNOBW-NEXT: korw %k3, %k2, %k2
; AVX512DQNOBW-NEXT: kmovw {{[-0-9]+}}(%r{{[sb]}}p), %k1 # 2-byte Reload
; AVX512DQNOBW-NEXT: kandw %k1, %k2, %k1
; AVX512DQNOBW-NEXT: movb {{[0-9]+}}(%rsp), %al
; AVX512DQNOBW-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; AVX512DQNOBW-NEXT: kmovw %eax, %k2
; AVX512DQNOBW-NEXT: kshiftlw $14, %k2, %k2
; AVX512DQNOBW-NEXT: korw %k2, %k1, %k1
; AVX512DQNOBW-NEXT: kshiftlw $1, %k1, %k1
; AVX512DQNOBW-NEXT: kshiftrw $1, %k1, %k1
; AVX512DQNOBW-NEXT: movb {{[0-9]+}}(%rsp), %al
; AVX512DQNOBW-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; AVX512DQNOBW-NEXT: kmovw %eax, %k2
; AVX512DQNOBW-NEXT: kshiftlw $15, %k2, %k2
; AVX512DQNOBW-NEXT: korw %k2, %k1, %k1

4
llvm/test/CodeGen/X86/avx512-extract-subvector-load-store.ll
View File

@ -696,7 +696,7 @@ define void @load_v2i1_broadcast_1_v1i1_store(ptr %a0,ptr %a1) {
define void @load_v3i1_broadcast_1_v1i1_store(ptr %a0,ptr %a1) {
; AVX512-LABEL: load_v3i1_broadcast_1_v1i1_store:
; AVX512: # %bb.0:
; AVX512-NEXT: movb (%rdi), %al
; AVX512-NEXT: movzbl (%rdi), %eax
; AVX512-NEXT: shrb %al
; AVX512-NEXT: xorl %ecx, %ecx
; AVX512-NEXT: testb $1, %al
@ -711,7 +711,7 @@ define void @load_v3i1_broadcast_1_v1i1_store(ptr %a0,ptr %a1) {
;
; AVX512NOTDQ-LABEL: load_v3i1_broadcast_1_v1i1_store:
; AVX512NOTDQ: # %bb.0:
; AVX512NOTDQ-NEXT: movb (%rdi), %al
; AVX512NOTDQ-NEXT: movzbl (%rdi), %eax
; AVX512NOTDQ-NEXT: shrb %al
; AVX512NOTDQ-NEXT: xorl %ecx, %ecx
; AVX512NOTDQ-NEXT: testb $1, %al

12
llvm/test/CodeGen/X86/avx512-insert-extract.ll
View File

@ -308,7 +308,7 @@ define i16 @test15(ptr%addr) {
define i16 @test16(ptr%addr, i16 %a) {
; KNL-LABEL: test16:
; KNL: ## %bb.0:
; KNL-NEXT: movb (%rdi), %al
; KNL-NEXT: movzbl (%rdi), %eax
; KNL-NEXT: kmovw %esi, %k0
; KNL-NEXT: movw $-1025, %cx ## imm = 0xFBFF
; KNL-NEXT: kmovw %ecx, %k1
@ -344,7 +344,7 @@ define i16 @test16(ptr%addr, i16 %a) {
define i8 @test17(ptr%addr, i8 %a) {
; KNL-LABEL: test17:
; KNL: ## %bb.0:
; KNL-NEXT: movb (%rdi), %al
; KNL-NEXT: movzbl (%rdi), %eax
; KNL-NEXT: kmovw %esi, %k0
; KNL-NEXT: movw $-17, %cx
; KNL-NEXT: kmovw %ecx, %k1
@ -1429,7 +1429,7 @@ define i8 @test_extractelement_variable_v16i8(<16 x i8> %t1, i32 %index) {
; CHECK-NEXT: ## kill: def $edi killed $edi def $rdi
; CHECK-NEXT: vmovaps %xmm0, -{{[0-9]+}}(%rsp)
; CHECK-NEXT: andl $15, %edi
; CHECK-NEXT: movb -24(%rsp,%rdi), %al
; CHECK-NEXT: movzbl -24(%rsp,%rdi), %eax
; CHECK-NEXT: retq
%t2 = extractelement <16 x i8> %t1, i32 %index
ret i8 %t2
@ -1448,7 +1448,7 @@ define i8 @test_extractelement_variable_v32i8(<32 x i8> %t1, i32 %index) {
; CHECK-NEXT: ## kill: def $edi killed $edi def $rdi
; CHECK-NEXT: vmovaps %ymm0, (%rsp)
; CHECK-NEXT: andl $31, %edi
; CHECK-NEXT: movb (%rsp,%rdi), %al
; CHECK-NEXT: movzbl (%rsp,%rdi), %eax
; CHECK-NEXT: movq %rbp, %rsp
; CHECK-NEXT: popq %rbp
; CHECK-NEXT: vzeroupper
@ -1471,7 +1471,7 @@ define i8 @test_extractelement_variable_v64i8(<64 x i8> %t1, i32 %index) {
; CHECK-NEXT: ## kill: def $edi killed $edi def $rdi
; CHECK-NEXT: vmovaps %zmm0, (%rsp)
; CHECK-NEXT: andl $63, %edi
; CHECK-NEXT: movb (%rsp,%rdi), %al
; CHECK-NEXT: movzbl (%rsp,%rdi), %eax
; CHECK-NEXT: movq %rbp, %rsp
; CHECK-NEXT: popq %rbp
; CHECK-NEXT: vzeroupper
@ -1495,7 +1495,7 @@ define i8 @test_extractelement_variable_v64i8_indexi8(<64 x i8> %t1, i8 %index)
; CHECK-NEXT: vmovaps %zmm0, (%rsp)
; CHECK-NEXT: movzbl %dil, %eax
; CHECK-NEXT: andl $63, %eax
; CHECK-NEXT: movb (%rsp,%rax), %al
; CHECK-NEXT: movzbl (%rsp,%rax), %eax
; CHECK-NEXT: movq %rbp, %rsp
; CHECK-NEXT: popq %rbp
; CHECK-NEXT: vzeroupper

128
llvm/test/CodeGen/X86/avx512-intrinsics-canonical.ll
View File

@ -1911,7 +1911,7 @@ entry:
define <4 x float> @test_mm_mask_fmadd_ss(<4 x float> %__W, i8 zeroext %__U, <4 x float> %__A, <4 x float> %__B) {
; X86-LABEL: test_mm_mask_fmadd_ss:
; X86: ## %bb.0: ## %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al ## encoding: [0x8a,0x44,0x24,0x04]
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
; X86-NEXT: vfmadd213ss %xmm2, %xmm1, %xmm0 {%k1} ## encoding: [0x62,0xf2,0x75,0x09,0xa9,0xc2]
; X86-NEXT: ## xmm0 {%k1} = (xmm1 * xmm0) + xmm2
@ -1939,7 +1939,7 @@ entry:
define <4 x float> @test_mm_mask_fmadd_round_ss(<4 x float> %__W, i8 zeroext %__U, <4 x float> %__A, <4 x float> %__B) {
; X86-LABEL: test_mm_mask_fmadd_round_ss:
; X86: ## %bb.0: ## %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al ## encoding: [0x8a,0x44,0x24,0x04]
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
; X86-NEXT: vfmadd213ss %xmm2, %xmm1, %xmm0 {%k1} ## encoding: [0x62,0xf2,0x75,0x09,0xa9,0xc2]
; X86-NEXT: ## xmm0 {%k1} = (xmm1 * xmm0) + xmm2
@ -1961,7 +1961,7 @@ declare <4 x float> @llvm.x86.avx512.mask.vfmadd.ss(<4 x float>, <4 x float>, <4
define <4 x float> @test_mm_maskz_fmadd_ss(i8 zeroext %__U, <4 x float> %__A, <4 x float> %__B, <4 x float> %__C) {
; X86-LABEL: test_mm_maskz_fmadd_ss:
; X86: ## %bb.0: ## %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al ## encoding: [0x8a,0x44,0x24,0x04]
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
; X86-NEXT: vfmadd213ss %xmm2, %xmm1, %xmm0 {%k1} {z} ## encoding: [0x62,0xf2,0x75,0x89,0xa9,0xc2]
; X86-NEXT: ## xmm0 {%k1} {z} = (xmm1 * xmm0) + xmm2
@ -1988,7 +1988,7 @@ entry:
define <4 x float> @test_mm_maskz_fmadd_round_ss(i8 zeroext %__U, <4 x float> %__A, <4 x float> %__B, <4 x float> %__C) {
; X86-LABEL: test_mm_maskz_fmadd_round_ss:
; X86: ## %bb.0: ## %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al ## encoding: [0x8a,0x44,0x24,0x04]
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
; X86-NEXT: vfmadd213ss %xmm2, %xmm1, %xmm0 {%k1} {z} ## encoding: [0x62,0xf2,0x75,0x89,0xa9,0xc2]
; X86-NEXT: ## xmm0 {%k1} {z} = (xmm1 * xmm0) + xmm2
@ -2010,7 +2010,7 @@ declare <4 x float> @llvm.x86.avx512.maskz.vfmadd.ss(<4 x float>, <4 x float>, <
define <4 x float> @test_mm_mask3_fmadd_ss(<4 x float> %__W, <4 x float> %__X, <4 x float> %__Y, i8 zeroext %__U) {
; X86-LABEL: test_mm_mask3_fmadd_ss:
; X86: ## %bb.0: ## %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al ## encoding: [0x8a,0x44,0x24,0x04]
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
; X86-NEXT: vfmadd231ss %xmm1, %xmm0, %xmm2 {%k1} ## encoding: [0x62,0xf2,0x7d,0x09,0xb9,0xd1]
; X86-NEXT: ## xmm2 {%k1} = (xmm0 * xmm1) + xmm2
@ -2040,7 +2040,7 @@ entry:
define <4 x float> @test_mm_mask3_fmadd_round_ss(<4 x float> %__W, <4 x float> %__X, <4 x float> %__Y, i8 zeroext %__U) {
; X86-LABEL: test_mm_mask3_fmadd_round_ss:
; X86: ## %bb.0: ## %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al ## encoding: [0x8a,0x44,0x24,0x04]
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
; X86-NEXT: vfmadd231ss %xmm1, %xmm0, %xmm2 {%k1} ## encoding: [0x62,0xf2,0x7d,0x09,0xb9,0xd1]
; X86-NEXT: ## xmm2 {%k1} = (xmm0 * xmm1) + xmm2
@ -2064,7 +2064,7 @@ declare <4 x float> @llvm.x86.avx512.mask3.vfmadd.ss(<4 x float>, <4 x float>, <
define <4 x float> @test_mm_mask_fmsub_ss(<4 x float> %__W, i8 zeroext %__U, <4 x float> %__A, <4 x float> %__B) {
; X86-LABEL: test_mm_mask_fmsub_ss:
; X86: ## %bb.0: ## %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al ## encoding: [0x8a,0x44,0x24,0x04]
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
; X86-NEXT: vfmsub213ss %xmm2, %xmm1, %xmm0 {%k1} ## encoding: [0x62,0xf2,0x75,0x09,0xab,0xc2]
; X86-NEXT: ## xmm0 {%k1} = (xmm1 * xmm0) - xmm2
@ -2093,7 +2093,7 @@ entry:
define <4 x float> @test_mm_mask_fmsub_round_ss(<4 x float> %__W, i8 zeroext %__U, <4 x float> %__A, <4 x float> %__B) {
; X86-LABEL: test_mm_mask_fmsub_round_ss:
; X86: ## %bb.0: ## %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al ## encoding: [0x8a,0x44,0x24,0x04]
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
; X86-NEXT: vfmsub213ss %xmm2, %xmm1, %xmm0 {%k1} ## encoding: [0x62,0xf2,0x75,0x09,0xab,0xc2]
; X86-NEXT: ## xmm0 {%k1} = (xmm1 * xmm0) - xmm2
@ -2114,7 +2114,7 @@ entry:
define <4 x float> @test_mm_maskz_fmsub_ss(i8 zeroext %__U, <4 x float> %__A, <4 x float> %__B, <4 x float> %__C) {
; X86-LABEL: test_mm_maskz_fmsub_ss:
; X86: ## %bb.0: ## %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al ## encoding: [0x8a,0x44,0x24,0x04]
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
; X86-NEXT: vfmsub213ss %xmm2, %xmm1, %xmm0 {%k1} {z} ## encoding: [0x62,0xf2,0x75,0x89,0xab,0xc2]
; X86-NEXT: ## xmm0 {%k1} {z} = (xmm1 * xmm0) - xmm2
@ -2142,7 +2142,7 @@ entry:
define <4 x float> @test_mm_maskz_fmsub_round_ss(i8 zeroext %__U, <4 x float> %__A, <4 x float> %__B, <4 x float> %__C) {
; X86-LABEL: test_mm_maskz_fmsub_round_ss:
; X86: ## %bb.0: ## %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al ## encoding: [0x8a,0x44,0x24,0x04]
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
; X86-NEXT: vfmsub213ss %xmm2, %xmm1, %xmm0 {%k1} {z} ## encoding: [0x62,0xf2,0x75,0x89,0xab,0xc2]
; X86-NEXT: ## xmm0 {%k1} {z} = (xmm1 * xmm0) - xmm2
@ -2163,7 +2163,7 @@ entry:
define <4 x float> @test_mm_mask3_fmsub_ss(<4 x float> %__W, <4 x float> %__X, <4 x float> %__Y, i8 zeroext %__U) {
; X86-LABEL: test_mm_mask3_fmsub_ss:
; X86: ## %bb.0: ## %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al ## encoding: [0x8a,0x44,0x24,0x04]
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
; X86-NEXT: vfmsub231ss %xmm1, %xmm0, %xmm2 {%k1} ## encoding: [0x62,0xf2,0x7d,0x09,0xbb,0xd1]
; X86-NEXT: ## xmm2 {%k1} = (xmm0 * xmm1) - xmm2
@ -2194,7 +2194,7 @@ entry:
define <4 x float> @test_mm_mask3_fmsub_round_ss(<4 x float> %__W, <4 x float> %__X, <4 x float> %__Y, i8 zeroext %__U) {
; X86-LABEL: test_mm_mask3_fmsub_round_ss:
; X86: ## %bb.0: ## %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al ## encoding: [0x8a,0x44,0x24,0x04]
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
; X86-NEXT: vfmsub231ss %xmm1, %xmm0, %xmm2 {%k1} ## encoding: [0x62,0xf2,0x7d,0x09,0xbb,0xd1]
; X86-NEXT: ## xmm2 {%k1} = (xmm0 * xmm1) - xmm2
@ -2218,7 +2218,7 @@ declare <4 x float> @llvm.x86.avx512.mask3.vfmsub.ss(<4 x float>, <4 x float>, <
define <4 x float> @test_mm_mask_fnmadd_ss(<4 x float> %__W, i8 zeroext %__U, <4 x float> %__A, <4 x float> %__B) {
; X86-LABEL: test_mm_mask_fnmadd_ss:
; X86: ## %bb.0: ## %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al ## encoding: [0x8a,0x44,0x24,0x04]
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
; X86-NEXT: vfnmadd213ss %xmm2, %xmm1, %xmm0 {%k1} ## encoding: [0x62,0xf2,0x75,0x09,0xad,0xc2]
; X86-NEXT: ## xmm0 {%k1} = -(xmm1 * xmm0) + xmm2
@ -2247,7 +2247,7 @@ entry:
define <4 x float> @test_mm_mask_fnmadd_round_ss(<4 x float> %__W, i8 zeroext %__U, <4 x float> %__A, <4 x float> %__B) {
; X86-LABEL: test_mm_mask_fnmadd_round_ss:
; X86: ## %bb.0: ## %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al ## encoding: [0x8a,0x44,0x24,0x04]
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
; X86-NEXT: vfnmadd213ss %xmm2, %xmm1, %xmm0 {%k1} ## encoding: [0x62,0xf2,0x75,0x09,0xad,0xc2]
; X86-NEXT: ## xmm0 {%k1} = -(xmm1 * xmm0) + xmm2
@ -2268,7 +2268,7 @@ entry:
define <4 x float> @test_mm_maskz_fnmadd_ss(i8 zeroext %__U, <4 x float> %__A, <4 x float> %__B, <4 x float> %__C) {
; X86-LABEL: test_mm_maskz_fnmadd_ss:
; X86: ## %bb.0: ## %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al ## encoding: [0x8a,0x44,0x24,0x04]
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
; X86-NEXT: vfnmadd213ss %xmm2, %xmm1, %xmm0 {%k1} {z} ## encoding: [0x62,0xf2,0x75,0x89,0xad,0xc2]
; X86-NEXT: ## xmm0 {%k1} {z} = -(xmm1 * xmm0) + xmm2
@ -2296,7 +2296,7 @@ entry:
define <4 x float> @test_mm_maskz_fnmadd_round_ss(i8 zeroext %__U, <4 x float> %__A, <4 x float> %__B, <4 x float> %__C) {
; X86-LABEL: test_mm_maskz_fnmadd_round_ss:
; X86: ## %bb.0: ## %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al ## encoding: [0x8a,0x44,0x24,0x04]
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
; X86-NEXT: vfnmadd213ss %xmm2, %xmm1, %xmm0 {%k1} {z} ## encoding: [0x62,0xf2,0x75,0x89,0xad,0xc2]
; X86-NEXT: ## xmm0 {%k1} {z} = -(xmm1 * xmm0) + xmm2
@ -2317,7 +2317,7 @@ entry:
define <4 x float> @test_mm_mask3_fnmadd_ss(<4 x float> %__W, <4 x float> %__X, <4 x float> %__Y, i8 zeroext %__U) {
; X86-LABEL: test_mm_mask3_fnmadd_ss:
; X86: ## %bb.0: ## %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al ## encoding: [0x8a,0x44,0x24,0x04]
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
; X86-NEXT: vfnmadd231ss %xmm1, %xmm0, %xmm2 {%k1} ## encoding: [0x62,0xf2,0x7d,0x09,0xbd,0xd1]
; X86-NEXT: ## xmm2 {%k1} = -(xmm0 * xmm1) + xmm2
@ -2348,7 +2348,7 @@ entry:
define <4 x float> @test_mm_mask3_fnmadd_round_ss(<4 x float> %__W, <4 x float> %__X, <4 x float> %__Y, i8 zeroext %__U) {
; X86-LABEL: test_mm_mask3_fnmadd_round_ss:
; X86: ## %bb.0: ## %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al ## encoding: [0x8a,0x44,0x24,0x04]
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
; X86-NEXT: vfnmadd231ss %xmm1, %xmm0, %xmm2 {%k1} ## encoding: [0x62,0xf2,0x7d,0x09,0xbd,0xd1]
; X86-NEXT: ## xmm2 {%k1} = -(xmm0 * xmm1) + xmm2
@ -2371,7 +2371,7 @@ entry:
define <4 x float> @test_mm_mask_fnmsub_ss(<4 x float> %__W, i8 zeroext %__U, <4 x float> %__A, <4 x float> %__B) {
; X86-LABEL: test_mm_mask_fnmsub_ss:
; X86: ## %bb.0: ## %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al ## encoding: [0x8a,0x44,0x24,0x04]
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
; X86-NEXT: vfnmsub213ss %xmm2, %xmm1, %xmm0 {%k1} ## encoding: [0x62,0xf2,0x75,0x09,0xaf,0xc2]
; X86-NEXT: ## xmm0 {%k1} = -(xmm1 * xmm0) - xmm2
@ -2401,7 +2401,7 @@ entry:
define <4 x float> @test_mm_mask_fnmsub_round_ss(<4 x float> %__W, i8 zeroext %__U, <4 x float> %__A, <4 x float> %__B) {
; X86-LABEL: test_mm_mask_fnmsub_round_ss:
; X86: ## %bb.0: ## %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al ## encoding: [0x8a,0x44,0x24,0x04]
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
; X86-NEXT: vfnmsub213ss %xmm2, %xmm1, %xmm0 {%k1} ## encoding: [0x62,0xf2,0x75,0x09,0xaf,0xc2]
; X86-NEXT: ## xmm0 {%k1} = -(xmm1 * xmm0) - xmm2
@ -2423,7 +2423,7 @@ entry:
define <4 x float> @test_mm_maskz_fnmsub_ss(i8 zeroext %__U, <4 x float> %__A, <4 x float> %__B, <4 x float> %__C) {
; X86-LABEL: test_mm_maskz_fnmsub_ss:
; X86: ## %bb.0: ## %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al ## encoding: [0x8a,0x44,0x24,0x04]
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
; X86-NEXT: vfnmsub213ss %xmm2, %xmm1, %xmm0 {%k1} {z} ## encoding: [0x62,0xf2,0x75,0x89,0xaf,0xc2]
; X86-NEXT: ## xmm0 {%k1} {z} = -(xmm1 * xmm0) - xmm2
@ -2452,7 +2452,7 @@ entry:
define <4 x float> @test_mm_maskz_fnmsub_round_ss(i8 zeroext %__U, <4 x float> %__A, <4 x float> %__B, <4 x float> %__C) {
; X86-LABEL: test_mm_maskz_fnmsub_round_ss:
; X86: ## %bb.0: ## %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al ## encoding: [0x8a,0x44,0x24,0x04]
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
; X86-NEXT: vfnmsub213ss %xmm2, %xmm1, %xmm0 {%k1} {z} ## encoding: [0x62,0xf2,0x75,0x89,0xaf,0xc2]
; X86-NEXT: ## xmm0 {%k1} {z} = -(xmm1 * xmm0) - xmm2
@ -2474,7 +2474,7 @@ entry:
define <4 x float> @test_mm_mask3_fnmsub_ss(<4 x float> %__W, <4 x float> %__X, <4 x float> %__Y, i8 zeroext %__U) {
; X86-LABEL: test_mm_mask3_fnmsub_ss:
; X86: ## %bb.0: ## %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al ## encoding: [0x8a,0x44,0x24,0x04]
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
; X86-NEXT: vfnmsub231ss %xmm1, %xmm0, %xmm2 {%k1} ## encoding: [0x62,0xf2,0x7d,0x09,0xbf,0xd1]
; X86-NEXT: ## xmm2 {%k1} = -(xmm0 * xmm1) - xmm2
@ -2506,7 +2506,7 @@ entry:
define <4 x float> @test_mm_mask3_fnmsub_round_ss(<4 x float> %__W, <4 x float> %__X, <4 x float> %__Y, i8 zeroext %__U) {
; X86-LABEL: test_mm_mask3_fnmsub_round_ss:
; X86: ## %bb.0: ## %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al ## encoding: [0x8a,0x44,0x24,0x04]
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
; X86-NEXT: vfnmsub231ss %xmm1, %xmm0, %xmm2 {%k1} ## encoding: [0x62,0xf2,0x7d,0x09,0xbf,0xd1]
; X86-NEXT: ## xmm2 {%k1} = -(xmm0 * xmm1) - xmm2
@ -2529,7 +2529,7 @@ entry:
define <2 x double> @test_mm_mask_fmadd_sd(<2 x double> %__W, i8 zeroext %__U, <2 x double> %__A, <2 x double> %__B) {
; X86-LABEL: test_mm_mask_fmadd_sd:
; X86: ## %bb.0: ## %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al ## encoding: [0x8a,0x44,0x24,0x04]
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
; X86-NEXT: vfmadd213sd %xmm2, %xmm1, %xmm0 {%k1} ## encoding: [0x62,0xf2,0xf5,0x09,0xa9,0xc2]
; X86-NEXT: ## xmm0 {%k1} = (xmm1 * xmm0) + xmm2
@ -2557,7 +2557,7 @@ entry:
define <2 x double> @test_mm_mask_fmadd_round_sd(<2 x double> %__W, i8 zeroext %__U, <2 x double> %__A, <2 x double> %__B) {
; X86-LABEL: test_mm_mask_fmadd_round_sd:
; X86: ## %bb.0: ## %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al ## encoding: [0x8a,0x44,0x24,0x04]
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
; X86-NEXT: vfmadd213sd %xmm2, %xmm1, %xmm0 {%k1} ## encoding: [0x62,0xf2,0xf5,0x09,0xa9,0xc2]
; X86-NEXT: ## xmm0 {%k1} = (xmm1 * xmm0) + xmm2
@ -2579,7 +2579,7 @@ declare <2 x double> @llvm.x86.avx512.mask.vfmadd.sd(<2 x double>, <2 x double>,
define <2 x double> @test_mm_maskz_fmadd_sd(i8 zeroext %__U, <2 x double> %__A, <2 x double> %__B, <2 x double> %__C) {
; X86-LABEL: test_mm_maskz_fmadd_sd:
; X86: ## %bb.0: ## %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al ## encoding: [0x8a,0x44,0x24,0x04]
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
; X86-NEXT: vfmadd213sd %xmm2, %xmm1, %xmm0 {%k1} {z} ## encoding: [0x62,0xf2,0xf5,0x89,0xa9,0xc2]
; X86-NEXT: ## xmm0 {%k1} {z} = (xmm1 * xmm0) + xmm2
@ -2606,7 +2606,7 @@ entry:
define <2 x double> @test_mm_maskz_fmadd_round_sd(i8 zeroext %__U, <2 x double> %__A, <2 x double> %__B, <2 x double> %__C) {
; X86-LABEL: test_mm_maskz_fmadd_round_sd:
; X86: ## %bb.0: ## %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al ## encoding: [0x8a,0x44,0x24,0x04]
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
; X86-NEXT: vfmadd213sd %xmm2, %xmm1, %xmm0 {%k1} {z} ## encoding: [0x62,0xf2,0xf5,0x89,0xa9,0xc2]
; X86-NEXT: ## xmm0 {%k1} {z} = (xmm1 * xmm0) + xmm2
@ -2628,7 +2628,7 @@ declare <2 x double> @llvm.x86.avx512.maskz.vfmadd.sd(<2 x double>, <2 x double>
define <2 x double> @test_mm_mask3_fmadd_sd(<2 x double> %__W, <2 x double> %__X, <2 x double> %__Y, i8 zeroext %__U) {
; X86-LABEL: test_mm_mask3_fmadd_sd:
; X86: ## %bb.0: ## %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al ## encoding: [0x8a,0x44,0x24,0x04]
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
; X86-NEXT: vfmadd231sd %xmm1, %xmm0, %xmm2 {%k1} ## encoding: [0x62,0xf2,0xfd,0x09,0xb9,0xd1]
; X86-NEXT: ## xmm2 {%k1} = (xmm0 * xmm1) + xmm2
@ -2658,7 +2658,7 @@ entry:
define <2 x double> @test_mm_mask3_fmadd_round_sd(<2 x double> %__W, <2 x double> %__X, <2 x double> %__Y, i8 zeroext %__U) {
; X86-LABEL: test_mm_mask3_fmadd_round_sd:
; X86: ## %bb.0: ## %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al ## encoding: [0x8a,0x44,0x24,0x04]
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
; X86-NEXT: vfmadd231sd %xmm1, %xmm0, %xmm2 {%k1} ## encoding: [0x62,0xf2,0xfd,0x09,0xb9,0xd1]
; X86-NEXT: ## xmm2 {%k1} = (xmm0 * xmm1) + xmm2
@ -2682,7 +2682,7 @@ declare <2 x double> @llvm.x86.avx512.mask3.vfmadd.sd(<2 x double>, <2 x double>
define <2 x double> @test_mm_mask_fmsub_sd(<2 x double> %__W, i8 zeroext %__U, <2 x double> %__A, <2 x double> %__B) {
; X86-LABEL: test_mm_mask_fmsub_sd:
; X86: ## %bb.0: ## %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al ## encoding: [0x8a,0x44,0x24,0x04]
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
; X86-NEXT: vfmsub213sd %xmm2, %xmm1, %xmm0 {%k1} ## encoding: [0x62,0xf2,0xf5,0x09,0xab,0xc2]
; X86-NEXT: ## xmm0 {%k1} = (xmm1 * xmm0) - xmm2
@ -2711,7 +2711,7 @@ entry:
define <2 x double> @test_mm_mask_fmsub_round_sd(<2 x double> %__W, i8 zeroext %__U, <2 x double> %__A, <2 x double> %__B) {
; X86-LABEL: test_mm_mask_fmsub_round_sd:
; X86: ## %bb.0: ## %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al ## encoding: [0x8a,0x44,0x24,0x04]
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
; X86-NEXT: vfmsub213sd %xmm2, %xmm1, %xmm0 {%k1} ## encoding: [0x62,0xf2,0xf5,0x09,0xab,0xc2]
; X86-NEXT: ## xmm0 {%k1} = (xmm1 * xmm0) - xmm2
@ -2732,7 +2732,7 @@ entry:
define <2 x double> @test_mm_maskz_fmsub_sd(i8 zeroext %__U, <2 x double> %__A, <2 x double> %__B, <2 x double> %__C) {
; X86-LABEL: test_mm_maskz_fmsub_sd:
; X86: ## %bb.0: ## %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al ## encoding: [0x8a,0x44,0x24,0x04]
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
; X86-NEXT: vfmsub213sd %xmm2, %xmm1, %xmm0 {%k1} {z} ## encoding: [0x62,0xf2,0xf5,0x89,0xab,0xc2]
; X86-NEXT: ## xmm0 {%k1} {z} = (xmm1 * xmm0) - xmm2
@ -2760,7 +2760,7 @@ entry:
define <2 x double> @test_mm_maskz_fmsub_round_sd(i8 zeroext %__U, <2 x double> %__A, <2 x double> %__B, <2 x double> %__C) {
; X86-LABEL: test_mm_maskz_fmsub_round_sd:
; X86: ## %bb.0: ## %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al ## encoding: [0x8a,0x44,0x24,0x04]
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
; X86-NEXT: vfmsub213sd %xmm2, %xmm1, %xmm0 {%k1} {z} ## encoding: [0x62,0xf2,0xf5,0x89,0xab,0xc2]
; X86-NEXT: ## xmm0 {%k1} {z} = (xmm1 * xmm0) - xmm2
@ -2781,7 +2781,7 @@ entry:
define <2 x double> @test_mm_mask3_fmsub_sd(<2 x double> %__W, <2 x double> %__X, <2 x double> %__Y, i8 zeroext %__U) {
; X86-LABEL: test_mm_mask3_fmsub_sd:
; X86: ## %bb.0: ## %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al ## encoding: [0x8a,0x44,0x24,0x04]
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
; X86-NEXT: vfmsub231sd %xmm1, %xmm0, %xmm2 {%k1} ## encoding: [0x62,0xf2,0xfd,0x09,0xbb,0xd1]
; X86-NEXT: ## xmm2 {%k1} = (xmm0 * xmm1) - xmm2
@ -2812,7 +2812,7 @@ entry:
define <2 x double> @test_mm_mask3_fmsub_round_sd(<2 x double> %__W, <2 x double> %__X, <2 x double> %__Y, i8 zeroext %__U) {
; X86-LABEL: test_mm_mask3_fmsub_round_sd:
; X86: ## %bb.0: ## %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al ## encoding: [0x8a,0x44,0x24,0x04]
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
; X86-NEXT: vfmsub231sd %xmm1, %xmm0, %xmm2 {%k1} ## encoding: [0x62,0xf2,0xfd,0x09,0xbb,0xd1]
; X86-NEXT: ## xmm2 {%k1} = (xmm0 * xmm1) - xmm2
@ -2836,7 +2836,7 @@ declare <2 x double> @llvm.x86.avx512.mask3.vfmsub.sd(<2 x double>, <2 x double>
define <2 x double> @test_mm_mask_fnmadd_sd(<2 x double> %__W, i8 zeroext %__U, <2 x double> %__A, <2 x double> %__B) {
; X86-LABEL: test_mm_mask_fnmadd_sd:
; X86: ## %bb.0: ## %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al ## encoding: [0x8a,0x44,0x24,0x04]
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
; X86-NEXT: vfnmadd213sd %xmm2, %xmm1, %xmm0 {%k1} ## encoding: [0x62,0xf2,0xf5,0x09,0xad,0xc2]
; X86-NEXT: ## xmm0 {%k1} = -(xmm1 * xmm0) + xmm2
@ -2865,7 +2865,7 @@ entry:
define <2 x double> @test_mm_mask_fnmadd_round_sd(<2 x double> %__W, i8 zeroext %__U, <2 x double> %__A, <2 x double> %__B) {
; X86-LABEL: test_mm_mask_fnmadd_round_sd:
; X86: ## %bb.0: ## %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al ## encoding: [0x8a,0x44,0x24,0x04]
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
; X86-NEXT: vfnmadd213sd %xmm2, %xmm1, %xmm0 {%k1} ## encoding: [0x62,0xf2,0xf5,0x09,0xad,0xc2]
; X86-NEXT: ## xmm0 {%k1} = -(xmm1 * xmm0) + xmm2
@ -2886,7 +2886,7 @@ entry:
define <2 x double> @test_mm_maskz_fnmadd_sd(i8 zeroext %__U, <2 x double> %__A, <2 x double> %__B, <2 x double> %__C) {
; X86-LABEL: test_mm_maskz_fnmadd_sd:
; X86: ## %bb.0: ## %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al ## encoding: [0x8a,0x44,0x24,0x04]
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
; X86-NEXT: vfnmadd213sd %xmm2, %xmm1, %xmm0 {%k1} {z} ## encoding: [0x62,0xf2,0xf5,0x89,0xad,0xc2]
; X86-NEXT: ## xmm0 {%k1} {z} = -(xmm1 * xmm0) + xmm2
@ -2914,7 +2914,7 @@ entry:
define <2 x double> @test_mm_maskz_fnmadd_round_sd(i8 zeroext %__U, <2 x double> %__A, <2 x double> %__B, <2 x double> %__C) {
; X86-LABEL: test_mm_maskz_fnmadd_round_sd:
; X86: ## %bb.0: ## %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al ## encoding: [0x8a,0x44,0x24,0x04]
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
; X86-NEXT: vfnmadd213sd %xmm2, %xmm1, %xmm0 {%k1} {z} ## encoding: [0x62,0xf2,0xf5,0x89,0xad,0xc2]
; X86-NEXT: ## xmm0 {%k1} {z} = -(xmm1 * xmm0) + xmm2
@ -2935,7 +2935,7 @@ entry:
define <2 x double> @test_mm_mask3_fnmadd_sd(<2 x double> %__W, <2 x double> %__X, <2 x double> %__Y, i8 zeroext %__U) {
; X86-LABEL: test_mm_mask3_fnmadd_sd:
; X86: ## %bb.0: ## %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al ## encoding: [0x8a,0x44,0x24,0x04]
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
; X86-NEXT: vfnmadd231sd %xmm1, %xmm0, %xmm2 {%k1} ## encoding: [0x62,0xf2,0xfd,0x09,0xbd,0xd1]
; X86-NEXT: ## xmm2 {%k1} = -(xmm0 * xmm1) + xmm2
@ -2966,7 +2966,7 @@ entry:
define <2 x double> @test_mm_mask3_fnmadd_round_sd(<2 x double> %__W, <2 x double> %__X, <2 x double> %__Y, i8 zeroext %__U) {
; X86-LABEL: test_mm_mask3_fnmadd_round_sd:
; X86: ## %bb.0: ## %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al ## encoding: [0x8a,0x44,0x24,0x04]
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
; X86-NEXT: vfnmadd231sd %xmm1, %xmm0, %xmm2 {%k1} ## encoding: [0x62,0xf2,0xfd,0x09,0xbd,0xd1]
; X86-NEXT: ## xmm2 {%k1} = -(xmm0 * xmm1) + xmm2
@ -2989,7 +2989,7 @@ entry:
define <2 x double> @test_mm_mask_fnmsub_sd(<2 x double> %__W, i8 zeroext %__U, <2 x double> %__A, <2 x double> %__B) {
; X86-LABEL: test_mm_mask_fnmsub_sd:
; X86: ## %bb.0: ## %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al ## encoding: [0x8a,0x44,0x24,0x04]
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
; X86-NEXT: vfnmsub213sd %xmm2, %xmm1, %xmm0 {%k1} ## encoding: [0x62,0xf2,0xf5,0x09,0xaf,0xc2]
; X86-NEXT: ## xmm0 {%k1} = -(xmm1 * xmm0) - xmm2
@ -3019,7 +3019,7 @@ entry:
define <2 x double> @test_mm_mask_fnmsub_round_sd(<2 x double> %__W, i8 zeroext %__U, <2 x double> %__A, <2 x double> %__B) {
; X86-LABEL: test_mm_mask_fnmsub_round_sd:
; X86: ## %bb.0: ## %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al ## encoding: [0x8a,0x44,0x24,0x04]
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
; X86-NEXT: vfnmsub213sd %xmm2, %xmm1, %xmm0 {%k1} ## encoding: [0x62,0xf2,0xf5,0x09,0xaf,0xc2]
; X86-NEXT: ## xmm0 {%k1} = -(xmm1 * xmm0) - xmm2
@ -3041,7 +3041,7 @@ entry:
define <2 x double> @test_mm_maskz_fnmsub_sd(i8 zeroext %__U, <2 x double> %__A, <2 x double> %__B, <2 x double> %__C) {
; X86-LABEL: test_mm_maskz_fnmsub_sd:
; X86: ## %bb.0: ## %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al ## encoding: [0x8a,0x44,0x24,0x04]
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
; X86-NEXT: vfnmsub213sd %xmm2, %xmm1, %xmm0 {%k1} {z} ## encoding: [0x62,0xf2,0xf5,0x89,0xaf,0xc2]
; X86-NEXT: ## xmm0 {%k1} {z} = -(xmm1 * xmm0) - xmm2
@ -3070,7 +3070,7 @@ entry:
define <2 x double> @test_mm_maskz_fnmsub_round_sd(i8 zeroext %__U, <2 x double> %__A, <2 x double> %__B, <2 x double> %__C) {
; X86-LABEL: test_mm_maskz_fnmsub_round_sd:
; X86: ## %bb.0: ## %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al ## encoding: [0x8a,0x44,0x24,0x04]
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
; X86-NEXT: vfnmsub213sd %xmm2, %xmm1, %xmm0 {%k1} {z} ## encoding: [0x62,0xf2,0xf5,0x89,0xaf,0xc2]
; X86-NEXT: ## xmm0 {%k1} {z} = -(xmm1 * xmm0) - xmm2
@ -3092,7 +3092,7 @@ entry:
define <2 x double> @test_mm_mask3_fnmsub_sd(<2 x double> %__W, <2 x double> %__X, <2 x double> %__Y, i8 zeroext %__U) {
; X86-LABEL: test_mm_mask3_fnmsub_sd:
; X86: ## %bb.0: ## %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al ## encoding: [0x8a,0x44,0x24,0x04]
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
; X86-NEXT: vfnmsub231sd %xmm1, %xmm0, %xmm2 {%k1} ## encoding: [0x62,0xf2,0xfd,0x09,0xbf,0xd1]
; X86-NEXT: ## xmm2 {%k1} = -(xmm0 * xmm1) - xmm2
@ -3124,7 +3124,7 @@ entry:
define <2 x double> @test_mm_mask3_fnmsub_round_sd(<2 x double> %__W, <2 x double> %__X, <2 x double> %__Y, i8 zeroext %__U) {
; X86-LABEL: test_mm_mask3_fnmsub_round_sd:
; X86: ## %bb.0: ## %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al ## encoding: [0x8a,0x44,0x24,0x04]
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
; X86-NEXT: vfnmsub231sd %xmm1, %xmm0, %xmm2 {%k1} ## encoding: [0x62,0xf2,0xfd,0x09,0xbf,0xd1]
; X86-NEXT: ## xmm2 {%k1} = -(xmm0 * xmm1) - xmm2
@ -3147,7 +3147,7 @@ entry:
define <4 x float> @test_mm_mask_add_ss(<4 x float> %__W, i8 zeroext %__U, <4 x float> %__A, <4 x float> %__B) {
; X86-LABEL: test_mm_mask_add_ss:
; X86: ## %bb.0: ## %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al ## encoding: [0x8a,0x44,0x24,0x04]
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
; X86-NEXT: vaddss %xmm2, %xmm1, %xmm0 {%k1} ## encoding: [0x62,0xf1,0x76,0x09,0x58,0xc2]
; X86-NEXT: retl ## encoding: [0xc3]
@ -3172,7 +3172,7 @@ entry:
define <4 x float> @test_mm_maskz_add_ss(i8 zeroext %__U, <4 x float> %__A, <4 x float> %__B) {
; X86-LABEL: test_mm_maskz_add_ss:
; X86: ## %bb.0: ## %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al ## encoding: [0x8a,0x44,0x24,0x04]
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
; X86-NEXT: vaddss %xmm1, %xmm0, %xmm0 {%k1} {z} ## encoding: [0x62,0xf1,0x7e,0x89,0x58,0xc1]
; X86-NEXT: retl ## encoding: [0xc3]
@ -3196,7 +3196,7 @@ entry:
define <2 x double> @test_mm_mask_add_sd(<2 x double> %__W, i8 zeroext %__U, <2 x double> %__A, <2 x double> %__B) {
; X86-LABEL: test_mm_mask_add_sd:
; X86: ## %bb.0: ## %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al ## encoding: [0x8a,0x44,0x24,0x04]
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
; X86-NEXT: vaddsd %xmm2, %xmm1, %xmm0 {%k1} ## encoding: [0x62,0xf1,0xf7,0x09,0x58,0xc2]
; X86-NEXT: retl ## encoding: [0xc3]
@ -3221,7 +3221,7 @@ entry:
define <2 x double> @test_mm_maskz_add_sd(i8 zeroext %__U, <2 x double> %__A, <2 x double> %__B) {
; X86-LABEL: test_mm_maskz_add_sd:
; X86: ## %bb.0: ## %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al ## encoding: [0x8a,0x44,0x24,0x04]
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
; X86-NEXT: vaddsd %xmm1, %xmm0, %xmm0 {%k1} {z} ## encoding: [0x62,0xf1,0xff,0x89,0x58,0xc1]
; X86-NEXT: retl ## encoding: [0xc3]
@ -3245,7 +3245,7 @@ entry:
define <4 x float> @test_mm_mask_sub_ss(<4 x float> %__W, i8 zeroext %__U, <4 x float> %__A, <4 x float> %__B) {
; X86-LABEL: test_mm_mask_sub_ss:
; X86: ## %bb.0: ## %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al ## encoding: [0x8a,0x44,0x24,0x04]
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
; X86-NEXT: vsubss %xmm2, %xmm1, %xmm0 {%k1} ## encoding: [0x62,0xf1,0x76,0x09,0x5c,0xc2]
; X86-NEXT: retl ## encoding: [0xc3]
@ -3270,7 +3270,7 @@ entry:
define <4 x float> @test_mm_maskz_sub_ss(i8 zeroext %__U, <4 x float> %__A, <4 x float> %__B) {
; X86-LABEL: test_mm_maskz_sub_ss:
; X86: ## %bb.0: ## %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al ## encoding: [0x8a,0x44,0x24,0x04]
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
; X86-NEXT: vsubss %xmm1, %xmm0, %xmm0 {%k1} {z} ## encoding: [0x62,0xf1,0x7e,0x89,0x5c,0xc1]
; X86-NEXT: retl ## encoding: [0xc3]
@ -3294,7 +3294,7 @@ entry:
define <2 x double> @test_mm_mask_sub_sd(<2 x double> %__W, i8 zeroext %__U, <2 x double> %__A, <2 x double> %__B) {
; X86-LABEL: test_mm_mask_sub_sd:
; X86: ## %bb.0: ## %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al ## encoding: [0x8a,0x44,0x24,0x04]
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
; X86-NEXT: vsubsd %xmm2, %xmm1, %xmm0 {%k1} ## encoding: [0x62,0xf1,0xf7,0x09,0x5c,0xc2]
; X86-NEXT: retl ## encoding: [0xc3]
@ -3319,7 +3319,7 @@ entry:
define <2 x double> @test_mm_maskz_sub_sd(i8 zeroext %__U, <2 x double> %__A, <2 x double> %__B) {
; X86-LABEL: test_mm_maskz_sub_sd:
; X86: ## %bb.0: ## %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al ## encoding: [0x8a,0x44,0x24,0x04]
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
; X86-NEXT: vsubsd %xmm1, %xmm0, %xmm0 {%k1} {z} ## encoding: [0x62,0xf1,0xff,0x89,0x5c,0xc1]
; X86-NEXT: retl ## encoding: [0xc3]
@ -3343,7 +3343,7 @@ entry:
define <4 x float> @test_mm_mask_mul_ss(<4 x float> %__W, i8 zeroext %__U, <4 x float> %__A, <4 x float> %__B) {
; X86-LABEL: test_mm_mask_mul_ss:
; X86: ## %bb.0: ## %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al ## encoding: [0x8a,0x44,0x24,0x04]
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
; X86-NEXT: vmulss %xmm2, %xmm1, %xmm0 {%k1} ## encoding: [0x62,0xf1,0x76,0x09,0x59,0xc2]
; X86-NEXT: retl ## encoding: [0xc3]
@ -3368,7 +3368,7 @@ entry:
define <4 x float> @test_mm_maskz_mul_ss(i8 zeroext %__U, <4 x float> %__A, <4 x float> %__B) {
; X86-LABEL: test_mm_maskz_mul_ss:
; X86: ## %bb.0: ## %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al ## encoding: [0x8a,0x44,0x24,0x04]
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
; X86-NEXT: vmulss %xmm1, %xmm0, %xmm0 {%k1} {z} ## encoding: [0x62,0xf1,0x7e,0x89,0x59,0xc1]
; X86-NEXT: retl ## encoding: [0xc3]
@ -3392,7 +3392,7 @@ entry:
define <2 x double> @test_mm_mask_mul_sd(<2 x double> %__W, i8 zeroext %__U, <2 x double> %__A, <2 x double> %__B) {
; X86-LABEL: test_mm_mask_mul_sd:
; X86: ## %bb.0: ## %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al ## encoding: [0x8a,0x44,0x24,0x04]
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
; X86-NEXT: vmulsd %xmm2, %xmm1, %xmm0 {%k1} ## encoding: [0x62,0xf1,0xf7,0x09,0x59,0xc2]
; X86-NEXT: retl ## encoding: [0xc3]
@ -3417,7 +3417,7 @@ entry:
define <2 x double> @test_mm_maskz_mul_sd(i8 zeroext %__U, <2 x double> %__A, <2 x double> %__B) {
; X86-LABEL: test_mm_maskz_mul_sd:
; X86: ## %bb.0: ## %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al ## encoding: [0x8a,0x44,0x24,0x04]
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
; X86-NEXT: vmulsd %xmm1, %xmm0, %xmm0 {%k1} {z} ## encoding: [0x62,0xf1,0xff,0x89,0x59,0xc1]
; X86-NEXT: retl ## encoding: [0xc3]
@ -3441,7 +3441,7 @@ entry:
define <4 x float> @test_mm_mask_div_ss(<4 x float> %__W, i8 zeroext %__U, <4 x float> %__A, <4 x float> %__B) {
; X86-LABEL: test_mm_mask_div_ss:
; X86: ## %bb.0: ## %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al ## encoding: [0x8a,0x44,0x24,0x04]
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
; X86-NEXT: vdivss %xmm2, %xmm1, %xmm0 {%k1} ## encoding: [0x62,0xf1,0x76,0x09,0x5e,0xc2]
; X86-NEXT: retl ## encoding: [0xc3]
@ -3466,7 +3466,7 @@ entry:
define <4 x float> @test_mm_maskz_div_ss(i8 zeroext %__U, <4 x float> %__A, <4 x float> %__B) {
; X86-LABEL: test_mm_maskz_div_ss:
; X86: ## %bb.0: ## %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al ## encoding: [0x8a,0x44,0x24,0x04]
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
; X86-NEXT: vdivss %xmm1, %xmm0, %xmm0 {%k1} {z} ## encoding: [0x62,0xf1,0x7e,0x89,0x5e,0xc1]
; X86-NEXT: retl ## encoding: [0xc3]
@ -3490,7 +3490,7 @@ entry:
define <2 x double> @test_mm_mask_div_sd(<2 x double> %__W, i8 zeroext %__U, <2 x double> %__A, <2 x double> %__B) {
; X86-LABEL: test_mm_mask_div_sd:
; X86: ## %bb.0: ## %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al ## encoding: [0x8a,0x44,0x24,0x04]
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
; X86-NEXT: vdivsd %xmm2, %xmm1, %xmm0 {%k1} ## encoding: [0x62,0xf1,0xf7,0x09,0x5e,0xc2]
; X86-NEXT: retl ## encoding: [0xc3]
@ -3515,7 +3515,7 @@ entry:
define <2 x double> @test_mm_maskz_div_sd(i8 zeroext %__U, <2 x double> %__A, <2 x double> %__B) {
; X86-LABEL: test_mm_maskz_div_sd:
; X86: ## %bb.0: ## %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al ## encoding: [0x8a,0x44,0x24,0x04]
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
; X86-NEXT: vdivsd %xmm1, %xmm0, %xmm0 {%k1} {z} ## encoding: [0x62,0xf1,0xff,0x89,0x5e,0xc1]
; X86-NEXT: retl ## encoding: [0xc3]

376
llvm/test/CodeGen/X86/avx512-intrinsics-fast-isel.ll
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File diff suppressed because it is too large Load Diff

44
llvm/test/CodeGen/X86/avx512-intrinsics-upgrade.ll
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@ -3330,7 +3330,7 @@ define <8 x i64>@test_int_x86_avx512_mask_pminu_q_512(<8 x i64> %x0, <8 x i64> %
define <4 x float> @test_mm_mask_move_ss(<4 x float> %__W, i8 zeroext %__U, <4 x float> %__A, <4 x float> %__B) {
; X86-LABEL: test_mm_mask_move_ss:
; X86: ## %bb.0: ## %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al ## encoding: [0x8a,0x44,0x24,0x04]
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
; X86-NEXT: vmovss %xmm2, %xmm1, %xmm0 {%k1} ## encoding: [0x62,0xf1,0x76,0x09,0x10,0xc2]
; X86-NEXT: retl ## encoding: [0xc3]
@ -3349,7 +3349,7 @@ entry:
define <4 x float> @test_mm_maskz_move_ss(i8 zeroext %__U, <4 x float> %__A, <4 x float> %__B) {
; X86-LABEL: test_mm_maskz_move_ss:
; X86: ## %bb.0: ## %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al ## encoding: [0x8a,0x44,0x24,0x04]
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
; X86-NEXT: vmovss %xmm1, %xmm0, %xmm0 {%k1} {z} ## encoding: [0x62,0xf1,0x7e,0x89,0x10,0xc1]
; X86-NEXT: retl ## encoding: [0xc3]
@ -3367,7 +3367,7 @@ entry:
define <2 x double> @test_mm_mask_move_sd(<2 x double> %__W, i8 zeroext %__U, <2 x double> %__A, <2 x double> %__B) {
; X86-LABEL: test_mm_mask_move_sd:
; X86: ## %bb.0: ## %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al ## encoding: [0x8a,0x44,0x24,0x04]
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
; X86-NEXT: vmovsd %xmm2, %xmm1, %xmm0 {%k1} ## encoding: [0x62,0xf1,0xf7,0x09,0x10,0xc2]
; X86-NEXT: retl ## encoding: [0xc3]
@ -3385,7 +3385,7 @@ entry:
define <2 x double> @test_mm_maskz_move_sd(i8 zeroext %__U, <2 x double> %__A, <2 x double> %__B) {
; X86-LABEL: test_mm_maskz_move_sd:
; X86: ## %bb.0: ## %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al ## encoding: [0x8a,0x44,0x24,0x04]
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
; X86-NEXT: vmovsd %xmm1, %xmm0, %xmm0 {%k1} {z} ## encoding: [0x62,0xf1,0xff,0x89,0x10,0xc1]
; X86-NEXT: retl ## encoding: [0xc3]
@ -6771,7 +6771,7 @@ define i8 @test_vptestmq(<8 x i64> %a0, <8 x i64> %a1, i8 %m) {
; X86: ## %bb.0:
; X86-NEXT: vptestmq %zmm1, %zmm0, %k0 ## encoding: [0x62,0xf2,0xfd,0x48,0x27,0xc1]
; X86-NEXT: kmovw %k0, %ecx ## encoding: [0xc5,0xf8,0x93,0xc8]
; X86-NEXT: movb {{[0-9]+}}(%esp), %al ## encoding: [0x8a,0x44,0x24,0x04]
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
; X86-NEXT: andb %cl, %al ## encoding: [0x20,0xc8]
; X86-NEXT: addb %cl, %al ## encoding: [0x00,0xc8]
; X86-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77]
@ -6857,7 +6857,7 @@ define i8@test_int_x86_avx512_ptestnm_q_512(<8 x i64> %x0, <8 x i64> %x1, i8 %x2
; X86: ## %bb.0:
; X86-NEXT: vptestnmq %zmm1, %zmm0, %k0 ## encoding: [0x62,0xf2,0xfe,0x48,0x27,0xc1]
; X86-NEXT: kmovw %k0, %ecx ## encoding: [0xc5,0xf8,0x93,0xc8]
; X86-NEXT: movb {{[0-9]+}}(%esp), %al ## encoding: [0x8a,0x44,0x24,0x04]
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
; X86-NEXT: andb %cl, %al ## encoding: [0x20,0xc8]
; X86-NEXT: addb %cl, %al ## encoding: [0x00,0xc8]
; X86-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77]
@ -9904,7 +9904,7 @@ declare <2 x double> @llvm.x86.avx512.mask.vfmadd.sd(<2 x double>, <2 x double>,
define <2 x double>@test_int_x86_avx512_mask_vfmadd_sd(<2 x double> %x0, <2 x double> %x1, <2 x double> %x2, i8 %x3,i32 %x4 ){
; X86-LABEL: test_int_x86_avx512_mask_vfmadd_sd:
; X86: ## %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %al ## encoding: [0x8a,0x44,0x24,0x04]
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
; X86-NEXT: vmovapd %xmm0, %xmm3 ## encoding: [0xc5,0xf9,0x28,0xd8]
; X86-NEXT: vfmadd213sd %xmm2, %xmm1, %xmm3 {%k1} ## encoding: [0x62,0xf2,0xf5,0x09,0xa9,0xda]
@ -9941,7 +9941,7 @@ declare <4 x float> @llvm.x86.avx512.mask.vfmadd.ss(<4 x float>, <4 x float>, <4
define <4 x float>@test_int_x86_avx512_mask_vfmadd_ss(<4 x float> %x0, <4 x float> %x1, <4 x float> %x2, i8 %x3,i32 %x4 ){
; X86-LABEL: test_int_x86_avx512_mask_vfmadd_ss:
; X86: ## %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %al ## encoding: [0x8a,0x44,0x24,0x04]
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
; X86-NEXT: vmovaps %xmm0, %xmm3 ## encoding: [0xc5,0xf8,0x28,0xd8]
; X86-NEXT: vfmadd213ss %xmm2, %xmm1, %xmm3 {%k1} ## encoding: [0x62,0xf2,0x75,0x09,0xa9,0xda]
@ -9978,7 +9978,7 @@ declare <2 x double> @llvm.x86.avx512.maskz.vfmadd.sd(<2 x double>, <2 x double>
define <2 x double>@test_int_x86_avx512_maskz_vfmadd_sd(<2 x double> %x0, <2 x double> %x1, <2 x double> %x2, i8 %x3,i32 %x4 ){
; X86-LABEL: test_int_x86_avx512_maskz_vfmadd_sd:
; X86: ## %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %al ## encoding: [0x8a,0x44,0x24,0x04]
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
; X86-NEXT: vmovapd %xmm0, %xmm3 ## encoding: [0xc5,0xf9,0x28,0xd8]
; X86-NEXT: vfmadd213sd %xmm2, %xmm1, %xmm3 {%k1} {z} ## encoding: [0x62,0xf2,0xf5,0x89,0xa9,0xda]
@ -10007,7 +10007,7 @@ declare <4 x float> @llvm.x86.avx512.maskz.vfmadd.ss(<4 x float>, <4 x float>, <
define <4 x float>@test_int_x86_avx512_maskz_vfmadd_ss(<4 x float> %x0, <4 x float> %x1, <4 x float> %x2, i8 %x3,i32 %x4 ){
; X86-LABEL: test_int_x86_avx512_maskz_vfmadd_ss:
; X86: ## %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %al ## encoding: [0x8a,0x44,0x24,0x04]
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
; X86-NEXT: vfmadd213ss %xmm2, %xmm1, %xmm0 {%k1} {z} ## encoding: [0x62,0xf2,0x75,0x89,0xa9,0xc2]
; X86-NEXT: ## xmm0 {%k1} {z} = (xmm1 * xmm0) + xmm2
@ -10029,7 +10029,7 @@ declare <2 x double> @llvm.x86.avx512.mask3.vfmadd.sd(<2 x double>, <2 x double>
define <2 x double>@test_int_x86_avx512_mask3_vfmadd_sd(<2 x double> %x0, <2 x double> %x1, <2 x double> %x2, i8 %x3,i32 %x4 ){
; X86-LABEL: test_int_x86_avx512_mask3_vfmadd_sd:
; X86: ## %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %al ## encoding: [0x8a,0x44,0x24,0x04]
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
; X86-NEXT: vmovapd %xmm2, %xmm3 ## encoding: [0xc5,0xf9,0x28,0xda]
; X86-NEXT: vfmadd231sd %xmm1, %xmm0, %xmm3 {%k1} ## encoding: [0x62,0xf2,0xfd,0x09,0xb9,0xd9]
@ -10066,7 +10066,7 @@ declare <4 x float> @llvm.x86.avx512.mask3.vfmadd.ss(<4 x float>, <4 x float>, <
define <4 x float>@test_int_x86_avx512_mask3_vfmadd_ss(<4 x float> %x0, <4 x float> %x1, <4 x float> %x2, i8 %x3,i32 %x4 ){
; X86-LABEL: test_int_x86_avx512_mask3_vfmadd_ss:
; X86: ## %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %al ## encoding: [0x8a,0x44,0x24,0x04]
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
; X86-NEXT: vmovaps %xmm2, %xmm3 ## encoding: [0xc5,0xf8,0x28,0xda]
; X86-NEXT: vfmadd231ss %xmm1, %xmm0, %xmm3 {%k1} ## encoding: [0x62,0xf2,0x7d,0x09,0xb9,0xd9]
@ -10101,7 +10101,7 @@ define <4 x float>@test_int_x86_avx512_mask3_vfmadd_ss(<4 x float> %x0, <4 x flo
define void @fmadd_ss_mask_memfold(ptr %a, ptr %b, i8 %c) {
; X86-LABEL: fmadd_ss_mask_memfold:
; X86: ## %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %al ## encoding: [0x8a,0x44,0x24,0x0c]
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x0c]
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx ## encoding: [0x8b,0x4c,0x24,0x08]
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx ## encoding: [0x8b,0x54,0x24,0x04]
; X86-NEXT: vmovss (%edx), %xmm0 ## EVEX TO VEX Compression encoding: [0xc5,0xfa,0x10,0x02]
@ -10149,7 +10149,7 @@ define void @fmadd_ss_mask_memfold(ptr %a, ptr %b, i8 %c) {
define void @fmadd_ss_maskz_memfold(ptr %a, ptr %b, i8 %c) {
; X86-LABEL: fmadd_ss_maskz_memfold:
; X86: ## %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %al ## encoding: [0x8a,0x44,0x24,0x0c]
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x0c]
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx ## encoding: [0x8b,0x4c,0x24,0x08]
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx ## encoding: [0x8b,0x54,0x24,0x04]
; X86-NEXT: vmovss (%edx), %xmm0 ## EVEX TO VEX Compression encoding: [0xc5,0xfa,0x10,0x02]
@ -10193,7 +10193,7 @@ define void @fmadd_ss_maskz_memfold(ptr %a, ptr %b, i8 %c) {
define void @fmadd_sd_mask_memfold(ptr %a, ptr %b, i8 %c) {
; X86-LABEL: fmadd_sd_mask_memfold:
; X86: ## %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %al ## encoding: [0x8a,0x44,0x24,0x0c]
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x0c]
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx ## encoding: [0x8b,0x4c,0x24,0x08]
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx ## encoding: [0x8b,0x54,0x24,0x04]
; X86-NEXT: vmovsd (%edx), %xmm0 ## EVEX TO VEX Compression encoding: [0xc5,0xfb,0x10,0x02]
@ -10237,7 +10237,7 @@ define void @fmadd_sd_mask_memfold(ptr %a, ptr %b, i8 %c) {
define void @fmadd_sd_maskz_memfold(ptr %a, ptr %b, i8 %c) {
; X86-LABEL: fmadd_sd_maskz_memfold:
; X86: ## %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %al ## encoding: [0x8a,0x44,0x24,0x0c]
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x0c]
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx ## encoding: [0x8b,0x4c,0x24,0x08]
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx ## encoding: [0x8b,0x54,0x24,0x04]
; X86-NEXT: vmovsd (%edx), %xmm0 ## EVEX TO VEX Compression encoding: [0xc5,0xfb,0x10,0x02]
@ -10279,7 +10279,7 @@ declare <2 x double> @llvm.x86.avx512.mask3.vfmsub.sd(<2 x double>, <2 x double>
define <2 x double>@test_int_x86_avx512_mask3_vfmsub_sd(<2 x double> %x0, <2 x double> %x1, <2 x double> %x2, i8 %x3,i32 %x4 ){
; X86-LABEL: test_int_x86_avx512_mask3_vfmsub_sd:
; X86: ## %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %al ## encoding: [0x8a,0x44,0x24,0x04]
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
; X86-NEXT: vmovapd %xmm2, %xmm3 ## encoding: [0xc5,0xf9,0x28,0xda]
; X86-NEXT: vfmsub231sd %xmm1, %xmm0, %xmm3 {%k1} ## encoding: [0x62,0xf2,0xfd,0x09,0xbb,0xd9]
@ -10316,7 +10316,7 @@ declare <4 x float> @llvm.x86.avx512.mask3.vfmsub.ss(<4 x float>, <4 x float>, <
define <4 x float>@test_int_x86_avx512_mask3_vfmsub_ss(<4 x float> %x0, <4 x float> %x1, <4 x float> %x2, i8 %x3,i32 %x4 ){
; X86-LABEL: test_int_x86_avx512_mask3_vfmsub_ss:
; X86: ## %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %al ## encoding: [0x8a,0x44,0x24,0x04]
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
; X86-NEXT: vmovaps %xmm2, %xmm3 ## encoding: [0xc5,0xf8,0x28,0xda]
; X86-NEXT: vfmsub231ss %xmm1, %xmm0, %xmm3 {%k1} ## encoding: [0x62,0xf2,0x7d,0x09,0xbb,0xd9]
@ -10353,7 +10353,7 @@ declare <2 x double> @llvm.x86.avx512.mask3.vfnmsub.sd(<2 x double>, <2 x double
define <2 x double>@test_int_x86_avx512_mask3_vfnmsub_sd(<2 x double> %x0, <2 x double> %x1, <2 x double> %x2, i8 %x3,i32 %x4 ){
; X86-LABEL: test_int_x86_avx512_mask3_vfnmsub_sd:
; X86: ## %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %al ## encoding: [0x8a,0x44,0x24,0x04]
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
; X86-NEXT: vmovapd %xmm2, %xmm3 ## encoding: [0xc5,0xf9,0x28,0xda]
; X86-NEXT: vfnmsub231sd %xmm1, %xmm0, %xmm3 {%k1} ## encoding: [0x62,0xf2,0xfd,0x09,0xbf,0xd9]
@ -10390,7 +10390,7 @@ declare <4 x float> @llvm.x86.avx512.mask3.vfnmsub.ss(<4 x float>, <4 x float>,
define <4 x float>@test_int_x86_avx512_mask3_vfnmsub_ss(<4 x float> %x0, <4 x float> %x1, <4 x float> %x2, i8 %x3,i32 %x4 ){
; X86-LABEL: test_int_x86_avx512_mask3_vfnmsub_ss:
; X86: ## %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %al ## encoding: [0x8a,0x44,0x24,0x04]
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
; X86-NEXT: vmovaps %xmm2, %xmm3 ## encoding: [0xc5,0xf8,0x28,0xda]
; X86-NEXT: vfnmsub231ss %xmm1, %xmm0, %xmm3 {%k1} ## encoding: [0x62,0xf2,0x7d,0x09,0xbf,0xd9]
@ -10426,7 +10426,7 @@ define <4 x float>@test_int_x86_avx512_mask3_vfmadd_ss_rm(<4 x float> %x0, <4 x
; X86-LABEL: test_int_x86_avx512_mask3_vfmadd_ss_rm:
; X86: ## %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
; X86-NEXT: movb {{[0-9]+}}(%esp), %cl ## encoding: [0x8a,0x4c,0x24,0x08]
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx ## encoding: [0x0f,0xb6,0x4c,0x24,0x08]
; X86-NEXT: kmovw %ecx, %k1 ## encoding: [0xc5,0xf8,0x92,0xc9]
; X86-NEXT: vfmadd231ss (%eax), %xmm0, %xmm1 {%k1} ## encoding: [0x62,0xf2,0x7d,0x09,0xb9,0x08]
; X86-NEXT: ## xmm1 {%k1} = (xmm0 * mem) + xmm1
@ -10450,7 +10450,7 @@ define <4 x float>@test_int_x86_avx512_mask_vfmadd_ss_rm(<4 x float> %x0, <4 x f
; X86-LABEL: test_int_x86_avx512_mask_vfmadd_ss_rm:
; X86: ## %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
; X86-NEXT: movb {{[0-9]+}}(%esp), %cl ## encoding: [0x8a,0x4c,0x24,0x08]
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx ## encoding: [0x0f,0xb6,0x4c,0x24,0x08]
; X86-NEXT: kmovw %ecx, %k1 ## encoding: [0xc5,0xf8,0x92,0xc9]
; X86-NEXT: vfmadd132ss (%eax), %xmm1, %xmm0 {%k1} ## encoding: [0x62,0xf2,0x75,0x09,0x99,0x00]
; X86-NEXT: ## xmm0 {%k1} = (xmm0 * mem) + xmm1

36
llvm/test/CodeGen/X86/avx512-intrinsics.ll
View File

@ -1099,7 +1099,7 @@ define void @test_mask_store_ss(ptr %ptr, <4 x float> %data, i8 %mask) {
; X86-LABEL: test_mask_store_ss:
; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: kmovw %ecx, %k1
; X86-NEXT: vmovss %xmm0, (%eax) {%k1}
; X86-NEXT: retl
@ -5735,7 +5735,7 @@ define <2 x double> @test_int_x86_avx512_mask_vfmadd_sd(<2 x double> %x0, <2 x d
;
; X86-LABEL: test_int_x86_avx512_mask_vfmadd_sd:
; X86: # %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: kmovw %eax, %k1
; X86-NEXT: vmovapd %xmm0, %xmm3
; X86-NEXT: vfmadd213sd {{.*#+}} xmm3 {%k1} = (xmm1 * xmm3) + xmm2
@ -5786,7 +5786,7 @@ define <4 x float> @test_int_x86_avx512_mask_vfmadd_ss(<4 x float> %x0, <4 x flo
;
; X86-LABEL: test_int_x86_avx512_mask_vfmadd_ss:
; X86: # %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: kmovw %eax, %k1
; X86-NEXT: vmovaps %xmm0, %xmm3
; X86-NEXT: vfmadd213ss {{.*#+}} xmm3 {%k1} = (xmm1 * xmm3) + xmm2
@ -5834,7 +5834,7 @@ define <2 x double>@test_int_x86_avx512_maskz_vfmadd_sd(<2 x double> %x0, <2 x d
;
; X86-LABEL: test_int_x86_avx512_maskz_vfmadd_sd:
; X86: # %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: kmovw %eax, %k1
; X86-NEXT: vmovapd %xmm0, %xmm3
; X86-NEXT: vfmadd213sd {{.*#+}} xmm3 {%k1} {z} = (xmm1 * xmm3) + xmm2
@ -5876,7 +5876,7 @@ define <4 x float>@test_int_x86_avx512_maskz_vfmadd_ss(<4 x float> %x0, <4 x flo
;
; X86-LABEL: test_int_x86_avx512_maskz_vfmadd_ss:
; X86: # %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: kmovw %eax, %k1
; X86-NEXT: vmovaps %xmm0, %xmm3
; X86-NEXT: vfmadd213ss {{.*#+}} xmm3 {%k1} {z} = (xmm1 * xmm3) + xmm2
@ -5916,7 +5916,7 @@ define <4 x float> @test_int_x86_avx512_maskz_vfmadd_ss_load0(i8 zeroext %0, ptr
; X86-LABEL: test_int_x86_avx512_maskz_vfmadd_ss_load0:
; X86: # %bb.0:
; X86-NEXT: vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: vmovaps (%ecx), %xmm0
; X86-NEXT: kmovw %eax, %k1
@ -5947,7 +5947,7 @@ define <2 x double> @test_int_x86_avx512_mask3_vfmadd_sd(<2 x double> %x0, <2 x
;
; X86-LABEL: test_int_x86_avx512_mask3_vfmadd_sd:
; X86: # %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: kmovw %eax, %k1
; X86-NEXT: vmovapd %xmm2, %xmm3
; X86-NEXT: vfmadd231sd {{.*#+}} xmm3 {%k1} = (xmm0 * xmm1) + xmm3
@ -5998,7 +5998,7 @@ define <4 x float> @test_int_x86_avx512_mask3_vfmadd_ss(<4 x float> %x0, <4 x fl
;
; X86-LABEL: test_int_x86_avx512_mask3_vfmadd_ss:
; X86: # %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: kmovw %eax, %k1
; X86-NEXT: vmovaps %xmm2, %xmm3
; X86-NEXT: vfmadd231ss {{.*#+}} xmm3 {%k1} = (xmm0 * xmm1) + xmm3
@ -6047,7 +6047,7 @@ define void @fmadd_ss_mask_memfold(ptr %a, ptr %b, i8 %c) {
;
; X86-LABEL: fmadd_ss_mask_memfold:
; X86: # %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
@ -6093,7 +6093,7 @@ define void @fmadd_ss_maskz_memfold(ptr %a, ptr %b, i8 %c) {
;
; X86-LABEL: fmadd_ss_maskz_memfold:
; X86: # %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
@ -6139,7 +6139,7 @@ define void @fmadd_sd_mask_memfold(ptr %a, ptr %b, i8 %c) {
;
; X86-LABEL: fmadd_sd_mask_memfold:
; X86: # %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
@ -6181,7 +6181,7 @@ define void @fmadd_sd_maskz_memfold(ptr %a, ptr %b, i8 %c) {
;
; X86-LABEL: fmadd_sd_maskz_memfold:
; X86: # %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
@ -6225,7 +6225,7 @@ define <2 x double> @test_int_x86_avx512_mask3_vfmsub_sd(<2 x double> %x0, <2 x
;
; X86-LABEL: test_int_x86_avx512_mask3_vfmsub_sd:
; X86: # %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: kmovw %eax, %k1
; X86-NEXT: vmovapd %xmm2, %xmm3
; X86-NEXT: vfmsub231sd {{.*#+}} xmm3 {%k1} = (xmm0 * xmm1) - xmm3
@ -6282,7 +6282,7 @@ define <4 x float> @test_int_x86_avx512_mask3_vfmsub_ss(<4 x float> %x0, <4 x fl
;
; X86-LABEL: test_int_x86_avx512_mask3_vfmsub_ss:
; X86: # %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: kmovw %eax, %k1
; X86-NEXT: vmovaps %xmm2, %xmm3
; X86-NEXT: vfmsub231ss {{.*#+}} xmm3 {%k1} = (xmm0 * xmm1) - xmm3
@ -6339,7 +6339,7 @@ define <2 x double> @test_int_x86_avx512_mask3_vfnmsub_sd(<2 x double> %x0, <2 x
;
; X86-LABEL: test_int_x86_avx512_mask3_vfnmsub_sd:
; X86: # %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: kmovw %eax, %k1
; X86-NEXT: vmovapd %xmm2, %xmm3
; X86-NEXT: vfnmsub231sd {{.*#+}} xmm3 {%k1} = -(xmm0 * xmm1) - xmm3
@ -6399,7 +6399,7 @@ define <4 x float> @test_int_x86_avx512_mask3_vfnmsub_ss(<4 x float> %x0, <4 x f
;
; X86-LABEL: test_int_x86_avx512_mask3_vfnmsub_ss:
; X86: # %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: kmovw %eax, %k1
; X86-NEXT: vmovaps %xmm2, %xmm3
; X86-NEXT: vfnmsub231ss {{.*#+}} xmm3 {%k1} = -(xmm0 * xmm1) - xmm3
@ -6455,7 +6455,7 @@ define <4 x float>@test_int_x86_avx512_mask3_vfmadd_ss_rm(<4 x float> %x0, <4 x
; X86-LABEL: test_int_x86_avx512_mask3_vfmadd_ss_rm:
; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: kmovw %ecx, %k1
; X86-NEXT: vfmadd231ss {{.*#+}} xmm1 {%k1} = (xmm0 * mem) + xmm1
; X86-NEXT: vmovaps %xmm1, %xmm0
@ -6483,7 +6483,7 @@ define <4 x float>@test_int_x86_avx512_mask_vfmadd_ss_rm(<4 x float> %x0, <4 x f
; X86-LABEL: test_int_x86_avx512_mask_vfmadd_ss_rm:
; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: kmovw %ecx, %k1
; X86-NEXT: vfmadd132ss {{.*#+}} xmm0 {%k1} = (xmm0 * mem) + xmm1
; X86-NEXT: retl

26
llvm/test/CodeGen/X86/avx512-load-store.ll
View File

@ -13,7 +13,7 @@ define <4 x float> @test_mm_mask_move_ss(<4 x float> %__W, i8 zeroext %__U, <4 x
;
; CHECK32-LABEL: test_mm_mask_move_ss:
; CHECK32: # %bb.0: # %entry
; CHECK32-NEXT: movb {{[0-9]+}}(%esp), %al
; CHECK32-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; CHECK32-NEXT: kmovw %eax, %k1
; CHECK32-NEXT: vmovss %xmm2, %xmm1, %xmm0 {%k1}
; CHECK32-NEXT: retl
@ -36,7 +36,7 @@ define <4 x float> @test_mm_maskz_move_ss(i8 zeroext %__U, <4 x float> %__A, <4
;
; CHECK32-LABEL: test_mm_maskz_move_ss:
; CHECK32: # %bb.0: # %entry
; CHECK32-NEXT: movb {{[0-9]+}}(%esp), %al
; CHECK32-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; CHECK32-NEXT: kmovw %eax, %k1
; CHECK32-NEXT: vmovss %xmm1, %xmm0, %xmm0 {%k1} {z}
; CHECK32-NEXT: retl
@ -58,7 +58,7 @@ define <2 x double> @test_mm_mask_move_sd(<2 x double> %__W, i8 zeroext %__U, <2
;
; CHECK32-LABEL: test_mm_mask_move_sd:
; CHECK32: # %bb.0: # %entry
; CHECK32-NEXT: movb {{[0-9]+}}(%esp), %al
; CHECK32-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; CHECK32-NEXT: kmovw %eax, %k1
; CHECK32-NEXT: vmovsd %xmm2, %xmm1, %xmm0 {%k1}
; CHECK32-NEXT: retl
@ -81,7 +81,7 @@ define <2 x double> @test_mm_maskz_move_sd(i8 zeroext %__U, <2 x double> %__A, <
;
; CHECK32-LABEL: test_mm_maskz_move_sd:
; CHECK32: # %bb.0: # %entry
; CHECK32-NEXT: movb {{[0-9]+}}(%esp), %al
; CHECK32-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; CHECK32-NEXT: kmovw %eax, %k1
; CHECK32-NEXT: vmovsd %xmm1, %xmm0, %xmm0 {%k1} {z}
; CHECK32-NEXT: retl
@ -127,7 +127,7 @@ define void @test_mm_mask_store_sd(ptr %__W, i8 zeroext %__U, <2 x double> %__A)
; CHECK32-LABEL: test_mm_mask_store_sd:
; CHECK32: # %bb.0: # %entry
; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %eax
; CHECK32-NEXT: movb {{[0-9]+}}(%esp), %cl
; CHECK32-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; CHECK32-NEXT: kmovw %ecx, %k1
; CHECK32-NEXT: vmovsd %xmm0, (%eax) {%k1}
; CHECK32-NEXT: retl
@ -174,7 +174,7 @@ define <2 x double> @test_mm_mask_load_sd(<2 x double> %__A, i8 zeroext %__U, pt
; CHECK32-LABEL: test_mm_mask_load_sd:
; CHECK32: # %bb.0: # %entry
; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %eax
; CHECK32-NEXT: movb {{[0-9]+}}(%esp), %cl
; CHECK32-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; CHECK32-NEXT: kmovw %ecx, %k1
; CHECK32-NEXT: vmovsd (%eax), %xmm0 {%k1}
; CHECK32-NEXT: retl
@ -221,7 +221,7 @@ define <2 x double> @test_mm_maskz_load_sd(i8 zeroext %__U, ptr %__W) local_unna
; CHECK32-LABEL: test_mm_maskz_load_sd:
; CHECK32: # %bb.0: # %entry
; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %eax
; CHECK32-NEXT: movb {{[0-9]+}}(%esp), %cl
; CHECK32-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; CHECK32-NEXT: kmovw %ecx, %k1
; CHECK32-NEXT: vmovsd (%eax), %xmm0 {%k1} {z}
; CHECK32-NEXT: retl
@ -245,7 +245,7 @@ define void @test_mm_mask_store_ss_2(ptr %__P, i8 zeroext %__U, <4 x float> %__A
; CHECK32-LABEL: test_mm_mask_store_ss_2:
; CHECK32: # %bb.0: # %entry
; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %eax
; CHECK32-NEXT: movb {{[0-9]+}}(%esp), %cl
; CHECK32-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; CHECK32-NEXT: kmovw %ecx, %k1
; CHECK32-NEXT: vmovss %xmm0, (%eax) {%k1}
; CHECK32-NEXT: retl
@ -267,7 +267,7 @@ define void @test_mm_mask_store_sd_2(ptr %__P, i8 zeroext %__U, <2 x double> %__
; CHECK32-LABEL: test_mm_mask_store_sd_2:
; CHECK32: # %bb.0: # %entry
; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %eax
; CHECK32-NEXT: movb {{[0-9]+}}(%esp), %cl
; CHECK32-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; CHECK32-NEXT: kmovw %ecx, %k1
; CHECK32-NEXT: vmovsd %xmm0, (%eax) {%k1}
; CHECK32-NEXT: retl
@ -289,7 +289,7 @@ define <4 x float> @test_mm_mask_load_ss_2(<4 x float> %__A, i8 zeroext %__U, pt
; CHECK32-LABEL: test_mm_mask_load_ss_2:
; CHECK32: # %bb.0: # %entry
; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %eax
; CHECK32-NEXT: movb {{[0-9]+}}(%esp), %cl
; CHECK32-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; CHECK32-NEXT: kmovw %ecx, %k1
; CHECK32-NEXT: vmovss (%eax), %xmm0 {%k1}
; CHECK32-NEXT: retl
@ -312,7 +312,7 @@ define <4 x float> @test_mm_maskz_load_ss_2(i8 zeroext %__U, ptr readonly %__W)
; CHECK32-LABEL: test_mm_maskz_load_ss_2:
; CHECK32: # %bb.0: # %entry
; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %eax
; CHECK32-NEXT: movb {{[0-9]+}}(%esp), %cl
; CHECK32-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; CHECK32-NEXT: kmovw %ecx, %k1
; CHECK32-NEXT: vmovss (%eax), %xmm0 {%k1} {z}
; CHECK32-NEXT: retl
@ -334,7 +334,7 @@ define <2 x double> @test_mm_mask_load_sd_2(<2 x double> %__A, i8 zeroext %__U,
; CHECK32-LABEL: test_mm_mask_load_sd_2:
; CHECK32: # %bb.0: # %entry
; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %eax
; CHECK32-NEXT: movb {{[0-9]+}}(%esp), %cl
; CHECK32-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; CHECK32-NEXT: kmovw %ecx, %k1
; CHECK32-NEXT: vmovsd (%eax), %xmm0 {%k1}
; CHECK32-NEXT: retl
@ -357,7 +357,7 @@ define <2 x double> @test_mm_maskz_load_sd_2(i8 zeroext %__U, ptr readonly %__W)
; CHECK32-LABEL: test_mm_maskz_load_sd_2:
; CHECK32: # %bb.0: # %entry
; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %eax
; CHECK32-NEXT: movb {{[0-9]+}}(%esp), %cl
; CHECK32-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; CHECK32-NEXT: kmovw %ecx, %k1
; CHECK32-NEXT: vmovsd (%eax), %xmm0 {%k1} {z}
; CHECK32-NEXT: retl

14
llvm/test/CodeGen/X86/avx512-load-trunc-store-i1.ll
View File

@ -13,7 +13,7 @@ define void @load_v1i2_trunc_v1i1_store(ptr %a0,ptr %a1) {
;
; AVX512-ONLY-LABEL: load_v1i2_trunc_v1i1_store:
; AVX512-ONLY: # %bb.0:
; AVX512-ONLY-NEXT: movb (%rdi), %al
; AVX512-ONLY-NEXT: movzbl (%rdi), %eax
; AVX512-ONLY-NEXT: andl $1, %eax
; AVX512-ONLY-NEXT: kmovw %eax, %k0
; AVX512-ONLY-NEXT: kmovw %k0, %eax
@ -35,7 +35,7 @@ define void @load_v1i3_trunc_v1i1_store(ptr %a0,ptr %a1) {
;
; AVX512-ONLY-LABEL: load_v1i3_trunc_v1i1_store:
; AVX512-ONLY: # %bb.0:
; AVX512-ONLY-NEXT: movb (%rdi), %al
; AVX512-ONLY-NEXT: movzbl (%rdi), %eax
; AVX512-ONLY-NEXT: andl $1, %eax
; AVX512-ONLY-NEXT: kmovw %eax, %k0
; AVX512-ONLY-NEXT: kmovw %k0, %eax
@ -57,7 +57,7 @@ define void @load_v1i4_trunc_v1i1_store(ptr %a0,ptr %a1) {
;
; AVX512-ONLY-LABEL: load_v1i4_trunc_v1i1_store:
; AVX512-ONLY: # %bb.0:
; AVX512-ONLY-NEXT: movb (%rdi), %al
; AVX512-ONLY-NEXT: movzbl (%rdi), %eax
; AVX512-ONLY-NEXT: andl $1, %eax
; AVX512-ONLY-NEXT: kmovw %eax, %k0
; AVX512-ONLY-NEXT: kmovw %k0, %eax
@ -79,7 +79,7 @@ define void @load_v1i8_trunc_v1i1_store(ptr %a0,ptr %a1) {
;
; AVX512-ONLY-LABEL: load_v1i8_trunc_v1i1_store:
; AVX512-ONLY: # %bb.0:
; AVX512-ONLY-NEXT: movb (%rdi), %al
; AVX512-ONLY-NEXT: movzbl (%rdi), %eax
; AVX512-ONLY-NEXT: andl $1, %eax
; AVX512-ONLY-NEXT: kmovw %eax, %k0
; AVX512-ONLY-NEXT: kmovw %k0, %eax
@ -101,7 +101,7 @@ define void @load_v1i16_trunc_v1i1_store(ptr %a0,ptr %a1) {
;
; AVX512-ONLY-LABEL: load_v1i16_trunc_v1i1_store:
; AVX512-ONLY: # %bb.0:
; AVX512-ONLY-NEXT: movb (%rdi), %al
; AVX512-ONLY-NEXT: movzbl (%rdi), %eax
; AVX512-ONLY-NEXT: andl $1, %eax
; AVX512-ONLY-NEXT: kmovw %eax, %k0
; AVX512-ONLY-NEXT: kmovw %k0, %eax
@ -123,7 +123,7 @@ define void @load_v1i32_trunc_v1i1_store(ptr %a0,ptr %a1) {
;
; AVX512-ONLY-LABEL: load_v1i32_trunc_v1i1_store:
; AVX512-ONLY: # %bb.0:
; AVX512-ONLY-NEXT: movb (%rdi), %al
; AVX512-ONLY-NEXT: movzbl (%rdi), %eax
; AVX512-ONLY-NEXT: andl $1, %eax
; AVX512-ONLY-NEXT: kmovw %eax, %k0
; AVX512-ONLY-NEXT: kmovw %k0, %eax
@ -145,7 +145,7 @@ define void @load_v1i64_trunc_v1i1_store(ptr %a0,ptr %a1) {
;
; AVX512-ONLY-LABEL: load_v1i64_trunc_v1i1_store:
; AVX512-ONLY: # %bb.0:
; AVX512-ONLY-NEXT: movb (%rdi), %al
; AVX512-ONLY-NEXT: movzbl (%rdi), %eax
; AVX512-ONLY-NEXT: andl $1, %eax
; AVX512-ONLY-NEXT: kmovw %eax, %k0
; AVX512-ONLY-NEXT: kmovw %k0, %eax

256
llvm/test/CodeGen/X86/avx512-mask-op.ll
View File

@ -55,7 +55,7 @@ define i8 @mask8(i8 %x) {
;
; X86-LABEL: mask8:
; X86: ## %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: notb %al
; X86-NEXT: retl
%m0 = bitcast i8 %x to <8 x i1>
@ -73,7 +73,7 @@ define i32 @mask8_zext(i8 %x) {
;
; X86-LABEL: mask8_zext:
; X86: ## %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: notb %al
; X86-NEXT: movzbl %al, %eax
; X86-NEXT: retl
@ -277,7 +277,7 @@ define i8 @shuf_test1(i16 %v) nounwind {
;
; X86-LABEL: shuf_test1:
; X86: ## %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: retl
%v1 = bitcast i16 %v to <16 x i1>
%mask = shufflevector <16 x i1> %v1, <16 x i1> undef, <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
@ -1996,7 +1996,7 @@ define void @store_i8_i1(i8 %x, ptr%y) {
; X86-LABEL: store_i8_i1:
; X86: ## %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: andb $1, %cl
; X86-NEXT: movb %cl, (%eax)
; X86-NEXT: retl
@ -2951,7 +2951,7 @@ define void @store_64i1(ptr %a, <64 x i1> %v) {
; KNL-NEXT: kandw %k1, %k0, %k0
; KNL-NEXT: kmovw %k1, %k2
; KNL-NEXT: kmovw %k1, {{[-0-9]+}}(%r{{[sb]}}p) ## 2-byte Spill
; KNL-NEXT: movb {{[0-9]+}}(%rsp), %al
; KNL-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; KNL-NEXT: kmovw %eax, %k1
; KNL-NEXT: kshiftlw $15, %k1, %k1
; KNL-NEXT: kshiftrw $10, %k1, %k1
@ -2960,7 +2960,7 @@ define void @store_64i1(ptr %a, <64 x i1> %v) {
; KNL-NEXT: kmovw %eax, %k1
; KNL-NEXT: kmovw %k1, {{[-0-9]+}}(%r{{[sb]}}p) ## 2-byte Spill
; KNL-NEXT: kandw %k1, %k0, %k0
; KNL-NEXT: movb {{[0-9]+}}(%rsp), %al
; KNL-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; KNL-NEXT: kmovw %eax, %k1
; KNL-NEXT: kshiftlw $15, %k1, %k1
; KNL-NEXT: kshiftrw $9, %k1, %k1
@ -2970,7 +2970,7 @@ define void @store_64i1(ptr %a, <64 x i1> %v) {
; KNL-NEXT: kandw %k1, %k0, %k0
; KNL-NEXT: kmovw %k1, %k3
; KNL-NEXT: kmovw %k1, {{[-0-9]+}}(%r{{[sb]}}p) ## 2-byte Spill
; KNL-NEXT: movb {{[0-9]+}}(%rsp), %al
; KNL-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; KNL-NEXT: kmovw %eax, %k1
; KNL-NEXT: kshiftlw $15, %k1, %k1
; KNL-NEXT: kshiftrw $8, %k1, %k1
@ -2979,7 +2979,7 @@ define void @store_64i1(ptr %a, <64 x i1> %v) {
; KNL-NEXT: kmovw %eax, %k1
; KNL-NEXT: kmovw %k1, {{[-0-9]+}}(%r{{[sb]}}p) ## 2-byte Spill
; KNL-NEXT: kandw %k1, %k0, %k0
; KNL-NEXT: movb {{[0-9]+}}(%rsp), %al
; KNL-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; KNL-NEXT: kmovw %eax, %k1
; KNL-NEXT: kshiftlw $15, %k1, %k1
; KNL-NEXT: kshiftrw $7, %k1, %k1
@ -2989,7 +2989,7 @@ define void @store_64i1(ptr %a, <64 x i1> %v) {
; KNL-NEXT: kandw %k1, %k0, %k0
; KNL-NEXT: kmovw %k1, %k4
; KNL-NEXT: kmovw %k1, {{[-0-9]+}}(%r{{[sb]}}p) ## 2-byte Spill
; KNL-NEXT: movb {{[0-9]+}}(%rsp), %al
; KNL-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; KNL-NEXT: kmovw %eax, %k1
; KNL-NEXT: kshiftlw $15, %k1, %k1
; KNL-NEXT: kshiftrw $6, %k1, %k1
@ -2998,7 +2998,7 @@ define void @store_64i1(ptr %a, <64 x i1> %v) {
; KNL-NEXT: kmovw %eax, %k1
; KNL-NEXT: kmovw %k1, {{[-0-9]+}}(%r{{[sb]}}p) ## 2-byte Spill
; KNL-NEXT: kandw %k1, %k0, %k0
; KNL-NEXT: movb {{[0-9]+}}(%rsp), %al
; KNL-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; KNL-NEXT: kmovw %eax, %k1
; KNL-NEXT: kshiftlw $15, %k1, %k1
; KNL-NEXT: kshiftrw $5, %k1, %k1
@ -3006,7 +3006,7 @@ define void @store_64i1(ptr %a, <64 x i1> %v) {
; KNL-NEXT: movw $-2049, %ax ## imm = 0xF7FF
; KNL-NEXT: kmovw %eax, %k5
; KNL-NEXT: kandw %k5, %k0, %k0
; KNL-NEXT: movb {{[0-9]+}}(%rsp), %al
; KNL-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; KNL-NEXT: kmovw %eax, %k1
; KNL-NEXT: kshiftlw $15, %k1, %k1
; KNL-NEXT: kshiftrw $4, %k1, %k1
@ -3015,7 +3015,7 @@ define void @store_64i1(ptr %a, <64 x i1> %v) {
; KNL-NEXT: kmovw %eax, %k1
; KNL-NEXT: kmovw %k1, {{[-0-9]+}}(%r{{[sb]}}p) ## 2-byte Spill
; KNL-NEXT: kandw %k1, %k0, %k0
; KNL-NEXT: movb {{[0-9]+}}(%rsp), %al
; KNL-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; KNL-NEXT: kmovw %eax, %k1
; KNL-NEXT: kshiftlw $15, %k1, %k1
; KNL-NEXT: kshiftrw $3, %k1, %k1
@ -3024,7 +3024,7 @@ define void @store_64i1(ptr %a, <64 x i1> %v) {
; KNL-NEXT: kmovw %eax, %k1
; KNL-NEXT: kmovw %k1, {{[-0-9]+}}(%r{{[sb]}}p) ## 2-byte Spill
; KNL-NEXT: kandw %k1, %k0, %k0
; KNL-NEXT: movb {{[0-9]+}}(%rsp), %al
; KNL-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; KNL-NEXT: kmovw %eax, %k1
; KNL-NEXT: kshiftlw $15, %k1, %k1
; KNL-NEXT: kshiftrw $2, %k1, %k1
@ -3033,121 +3033,121 @@ define void @store_64i1(ptr %a, <64 x i1> %v) {
; KNL-NEXT: kmovw %eax, %k1
; KNL-NEXT: kmovw %k1, {{[-0-9]+}}(%r{{[sb]}}p) ## 2-byte Spill
; KNL-NEXT: kandw %k1, %k0, %k0
; KNL-NEXT: movb {{[0-9]+}}(%rsp), %al
; KNL-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; KNL-NEXT: kmovw %eax, %k6
; KNL-NEXT: kshiftlw $14, %k6, %k6
; KNL-NEXT: korw %k6, %k0, %k0
; KNL-NEXT: kshiftlw $1, %k0, %k0
; KNL-NEXT: kshiftrw $1, %k0, %k0
; KNL-NEXT: movb {{[0-9]+}}(%rsp), %al
; KNL-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; KNL-NEXT: kmovw %eax, %k6
; KNL-NEXT: kshiftlw $15, %k6, %k6
; KNL-NEXT: korw %k6, %k0, %k0
; KNL-NEXT: kmovw %k0, {{[-0-9]+}}(%r{{[sb]}}p) ## 2-byte Spill
; KNL-NEXT: movb {{[0-9]+}}(%rsp), %al
; KNL-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; KNL-NEXT: andl $1, %eax
; KNL-NEXT: movb {{[0-9]+}}(%rsp), %cl
; KNL-NEXT: movzbl {{[0-9]+}}(%rsp), %ecx
; KNL-NEXT: kmovw %ecx, %k0
; KNL-NEXT: kshiftlw $15, %k0, %k0
; KNL-NEXT: kshiftrw $14, %k0, %k0
; KNL-NEXT: kmovw %eax, %k6
; KNL-NEXT: korw %k0, %k6, %k0
; KNL-NEXT: kandw %k7, %k0, %k0
; KNL-NEXT: movb {{[0-9]+}}(%rsp), %al
; KNL-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; KNL-NEXT: kmovw %eax, %k6
; KNL-NEXT: kshiftlw $15, %k6, %k6
; KNL-NEXT: kshiftrw $13, %k6, %k6
; KNL-NEXT: korw %k6, %k0, %k0
; KNL-NEXT: kmovw {{[-0-9]+}}(%r{{[sb]}}p), %k7 ## 2-byte Reload
; KNL-NEXT: kandw %k7, %k0, %k0
; KNL-NEXT: movb {{[0-9]+}}(%rsp), %al
; KNL-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; KNL-NEXT: kmovw %eax, %k6
; KNL-NEXT: kshiftlw $15, %k6, %k6
; KNL-NEXT: kshiftrw $12, %k6, %k6
; KNL-NEXT: korw %k6, %k0, %k0
; KNL-NEXT: kmovw {{[-0-9]+}}(%r{{[sb]}}p), %k1 ## 2-byte Reload
; KNL-NEXT: kandw %k1, %k0, %k0
; KNL-NEXT: movb {{[0-9]+}}(%rsp), %al
; KNL-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; KNL-NEXT: kmovw %eax, %k6
; KNL-NEXT: kshiftlw $15, %k6, %k6
; KNL-NEXT: kshiftrw $11, %k6, %k6
; KNL-NEXT: korw %k6, %k0, %k0
; KNL-NEXT: kandw %k2, %k0, %k0
; KNL-NEXT: movb {{[0-9]+}}(%rsp), %al
; KNL-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; KNL-NEXT: kmovw %eax, %k6
; KNL-NEXT: kshiftlw $15, %k6, %k6
; KNL-NEXT: kshiftrw $10, %k6, %k6
; KNL-NEXT: korw %k6, %k0, %k0
; KNL-NEXT: kmovw {{[-0-9]+}}(%r{{[sb]}}p), %k2 ## 2-byte Reload
; KNL-NEXT: kandw %k2, %k0, %k0
; KNL-NEXT: movb {{[0-9]+}}(%rsp), %al
; KNL-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; KNL-NEXT: kmovw %eax, %k6
; KNL-NEXT: kshiftlw $15, %k6, %k6
; KNL-NEXT: kshiftrw $9, %k6, %k6
; KNL-NEXT: korw %k6, %k0, %k0
; KNL-NEXT: kandw %k3, %k0, %k0
; KNL-NEXT: movb {{[0-9]+}}(%rsp), %al
; KNL-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; KNL-NEXT: kmovw %eax, %k6
; KNL-NEXT: kshiftlw $15, %k6, %k6
; KNL-NEXT: kshiftrw $8, %k6, %k6
; KNL-NEXT: korw %k6, %k0, %k0
; KNL-NEXT: kmovw {{[-0-9]+}}(%r{{[sb]}}p), %k3 ## 2-byte Reload
; KNL-NEXT: kandw %k3, %k0, %k0
; KNL-NEXT: movb {{[0-9]+}}(%rsp), %al
; KNL-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; KNL-NEXT: kmovw %eax, %k6
; KNL-NEXT: kshiftlw $15, %k6, %k6
; KNL-NEXT: kshiftrw $7, %k6, %k6
; KNL-NEXT: korw %k6, %k0, %k0
; KNL-NEXT: kandw %k4, %k0, %k0
; KNL-NEXT: movb {{[0-9]+}}(%rsp), %al
; KNL-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; KNL-NEXT: kmovw %eax, %k6
; KNL-NEXT: kshiftlw $15, %k6, %k6
; KNL-NEXT: kshiftrw $6, %k6, %k6
; KNL-NEXT: korw %k6, %k0, %k0
; KNL-NEXT: kmovw {{[-0-9]+}}(%r{{[sb]}}p), %k4 ## 2-byte Reload
; KNL-NEXT: kandw %k4, %k0, %k0
; KNL-NEXT: movb {{[0-9]+}}(%rsp), %al
; KNL-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; KNL-NEXT: kmovw %eax, %k6
; KNL-NEXT: kshiftlw $15, %k6, %k6
; KNL-NEXT: kshiftrw $5, %k6, %k6
; KNL-NEXT: korw %k6, %k0, %k0
; KNL-NEXT: kmovw %k5, {{[-0-9]+}}(%r{{[sb]}}p) ## 2-byte Spill
; KNL-NEXT: kandw %k5, %k0, %k0
; KNL-NEXT: movb {{[0-9]+}}(%rsp), %al
; KNL-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; KNL-NEXT: kmovw %eax, %k6
; KNL-NEXT: kshiftlw $15, %k6, %k6
; KNL-NEXT: kshiftrw $4, %k6, %k6
; KNL-NEXT: korw %k6, %k0, %k0
; KNL-NEXT: kmovw {{[-0-9]+}}(%r{{[sb]}}p), %k6 ## 2-byte Reload
; KNL-NEXT: kandw %k6, %k0, %k0
; KNL-NEXT: movb {{[0-9]+}}(%rsp), %al
; KNL-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; KNL-NEXT: kmovw %eax, %k6
; KNL-NEXT: kshiftlw $15, %k6, %k6
; KNL-NEXT: kshiftrw $3, %k6, %k6
; KNL-NEXT: korw %k6, %k0, %k0
; KNL-NEXT: kmovw {{[-0-9]+}}(%r{{[sb]}}p), %k6 ## 2-byte Reload
; KNL-NEXT: kandw %k6, %k0, %k0
; KNL-NEXT: movb {{[0-9]+}}(%rsp), %al
; KNL-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; KNL-NEXT: kmovw %eax, %k6
; KNL-NEXT: kshiftlw $15, %k6, %k6
; KNL-NEXT: kshiftrw $2, %k6, %k6
; KNL-NEXT: korw %k6, %k0, %k0
; KNL-NEXT: kmovw {{[-0-9]+}}(%r{{[sb]}}p), %k6 ## 2-byte Reload
; KNL-NEXT: kandw %k6, %k0, %k0
; KNL-NEXT: movb {{[0-9]+}}(%rsp), %al
; KNL-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; KNL-NEXT: kmovw %eax, %k6
; KNL-NEXT: kshiftlw $14, %k6, %k6
; KNL-NEXT: korw %k6, %k0, %k0
; KNL-NEXT: kshiftlw $1, %k0, %k0
; KNL-NEXT: kshiftrw $1, %k0, %k0
; KNL-NEXT: movb {{[0-9]+}}(%rsp), %al
; KNL-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; KNL-NEXT: kmovw %eax, %k6
; KNL-NEXT: kshiftlw $15, %k6, %k6
; KNL-NEXT: korw %k6, %k0, %k0
; KNL-NEXT: kmovw %k0, {{[-0-9]+}}(%r{{[sb]}}p) ## 2-byte Spill
; KNL-NEXT: movb {{[0-9]+}}(%rsp), %al
; KNL-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; KNL-NEXT: andl $1, %eax
; KNL-NEXT: movb {{[0-9]+}}(%rsp), %cl
; KNL-NEXT: movzbl {{[0-9]+}}(%rsp), %ecx
; KNL-NEXT: kmovw %ecx, %k0
; KNL-NEXT: kshiftlw $15, %k0, %k0
; KNL-NEXT: kshiftrw $14, %k0, %k0
@ -3155,97 +3155,97 @@ define void @store_64i1(ptr %a, <64 x i1> %v) {
; KNL-NEXT: korw %k0, %k6, %k0
; KNL-NEXT: kmovw {{[-0-9]+}}(%r{{[sb]}}p), %k6 ## 2-byte Reload
; KNL-NEXT: kandw %k6, %k0, %k0
; KNL-NEXT: movb {{[0-9]+}}(%rsp), %al
; KNL-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; KNL-NEXT: kmovw %eax, %k6
; KNL-NEXT: kshiftlw $15, %k6, %k6
; KNL-NEXT: kshiftrw $13, %k6, %k6
; KNL-NEXT: korw %k6, %k0, %k0
; KNL-NEXT: kandw %k7, %k0, %k0
; KNL-NEXT: movb {{[0-9]+}}(%rsp), %al
; KNL-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; KNL-NEXT: kmovw %eax, %k6
; KNL-NEXT: kshiftlw $15, %k6, %k6
; KNL-NEXT: kshiftrw $12, %k6, %k6
; KNL-NEXT: korw %k6, %k0, %k0
; KNL-NEXT: kandw %k1, %k0, %k0
; KNL-NEXT: movb {{[0-9]+}}(%rsp), %al
; KNL-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; KNL-NEXT: kmovw %eax, %k6
; KNL-NEXT: kshiftlw $15, %k6, %k6
; KNL-NEXT: kshiftrw $11, %k6, %k6
; KNL-NEXT: korw %k6, %k0, %k0
; KNL-NEXT: kmovw {{[-0-9]+}}(%r{{[sb]}}p), %k1 ## 2-byte Reload
; KNL-NEXT: kandw %k1, %k0, %k0
; KNL-NEXT: movb {{[0-9]+}}(%rsp), %al
; KNL-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; KNL-NEXT: kmovw %eax, %k6
; KNL-NEXT: kshiftlw $15, %k6, %k6
; KNL-NEXT: kshiftrw $10, %k6, %k6
; KNL-NEXT: korw %k6, %k0, %k0
; KNL-NEXT: kandw %k2, %k0, %k0
; KNL-NEXT: movb {{[0-9]+}}(%rsp), %al
; KNL-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; KNL-NEXT: kmovw %eax, %k6
; KNL-NEXT: kshiftlw $15, %k6, %k6
; KNL-NEXT: kshiftrw $9, %k6, %k6
; KNL-NEXT: korw %k6, %k0, %k0
; KNL-NEXT: kmovw {{[-0-9]+}}(%r{{[sb]}}p), %k1 ## 2-byte Reload
; KNL-NEXT: kandw %k1, %k0, %k0
; KNL-NEXT: movb {{[0-9]+}}(%rsp), %al
; KNL-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; KNL-NEXT: kmovw %eax, %k6
; KNL-NEXT: kshiftlw $15, %k6, %k6
; KNL-NEXT: kshiftrw $8, %k6, %k6
; KNL-NEXT: korw %k6, %k0, %k0
; KNL-NEXT: kandw %k3, %k0, %k0
; KNL-NEXT: movb {{[0-9]+}}(%rsp), %al
; KNL-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; KNL-NEXT: kmovw %eax, %k6
; KNL-NEXT: kshiftlw $15, %k6, %k6
; KNL-NEXT: kshiftrw $7, %k6, %k6
; KNL-NEXT: korw %k6, %k0, %k0
; KNL-NEXT: kmovw {{[-0-9]+}}(%r{{[sb]}}p), %k3 ## 2-byte Reload
; KNL-NEXT: kandw %k3, %k0, %k0
; KNL-NEXT: movb {{[0-9]+}}(%rsp), %al
; KNL-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; KNL-NEXT: kmovw %eax, %k6
; KNL-NEXT: kshiftlw $15, %k6, %k6
; KNL-NEXT: kshiftrw $6, %k6, %k6
; KNL-NEXT: korw %k6, %k0, %k0
; KNL-NEXT: kandw %k4, %k0, %k0
; KNL-NEXT: movb {{[0-9]+}}(%rsp), %al
; KNL-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; KNL-NEXT: kmovw %eax, %k6
; KNL-NEXT: kshiftlw $15, %k6, %k6
; KNL-NEXT: kshiftrw $5, %k6, %k6
; KNL-NEXT: korw %k6, %k0, %k0
; KNL-NEXT: kandw %k5, %k0, %k0
; KNL-NEXT: movb {{[0-9]+}}(%rsp), %al
; KNL-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; KNL-NEXT: kmovw %eax, %k6
; KNL-NEXT: kshiftlw $15, %k6, %k6
; KNL-NEXT: kshiftrw $4, %k6, %k6
; KNL-NEXT: korw %k6, %k0, %k0
; KNL-NEXT: kmovw {{[-0-9]+}}(%r{{[sb]}}p), %k1 ## 2-byte Reload
; KNL-NEXT: kandw %k1, %k0, %k0
; KNL-NEXT: movb {{[0-9]+}}(%rsp), %al
; KNL-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; KNL-NEXT: kmovw %eax, %k6
; KNL-NEXT: kshiftlw $15, %k6, %k6
; KNL-NEXT: kshiftrw $3, %k6, %k6
; KNL-NEXT: korw %k6, %k0, %k0
; KNL-NEXT: kmovw {{[-0-9]+}}(%r{{[sb]}}p), %k2 ## 2-byte Reload
; KNL-NEXT: kandw %k2, %k0, %k0
; KNL-NEXT: movb {{[0-9]+}}(%rsp), %al
; KNL-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; KNL-NEXT: kmovw %eax, %k6
; KNL-NEXT: kshiftlw $15, %k6, %k6
; KNL-NEXT: kshiftrw $2, %k6, %k6
; KNL-NEXT: korw %k6, %k0, %k0
; KNL-NEXT: kmovw {{[-0-9]+}}(%r{{[sb]}}p), %k5 ## 2-byte Reload
; KNL-NEXT: kandw %k5, %k0, %k0
; KNL-NEXT: movb {{[0-9]+}}(%rsp), %al
; KNL-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; KNL-NEXT: kmovw %eax, %k6
; KNL-NEXT: kshiftlw $14, %k6, %k6
; KNL-NEXT: korw %k6, %k0, %k0
; KNL-NEXT: kshiftlw $1, %k0, %k0
; KNL-NEXT: kshiftrw $1, %k0, %k0
; KNL-NEXT: movb {{[0-9]+}}(%rsp), %al
; KNL-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; KNL-NEXT: kmovw %eax, %k6
; KNL-NEXT: kshiftlw $15, %k6, %k6
; KNL-NEXT: korw %k6, %k0, %k0
; KNL-NEXT: movb {{[0-9]+}}(%rsp), %al
; KNL-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; KNL-NEXT: andl $1, %eax
; KNL-NEXT: movb {{[0-9]+}}(%rsp), %cl
; KNL-NEXT: movzbl {{[0-9]+}}(%rsp), %ecx
; KNL-NEXT: kmovw %ecx, %k6
; KNL-NEXT: kshiftlw $15, %k6, %k6
; KNL-NEXT: kshiftrw $14, %k6, %k6
@ -3253,93 +3253,93 @@ define void @store_64i1(ptr %a, <64 x i1> %v) {
; KNL-NEXT: korw %k6, %k7, %k6
; KNL-NEXT: kmovw {{[-0-9]+}}(%r{{[sb]}}p), %k5 ## 2-byte Reload
; KNL-NEXT: kandw %k5, %k6, %k6
; KNL-NEXT: movb {{[0-9]+}}(%rsp), %al
; KNL-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; KNL-NEXT: kmovw %eax, %k7
; KNL-NEXT: kshiftlw $15, %k7, %k7
; KNL-NEXT: kshiftrw $13, %k7, %k7
; KNL-NEXT: korw %k7, %k6, %k6
; KNL-NEXT: kmovw {{[-0-9]+}}(%r{{[sb]}}p), %k5 ## 2-byte Reload
; KNL-NEXT: kandw %k5, %k6, %k6
; KNL-NEXT: movb {{[0-9]+}}(%rsp), %al
; KNL-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; KNL-NEXT: kmovw %eax, %k7
; KNL-NEXT: kshiftlw $15, %k7, %k7
; KNL-NEXT: kshiftrw $12, %k7, %k7
; KNL-NEXT: korw %k7, %k6, %k6
; KNL-NEXT: kmovw {{[-0-9]+}}(%r{{[sb]}}p), %k5 ## 2-byte Reload
; KNL-NEXT: kandw %k5, %k6, %k6
; KNL-NEXT: movb {{[0-9]+}}(%rsp), %al
; KNL-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; KNL-NEXT: kmovw %eax, %k7
; KNL-NEXT: kshiftlw $15, %k7, %k7
; KNL-NEXT: kshiftrw $11, %k7, %k7
; KNL-NEXT: korw %k7, %k6, %k6
; KNL-NEXT: kmovw {{[-0-9]+}}(%r{{[sb]}}p), %k5 ## 2-byte Reload
; KNL-NEXT: kandw %k5, %k6, %k6
; KNL-NEXT: movb {{[0-9]+}}(%rsp), %al
; KNL-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; KNL-NEXT: kmovw %eax, %k7
; KNL-NEXT: kshiftlw $15, %k7, %k7
; KNL-NEXT: kshiftrw $10, %k7, %k7
; KNL-NEXT: korw %k7, %k6, %k6
; KNL-NEXT: kmovw {{[-0-9]+}}(%r{{[sb]}}p), %k5 ## 2-byte Reload
; KNL-NEXT: kandw %k5, %k6, %k6
; KNL-NEXT: movb {{[0-9]+}}(%rsp), %al
; KNL-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; KNL-NEXT: kmovw %eax, %k7
; KNL-NEXT: kshiftlw $15, %k7, %k7
; KNL-NEXT: kshiftrw $9, %k7, %k7
; KNL-NEXT: korw %k7, %k6, %k6
; KNL-NEXT: kmovw {{[-0-9]+}}(%r{{[sb]}}p), %k5 ## 2-byte Reload
; KNL-NEXT: kandw %k5, %k6, %k6
; KNL-NEXT: movb {{[0-9]+}}(%rsp), %al
; KNL-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; KNL-NEXT: kmovw %eax, %k7
; KNL-NEXT: kshiftlw $15, %k7, %k7
; KNL-NEXT: kshiftrw $8, %k7, %k7
; KNL-NEXT: korw %k7, %k6, %k6
; KNL-NEXT: kmovw {{[-0-9]+}}(%r{{[sb]}}p), %k5 ## 2-byte Reload
; KNL-NEXT: kandw %k5, %k6, %k6
; KNL-NEXT: movb {{[0-9]+}}(%rsp), %al
; KNL-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; KNL-NEXT: kmovw %eax, %k7
; KNL-NEXT: kshiftlw $15, %k7, %k7
; KNL-NEXT: kshiftrw $7, %k7, %k7
; KNL-NEXT: korw %k7, %k6, %k6
; KNL-NEXT: kandw %k3, %k6, %k6
; KNL-NEXT: movb {{[0-9]+}}(%rsp), %al
; KNL-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; KNL-NEXT: kmovw %eax, %k7
; KNL-NEXT: kshiftlw $15, %k7, %k7
; KNL-NEXT: kshiftrw $6, %k7, %k7
; KNL-NEXT: korw %k7, %k6, %k6
; KNL-NEXT: kandw %k4, %k6, %k5
; KNL-NEXT: movb {{[0-9]+}}(%rsp), %al
; KNL-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; KNL-NEXT: kmovw %eax, %k6
; KNL-NEXT: kshiftlw $15, %k6, %k6
; KNL-NEXT: kshiftrw $5, %k6, %k6
; KNL-NEXT: korw %k6, %k5, %k5
; KNL-NEXT: kmovw {{[-0-9]+}}(%r{{[sb]}}p), %k3 ## 2-byte Reload
; KNL-NEXT: kandw %k3, %k5, %k4
; KNL-NEXT: movb {{[0-9]+}}(%rsp), %al
; KNL-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; KNL-NEXT: kmovw %eax, %k5
; KNL-NEXT: kshiftlw $15, %k5, %k5
; KNL-NEXT: kshiftrw $4, %k5, %k5
; KNL-NEXT: korw %k5, %k4, %k4
; KNL-NEXT: kandw %k1, %k4, %k3
; KNL-NEXT: movb {{[0-9]+}}(%rsp), %al
; KNL-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; KNL-NEXT: kmovw %eax, %k4
; KNL-NEXT: kshiftlw $15, %k4, %k4
; KNL-NEXT: kshiftrw $3, %k4, %k4
; KNL-NEXT: korw %k4, %k3, %k3
; KNL-NEXT: kandw %k2, %k3, %k2
; KNL-NEXT: movb {{[0-9]+}}(%rsp), %al
; KNL-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; KNL-NEXT: kmovw %eax, %k3
; KNL-NEXT: kshiftlw $15, %k3, %k3
; KNL-NEXT: kshiftrw $2, %k3, %k3
; KNL-NEXT: korw %k3, %k2, %k2
; KNL-NEXT: kmovw {{[-0-9]+}}(%r{{[sb]}}p), %k1 ## 2-byte Reload
; KNL-NEXT: kandw %k1, %k2, %k1
; KNL-NEXT: movb {{[0-9]+}}(%rsp), %al
; KNL-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; KNL-NEXT: kmovw %eax, %k2
; KNL-NEXT: kshiftlw $14, %k2, %k2
; KNL-NEXT: korw %k2, %k1, %k1
; KNL-NEXT: kshiftlw $1, %k1, %k1
; KNL-NEXT: kshiftrw $1, %k1, %k1
; KNL-NEXT: movb {{[0-9]+}}(%rsp), %al
; KNL-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; KNL-NEXT: kmovw %eax, %k2
; KNL-NEXT: kshiftlw $15, %k2, %k2
; KNL-NEXT: korw %k2, %k1, %k1
@ -3405,7 +3405,7 @@ define void @store_64i1(ptr %a, <64 x i1> %v) {
; AVX512DQ-NEXT: kandw %k1, %k0, %k0
; AVX512DQ-NEXT: kmovw %k1, %k2
; AVX512DQ-NEXT: kmovw %k1, {{[-0-9]+}}(%r{{[sb]}}p) ## 2-byte Spill
; AVX512DQ-NEXT: movb {{[0-9]+}}(%rsp), %al
; AVX512DQ-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; AVX512DQ-NEXT: kmovw %eax, %k1
; AVX512DQ-NEXT: kshiftlw $15, %k1, %k1
; AVX512DQ-NEXT: kshiftrw $10, %k1, %k1
@ -3414,7 +3414,7 @@ define void @store_64i1(ptr %a, <64 x i1> %v) {
; AVX512DQ-NEXT: kmovw %eax, %k1
; AVX512DQ-NEXT: kmovw %k1, {{[-0-9]+}}(%r{{[sb]}}p) ## 2-byte Spill
; AVX512DQ-NEXT: kandw %k1, %k0, %k0
; AVX512DQ-NEXT: movb {{[0-9]+}}(%rsp), %al
; AVX512DQ-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; AVX512DQ-NEXT: kmovw %eax, %k1
; AVX512DQ-NEXT: kshiftlw $15, %k1, %k1
; AVX512DQ-NEXT: kshiftrw $9, %k1, %k1
@ -3424,7 +3424,7 @@ define void @store_64i1(ptr %a, <64 x i1> %v) {
; AVX512DQ-NEXT: kandw %k1, %k0, %k0
; AVX512DQ-NEXT: kmovw %k1, %k3
; AVX512DQ-NEXT: kmovw %k1, {{[-0-9]+}}(%r{{[sb]}}p) ## 2-byte Spill
; AVX512DQ-NEXT: movb {{[0-9]+}}(%rsp), %al
; AVX512DQ-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; AVX512DQ-NEXT: kmovw %eax, %k1
; AVX512DQ-NEXT: kshiftlw $15, %k1, %k1
; AVX512DQ-NEXT: kshiftrw $8, %k1, %k1
@ -3433,7 +3433,7 @@ define void @store_64i1(ptr %a, <64 x i1> %v) {
; AVX512DQ-NEXT: kmovw %eax, %k1
; AVX512DQ-NEXT: kmovw %k1, {{[-0-9]+}}(%r{{[sb]}}p) ## 2-byte Spill
; AVX512DQ-NEXT: kandw %k1, %k0, %k0
; AVX512DQ-NEXT: movb {{[0-9]+}}(%rsp), %al
; AVX512DQ-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; AVX512DQ-NEXT: kmovw %eax, %k1
; AVX512DQ-NEXT: kshiftlw $15, %k1, %k1
; AVX512DQ-NEXT: kshiftrw $7, %k1, %k1
@ -3443,7 +3443,7 @@ define void @store_64i1(ptr %a, <64 x i1> %v) {
; AVX512DQ-NEXT: kandw %k1, %k0, %k0
; AVX512DQ-NEXT: kmovw %k1, %k4
; AVX512DQ-NEXT: kmovw %k1, {{[-0-9]+}}(%r{{[sb]}}p) ## 2-byte Spill
; AVX512DQ-NEXT: movb {{[0-9]+}}(%rsp), %al
; AVX512DQ-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; AVX512DQ-NEXT: kmovw %eax, %k1
; AVX512DQ-NEXT: kshiftlw $15, %k1, %k1
; AVX512DQ-NEXT: kshiftrw $6, %k1, %k1
@ -3452,7 +3452,7 @@ define void @store_64i1(ptr %a, <64 x i1> %v) {
; AVX512DQ-NEXT: kmovw %eax, %k1
; AVX512DQ-NEXT: kmovw %k1, {{[-0-9]+}}(%r{{[sb]}}p) ## 2-byte Spill
; AVX512DQ-NEXT: kandw %k1, %k0, %k0
; AVX512DQ-NEXT: movb {{[0-9]+}}(%rsp), %al
; AVX512DQ-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; AVX512DQ-NEXT: kmovw %eax, %k1
; AVX512DQ-NEXT: kshiftlw $15, %k1, %k1
; AVX512DQ-NEXT: kshiftrw $5, %k1, %k1
@ -3460,7 +3460,7 @@ define void @store_64i1(ptr %a, <64 x i1> %v) {
; AVX512DQ-NEXT: movw $-2049, %ax ## imm = 0xF7FF
; AVX512DQ-NEXT: kmovw %eax, %k5
; AVX512DQ-NEXT: kandw %k5, %k0, %k0
; AVX512DQ-NEXT: movb {{[0-9]+}}(%rsp), %al
; AVX512DQ-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; AVX512DQ-NEXT: kmovw %eax, %k1
; AVX512DQ-NEXT: kshiftlw $15, %k1, %k1
; AVX512DQ-NEXT: kshiftrw $4, %k1, %k1
@ -3469,7 +3469,7 @@ define void @store_64i1(ptr %a, <64 x i1> %v) {
; AVX512DQ-NEXT: kmovw %eax, %k1
; AVX512DQ-NEXT: kmovw %k1, {{[-0-9]+}}(%r{{[sb]}}p) ## 2-byte Spill
; AVX512DQ-NEXT: kandw %k1, %k0, %k0
; AVX512DQ-NEXT: movb {{[0-9]+}}(%rsp), %al
; AVX512DQ-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; AVX512DQ-NEXT: kmovw %eax, %k1
; AVX512DQ-NEXT: kshiftlw $15, %k1, %k1
; AVX512DQ-NEXT: kshiftrw $3, %k1, %k1
@ -3478,7 +3478,7 @@ define void @store_64i1(ptr %a, <64 x i1> %v) {
; AVX512DQ-NEXT: kmovw %eax, %k1
; AVX512DQ-NEXT: kmovw %k1, {{[-0-9]+}}(%r{{[sb]}}p) ## 2-byte Spill
; AVX512DQ-NEXT: kandw %k1, %k0, %k0
; AVX512DQ-NEXT: movb {{[0-9]+}}(%rsp), %al
; AVX512DQ-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; AVX512DQ-NEXT: kmovw %eax, %k1
; AVX512DQ-NEXT: kshiftlw $15, %k1, %k1
; AVX512DQ-NEXT: kshiftrw $2, %k1, %k1
@ -3487,121 +3487,121 @@ define void @store_64i1(ptr %a, <64 x i1> %v) {
; AVX512DQ-NEXT: kmovw %eax, %k1
; AVX512DQ-NEXT: kmovw %k1, {{[-0-9]+}}(%r{{[sb]}}p) ## 2-byte Spill
; AVX512DQ-NEXT: kandw %k1, %k0, %k0
; AVX512DQ-NEXT: movb {{[0-9]+}}(%rsp), %al
; AVX512DQ-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; AVX512DQ-NEXT: kmovw %eax, %k6
; AVX512DQ-NEXT: kshiftlw $14, %k6, %k6
; AVX512DQ-NEXT: korw %k6, %k0, %k0
; AVX512DQ-NEXT: kshiftlw $1, %k0, %k0
; AVX512DQ-NEXT: kshiftrw $1, %k0, %k0
; AVX512DQ-NEXT: movb {{[0-9]+}}(%rsp), %al
; AVX512DQ-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; AVX512DQ-NEXT: kmovw %eax, %k6
; AVX512DQ-NEXT: kshiftlw $15, %k6, %k6
; AVX512DQ-NEXT: korw %k6, %k0, %k0
; AVX512DQ-NEXT: kmovw %k0, {{[-0-9]+}}(%r{{[sb]}}p) ## 2-byte Spill
; AVX512DQ-NEXT: movb {{[0-9]+}}(%rsp), %al
; AVX512DQ-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; AVX512DQ-NEXT: andl $1, %eax
; AVX512DQ-NEXT: movb {{[0-9]+}}(%rsp), %cl
; AVX512DQ-NEXT: movzbl {{[0-9]+}}(%rsp), %ecx
; AVX512DQ-NEXT: kmovw %ecx, %k0
; AVX512DQ-NEXT: kshiftlw $15, %k0, %k0
; AVX512DQ-NEXT: kshiftrw $14, %k0, %k0
; AVX512DQ-NEXT: kmovw %eax, %k6
; AVX512DQ-NEXT: korw %k0, %k6, %k0
; AVX512DQ-NEXT: kandw %k7, %k0, %k0
; AVX512DQ-NEXT: movb {{[0-9]+}}(%rsp), %al
; AVX512DQ-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; AVX512DQ-NEXT: kmovw %eax, %k6
; AVX512DQ-NEXT: kshiftlw $15, %k6, %k6
; AVX512DQ-NEXT: kshiftrw $13, %k6, %k6
; AVX512DQ-NEXT: korw %k6, %k0, %k0
; AVX512DQ-NEXT: kmovw {{[-0-9]+}}(%r{{[sb]}}p), %k7 ## 2-byte Reload
; AVX512DQ-NEXT: kandw %k7, %k0, %k0
; AVX512DQ-NEXT: movb {{[0-9]+}}(%rsp), %al
; AVX512DQ-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; AVX512DQ-NEXT: kmovw %eax, %k6
; AVX512DQ-NEXT: kshiftlw $15, %k6, %k6
; AVX512DQ-NEXT: kshiftrw $12, %k6, %k6
; AVX512DQ-NEXT: korw %k6, %k0, %k0
; AVX512DQ-NEXT: kmovw {{[-0-9]+}}(%r{{[sb]}}p), %k1 ## 2-byte Reload
; AVX512DQ-NEXT: kandw %k1, %k0, %k0
; AVX512DQ-NEXT: movb {{[0-9]+}}(%rsp), %al
; AVX512DQ-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; AVX512DQ-NEXT: kmovw %eax, %k6
; AVX512DQ-NEXT: kshiftlw $15, %k6, %k6
; AVX512DQ-NEXT: kshiftrw $11, %k6, %k6
; AVX512DQ-NEXT: korw %k6, %k0, %k0
; AVX512DQ-NEXT: kandw %k2, %k0, %k0
; AVX512DQ-NEXT: movb {{[0-9]+}}(%rsp), %al
; AVX512DQ-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; AVX512DQ-NEXT: kmovw %eax, %k6
; AVX512DQ-NEXT: kshiftlw $15, %k6, %k6
; AVX512DQ-NEXT: kshiftrw $10, %k6, %k6
; AVX512DQ-NEXT: korw %k6, %k0, %k0
; AVX512DQ-NEXT: kmovw {{[-0-9]+}}(%r{{[sb]}}p), %k2 ## 2-byte Reload
; AVX512DQ-NEXT: kandw %k2, %k0, %k0
; AVX512DQ-NEXT: movb {{[0-9]+}}(%rsp), %al
; AVX512DQ-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; AVX512DQ-NEXT: kmovw %eax, %k6
; AVX512DQ-NEXT: kshiftlw $15, %k6, %k6
; AVX512DQ-NEXT: kshiftrw $9, %k6, %k6
; AVX512DQ-NEXT: korw %k6, %k0, %k0
; AVX512DQ-NEXT: kandw %k3, %k0, %k0
; AVX512DQ-NEXT: movb {{[0-9]+}}(%rsp), %al
; AVX512DQ-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; AVX512DQ-NEXT: kmovw %eax, %k6
; AVX512DQ-NEXT: kshiftlw $15, %k6, %k6
; AVX512DQ-NEXT: kshiftrw $8, %k6, %k6
; AVX512DQ-NEXT: korw %k6, %k0, %k0
; AVX512DQ-NEXT: kmovw {{[-0-9]+}}(%r{{[sb]}}p), %k3 ## 2-byte Reload
; AVX512DQ-NEXT: kandw %k3, %k0, %k0
; AVX512DQ-NEXT: movb {{[0-9]+}}(%rsp), %al
; AVX512DQ-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; AVX512DQ-NEXT: kmovw %eax, %k6
; AVX512DQ-NEXT: kshiftlw $15, %k6, %k6
; AVX512DQ-NEXT: kshiftrw $7, %k6, %k6
; AVX512DQ-NEXT: korw %k6, %k0, %k0
; AVX512DQ-NEXT: kandw %k4, %k0, %k0
; AVX512DQ-NEXT: movb {{[0-9]+}}(%rsp), %al
; AVX512DQ-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; AVX512DQ-NEXT: kmovw %eax, %k6
; AVX512DQ-NEXT: kshiftlw $15, %k6, %k6
; AVX512DQ-NEXT: kshiftrw $6, %k6, %k6
; AVX512DQ-NEXT: korw %k6, %k0, %k0
; AVX512DQ-NEXT: kmovw {{[-0-9]+}}(%r{{[sb]}}p), %k4 ## 2-byte Reload
; AVX512DQ-NEXT: kandw %k4, %k0, %k0
; AVX512DQ-NEXT: movb {{[0-9]+}}(%rsp), %al
; AVX512DQ-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; AVX512DQ-NEXT: kmovw %eax, %k6
; AVX512DQ-NEXT: kshiftlw $15, %k6, %k6
; AVX512DQ-NEXT: kshiftrw $5, %k6, %k6
; AVX512DQ-NEXT: korw %k6, %k0, %k0
; AVX512DQ-NEXT: kmovw %k5, {{[-0-9]+}}(%r{{[sb]}}p) ## 2-byte Spill
; AVX512DQ-NEXT: kandw %k5, %k0, %k0
; AVX512DQ-NEXT: movb {{[0-9]+}}(%rsp), %al
; AVX512DQ-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; AVX512DQ-NEXT: kmovw %eax, %k6
; AVX512DQ-NEXT: kshiftlw $15, %k6, %k6
; AVX512DQ-NEXT: kshiftrw $4, %k6, %k6
; AVX512DQ-NEXT: korw %k6, %k0, %k0
; AVX512DQ-NEXT: kmovw {{[-0-9]+}}(%r{{[sb]}}p), %k6 ## 2-byte Reload
; AVX512DQ-NEXT: kandw %k6, %k0, %k0
; AVX512DQ-NEXT: movb {{[0-9]+}}(%rsp), %al
; AVX512DQ-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; AVX512DQ-NEXT: kmovw %eax, %k6
; AVX512DQ-NEXT: kshiftlw $15, %k6, %k6
; AVX512DQ-NEXT: kshiftrw $3, %k6, %k6
; AVX512DQ-NEXT: korw %k6, %k0, %k0
; AVX512DQ-NEXT: kmovw {{[-0-9]+}}(%r{{[sb]}}p), %k6 ## 2-byte Reload
; AVX512DQ-NEXT: kandw %k6, %k0, %k0
; AVX512DQ-NEXT: movb {{[0-9]+}}(%rsp), %al
; AVX512DQ-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; AVX512DQ-NEXT: kmovw %eax, %k6
; AVX512DQ-NEXT: kshiftlw $15, %k6, %k6
; AVX512DQ-NEXT: kshiftrw $2, %k6, %k6
; AVX512DQ-NEXT: korw %k6, %k0, %k0
; AVX512DQ-NEXT: kmovw {{[-0-9]+}}(%r{{[sb]}}p), %k6 ## 2-byte Reload
; AVX512DQ-NEXT: kandw %k6, %k0, %k0
; AVX512DQ-NEXT: movb {{[0-9]+}}(%rsp), %al
; AVX512DQ-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; AVX512DQ-NEXT: kmovw %eax, %k6
; AVX512DQ-NEXT: kshiftlw $14, %k6, %k6
; AVX512DQ-NEXT: korw %k6, %k0, %k0
; AVX512DQ-NEXT: kshiftlw $1, %k0, %k0
; AVX512DQ-NEXT: kshiftrw $1, %k0, %k0
; AVX512DQ-NEXT: movb {{[0-9]+}}(%rsp), %al
; AVX512DQ-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; AVX512DQ-NEXT: kmovw %eax, %k6
; AVX512DQ-NEXT: kshiftlw $15, %k6, %k6
; AVX512DQ-NEXT: korw %k6, %k0, %k0
; AVX512DQ-NEXT: kmovw %k0, {{[-0-9]+}}(%r{{[sb]}}p) ## 2-byte Spill
; AVX512DQ-NEXT: movb {{[0-9]+}}(%rsp), %al
; AVX512DQ-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; AVX512DQ-NEXT: andl $1, %eax
; AVX512DQ-NEXT: movb {{[0-9]+}}(%rsp), %cl
; AVX512DQ-NEXT: movzbl {{[0-9]+}}(%rsp), %ecx
; AVX512DQ-NEXT: kmovw %ecx, %k0
; AVX512DQ-NEXT: kshiftlw $15, %k0, %k0
; AVX512DQ-NEXT: kshiftrw $14, %k0, %k0
@ -3609,97 +3609,97 @@ define void @store_64i1(ptr %a, <64 x i1> %v) {
; AVX512DQ-NEXT: korw %k0, %k6, %k0
; AVX512DQ-NEXT: kmovw {{[-0-9]+}}(%r{{[sb]}}p), %k6 ## 2-byte Reload
; AVX512DQ-NEXT: kandw %k6, %k0, %k0
; AVX512DQ-NEXT: movb {{[0-9]+}}(%rsp), %al
; AVX512DQ-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; AVX512DQ-NEXT: kmovw %eax, %k6
; AVX512DQ-NEXT: kshiftlw $15, %k6, %k6
; AVX512DQ-NEXT: kshiftrw $13, %k6, %k6
; AVX512DQ-NEXT: korw %k6, %k0, %k0
; AVX512DQ-NEXT: kandw %k7, %k0, %k0
; AVX512DQ-NEXT: movb {{[0-9]+}}(%rsp), %al
; AVX512DQ-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; AVX512DQ-NEXT: kmovw %eax, %k6
; AVX512DQ-NEXT: kshiftlw $15, %k6, %k6
; AVX512DQ-NEXT: kshiftrw $12, %k6, %k6
; AVX512DQ-NEXT: korw %k6, %k0, %k0
; AVX512DQ-NEXT: kandw %k1, %k0, %k0
; AVX512DQ-NEXT: movb {{[0-9]+}}(%rsp), %al
; AVX512DQ-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; AVX512DQ-NEXT: kmovw %eax, %k6
; AVX512DQ-NEXT: kshiftlw $15, %k6, %k6
; AVX512DQ-NEXT: kshiftrw $11, %k6, %k6
; AVX512DQ-NEXT: korw %k6, %k0, %k0
; AVX512DQ-NEXT: kmovw {{[-0-9]+}}(%r{{[sb]}}p), %k1 ## 2-byte Reload
; AVX512DQ-NEXT: kandw %k1, %k0, %k0
; AVX512DQ-NEXT: movb {{[0-9]+}}(%rsp), %al
; AVX512DQ-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; AVX512DQ-NEXT: kmovw %eax, %k6
; AVX512DQ-NEXT: kshiftlw $15, %k6, %k6
; AVX512DQ-NEXT: kshiftrw $10, %k6, %k6
; AVX512DQ-NEXT: korw %k6, %k0, %k0
; AVX512DQ-NEXT: kandw %k2, %k0, %k0
; AVX512DQ-NEXT: movb {{[0-9]+}}(%rsp), %al
; AVX512DQ-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; AVX512DQ-NEXT: kmovw %eax, %k6
; AVX512DQ-NEXT: kshiftlw $15, %k6, %k6
; AVX512DQ-NEXT: kshiftrw $9, %k6, %k6
; AVX512DQ-NEXT: korw %k6, %k0, %k0
; AVX512DQ-NEXT: kmovw {{[-0-9]+}}(%r{{[sb]}}p), %k1 ## 2-byte Reload
; AVX512DQ-NEXT: kandw %k1, %k0, %k0
; AVX512DQ-NEXT: movb {{[0-9]+}}(%rsp), %al
; AVX512DQ-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; AVX512DQ-NEXT: kmovw %eax, %k6
; AVX512DQ-NEXT: kshiftlw $15, %k6, %k6
; AVX512DQ-NEXT: kshiftrw $8, %k6, %k6
; AVX512DQ-NEXT: korw %k6, %k0, %k0
; AVX512DQ-NEXT: kandw %k3, %k0, %k0
; AVX512DQ-NEXT: movb {{[0-9]+}}(%rsp), %al
; AVX512DQ-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; AVX512DQ-NEXT: kmovw %eax, %k6
; AVX512DQ-NEXT: kshiftlw $15, %k6, %k6
; AVX512DQ-NEXT: kshiftrw $7, %k6, %k6
; AVX512DQ-NEXT: korw %k6, %k0, %k0
; AVX512DQ-NEXT: kmovw {{[-0-9]+}}(%r{{[sb]}}p), %k3 ## 2-byte Reload
; AVX512DQ-NEXT: kandw %k3, %k0, %k0
; AVX512DQ-NEXT: movb {{[0-9]+}}(%rsp), %al
; AVX512DQ-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; AVX512DQ-NEXT: kmovw %eax, %k6
; AVX512DQ-NEXT: kshiftlw $15, %k6, %k6
; AVX512DQ-NEXT: kshiftrw $6, %k6, %k6
; AVX512DQ-NEXT: korw %k6, %k0, %k0
; AVX512DQ-NEXT: kandw %k4, %k0, %k0
; AVX512DQ-NEXT: movb {{[0-9]+}}(%rsp), %al
; AVX512DQ-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; AVX512DQ-NEXT: kmovw %eax, %k6
; AVX512DQ-NEXT: kshiftlw $15, %k6, %k6
; AVX512DQ-NEXT: kshiftrw $5, %k6, %k6
; AVX512DQ-NEXT: korw %k6, %k0, %k0
; AVX512DQ-NEXT: kandw %k5, %k0, %k0
; AVX512DQ-NEXT: movb {{[0-9]+}}(%rsp), %al
; AVX512DQ-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; AVX512DQ-NEXT: kmovw %eax, %k6
; AVX512DQ-NEXT: kshiftlw $15, %k6, %k6
; AVX512DQ-NEXT: kshiftrw $4, %k6, %k6
; AVX512DQ-NEXT: korw %k6, %k0, %k0
; AVX512DQ-NEXT: kmovw {{[-0-9]+}}(%r{{[sb]}}p), %k1 ## 2-byte Reload
; AVX512DQ-NEXT: kandw %k1, %k0, %k0
; AVX512DQ-NEXT: movb {{[0-9]+}}(%rsp), %al
; AVX512DQ-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; AVX512DQ-NEXT: kmovw %eax, %k6
; AVX512DQ-NEXT: kshiftlw $15, %k6, %k6
; AVX512DQ-NEXT: kshiftrw $3, %k6, %k6
; AVX512DQ-NEXT: korw %k6, %k0, %k0
; AVX512DQ-NEXT: kmovw {{[-0-9]+}}(%r{{[sb]}}p), %k2 ## 2-byte Reload
; AVX512DQ-NEXT: kandw %k2, %k0, %k0
; AVX512DQ-NEXT: movb {{[0-9]+}}(%rsp), %al
; AVX512DQ-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; AVX512DQ-NEXT: kmovw %eax, %k6
; AVX512DQ-NEXT: kshiftlw $15, %k6, %k6
; AVX512DQ-NEXT: kshiftrw $2, %k6, %k6
; AVX512DQ-NEXT: korw %k6, %k0, %k0
; AVX512DQ-NEXT: kmovw {{[-0-9]+}}(%r{{[sb]}}p), %k5 ## 2-byte Reload
; AVX512DQ-NEXT: kandw %k5, %k0, %k0
; AVX512DQ-NEXT: movb {{[0-9]+}}(%rsp), %al
; AVX512DQ-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; AVX512DQ-NEXT: kmovw %eax, %k6
; AVX512DQ-NEXT: kshiftlw $14, %k6, %k6
; AVX512DQ-NEXT: korw %k6, %k0, %k0
; AVX512DQ-NEXT: kshiftlw $1, %k0, %k0
; AVX512DQ-NEXT: kshiftrw $1, %k0, %k0
; AVX512DQ-NEXT: movb {{[0-9]+}}(%rsp), %al
; AVX512DQ-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; AVX512DQ-NEXT: kmovw %eax, %k6
; AVX512DQ-NEXT: kshiftlw $15, %k6, %k6
; AVX512DQ-NEXT: korw %k6, %k0, %k0
; AVX512DQ-NEXT: movb {{[0-9]+}}(%rsp), %al
; AVX512DQ-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; AVX512DQ-NEXT: andl $1, %eax
; AVX512DQ-NEXT: movb {{[0-9]+}}(%rsp), %cl
; AVX512DQ-NEXT: movzbl {{[0-9]+}}(%rsp), %ecx
; AVX512DQ-NEXT: kmovw %ecx, %k6
; AVX512DQ-NEXT: kshiftlw $15, %k6, %k6
; AVX512DQ-NEXT: kshiftrw $14, %k6, %k6
@ -3707,93 +3707,93 @@ define void @store_64i1(ptr %a, <64 x i1> %v) {
; AVX512DQ-NEXT: korw %k6, %k7, %k6
; AVX512DQ-NEXT: kmovw {{[-0-9]+}}(%r{{[sb]}}p), %k5 ## 2-byte Reload
; AVX512DQ-NEXT: kandw %k5, %k6, %k6
; AVX512DQ-NEXT: movb {{[0-9]+}}(%rsp), %al
; AVX512DQ-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; AVX512DQ-NEXT: kmovw %eax, %k7
; AVX512DQ-NEXT: kshiftlw $15, %k7, %k7
; AVX512DQ-NEXT: kshiftrw $13, %k7, %k7
; AVX512DQ-NEXT: korw %k7, %k6, %k6
; AVX512DQ-NEXT: kmovw {{[-0-9]+}}(%r{{[sb]}}p), %k5 ## 2-byte Reload
; AVX512DQ-NEXT: kandw %k5, %k6, %k6
; AVX512DQ-NEXT: movb {{[0-9]+}}(%rsp), %al
; AVX512DQ-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; AVX512DQ-NEXT: kmovw %eax, %k7
; AVX512DQ-NEXT: kshiftlw $15, %k7, %k7
; AVX512DQ-NEXT: kshiftrw $12, %k7, %k7
; AVX512DQ-NEXT: korw %k7, %k6, %k6
; AVX512DQ-NEXT: kmovw {{[-0-9]+}}(%r{{[sb]}}p), %k5 ## 2-byte Reload
; AVX512DQ-NEXT: kandw %k5, %k6, %k6
; AVX512DQ-NEXT: movb {{[0-9]+}}(%rsp), %al
; AVX512DQ-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; AVX512DQ-NEXT: kmovw %eax, %k7
; AVX512DQ-NEXT: kshiftlw $15, %k7, %k7
; AVX512DQ-NEXT: kshiftrw $11, %k7, %k7
; AVX512DQ-NEXT: korw %k7, %k6, %k6
; AVX512DQ-NEXT: kmovw {{[-0-9]+}}(%r{{[sb]}}p), %k5 ## 2-byte Reload
; AVX512DQ-NEXT: kandw %k5, %k6, %k6
; AVX512DQ-NEXT: movb {{[0-9]+}}(%rsp), %al
; AVX512DQ-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; AVX512DQ-NEXT: kmovw %eax, %k7
; AVX512DQ-NEXT: kshiftlw $15, %k7, %k7
; AVX512DQ-NEXT: kshiftrw $10, %k7, %k7
; AVX512DQ-NEXT: korw %k7, %k6, %k6
; AVX512DQ-NEXT: kmovw {{[-0-9]+}}(%r{{[sb]}}p), %k5 ## 2-byte Reload
; AVX512DQ-NEXT: kandw %k5, %k6, %k6
; AVX512DQ-NEXT: movb {{[0-9]+}}(%rsp), %al
; AVX512DQ-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; AVX512DQ-NEXT: kmovw %eax, %k7
; AVX512DQ-NEXT: kshiftlw $15, %k7, %k7
; AVX512DQ-NEXT: kshiftrw $9, %k7, %k7
; AVX512DQ-NEXT: korw %k7, %k6, %k6
; AVX512DQ-NEXT: kmovw {{[-0-9]+}}(%r{{[sb]}}p), %k5 ## 2-byte Reload
; AVX512DQ-NEXT: kandw %k5, %k6, %k6
; AVX512DQ-NEXT: movb {{[0-9]+}}(%rsp), %al
; AVX512DQ-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; AVX512DQ-NEXT: kmovw %eax, %k7
; AVX512DQ-NEXT: kshiftlw $15, %k7, %k7
; AVX512DQ-NEXT: kshiftrw $8, %k7, %k7
; AVX512DQ-NEXT: korw %k7, %k6, %k6
; AVX512DQ-NEXT: kmovw {{[-0-9]+}}(%r{{[sb]}}p), %k5 ## 2-byte Reload
; AVX512DQ-NEXT: kandw %k5, %k6, %k6
; AVX512DQ-NEXT: movb {{[0-9]+}}(%rsp), %al
; AVX512DQ-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; AVX512DQ-NEXT: kmovw %eax, %k7
; AVX512DQ-NEXT: kshiftlw $15, %k7, %k7
; AVX512DQ-NEXT: kshiftrw $7, %k7, %k7
; AVX512DQ-NEXT: korw %k7, %k6, %k6
; AVX512DQ-NEXT: kandw %k3, %k6, %k6
; AVX512DQ-NEXT: movb {{[0-9]+}}(%rsp), %al
; AVX512DQ-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; AVX512DQ-NEXT: kmovw %eax, %k7
; AVX512DQ-NEXT: kshiftlw $15, %k7, %k7
; AVX512DQ-NEXT: kshiftrw $6, %k7, %k7
; AVX512DQ-NEXT: korw %k7, %k6, %k6
; AVX512DQ-NEXT: kandw %k4, %k6, %k5
; AVX512DQ-NEXT: movb {{[0-9]+}}(%rsp), %al
; AVX512DQ-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; AVX512DQ-NEXT: kmovw %eax, %k6
; AVX512DQ-NEXT: kshiftlw $15, %k6, %k6
; AVX512DQ-NEXT: kshiftrw $5, %k6, %k6
; AVX512DQ-NEXT: korw %k6, %k5, %k5
; AVX512DQ-NEXT: kmovw {{[-0-9]+}}(%r{{[sb]}}p), %k3 ## 2-byte Reload
; AVX512DQ-NEXT: kandw %k3, %k5, %k4
; AVX512DQ-NEXT: movb {{[0-9]+}}(%rsp), %al
; AVX512DQ-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; AVX512DQ-NEXT: kmovw %eax, %k5
; AVX512DQ-NEXT: kshiftlw $15, %k5, %k5
; AVX512DQ-NEXT: kshiftrw $4, %k5, %k5
; AVX512DQ-NEXT: korw %k5, %k4, %k4
; AVX512DQ-NEXT: kandw %k1, %k4, %k3
; AVX512DQ-NEXT: movb {{[0-9]+}}(%rsp), %al
; AVX512DQ-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; AVX512DQ-NEXT: kmovw %eax, %k4
; AVX512DQ-NEXT: kshiftlw $15, %k4, %k4
; AVX512DQ-NEXT: kshiftrw $3, %k4, %k4
; AVX512DQ-NEXT: korw %k4, %k3, %k3
; AVX512DQ-NEXT: kandw %k2, %k3, %k2
; AVX512DQ-NEXT: movb {{[0-9]+}}(%rsp), %al
; AVX512DQ-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; AVX512DQ-NEXT: kmovw %eax, %k3
; AVX512DQ-NEXT: kshiftlw $15, %k3, %k3
; AVX512DQ-NEXT: kshiftrw $2, %k3, %k3
; AVX512DQ-NEXT: korw %k3, %k2, %k2
; AVX512DQ-NEXT: kmovw {{[-0-9]+}}(%r{{[sb]}}p), %k1 ## 2-byte Reload
; AVX512DQ-NEXT: kandw %k1, %k2, %k1
; AVX512DQ-NEXT: movb {{[0-9]+}}(%rsp), %al
; AVX512DQ-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; AVX512DQ-NEXT: kmovw %eax, %k2
; AVX512DQ-NEXT: kshiftlw $14, %k2, %k2
; AVX512DQ-NEXT: korw %k2, %k1, %k1
; AVX512DQ-NEXT: kshiftlw $1, %k1, %k1
; AVX512DQ-NEXT: kshiftrw $1, %k1, %k1
; AVX512DQ-NEXT: movb {{[0-9]+}}(%rsp), %al
; AVX512DQ-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; AVX512DQ-NEXT: kmovw %eax, %k2
; AVX512DQ-NEXT: kshiftlw $15, %k2, %k2
; AVX512DQ-NEXT: korw %k2, %k1, %k1
@ -3960,7 +3960,7 @@ define i8 @test_v8i1_add(i8 %x, i8 %y) {
;
; X86-LABEL: test_v8i1_add:
; X86: ## %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: xorb {{[0-9]+}}(%esp), %al
; X86-NEXT: retl
%m0 = bitcast i8 %x to <8 x i1>
@ -3980,7 +3980,7 @@ define i8 @test_v8i1_sub(i8 %x, i8 %y) {
;
; X86-LABEL: test_v8i1_sub:
; X86: ## %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: xorb {{[0-9]+}}(%esp), %al
; X86-NEXT: retl
%m0 = bitcast i8 %x to <8 x i1>
@ -4000,7 +4000,7 @@ define i8 @test_v8i1_mul(i8 %x, i8 %y) {
;
; X86-LABEL: test_v8i1_mul:
; X86: ## %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: andb {{[0-9]+}}(%esp), %al
; X86-NEXT: retl
%m0 = bitcast i8 %x to <8 x i1>
@ -5132,7 +5132,7 @@ define i1 @test_v1i1_add(i1 %x, i1 %y) {
;
; X86-LABEL: test_v1i1_add:
; X86: ## %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: xorb {{[0-9]+}}(%esp), %al
; X86-NEXT: retl
%m0 = bitcast i1 %x to <1 x i1>
@ -5152,7 +5152,7 @@ define i1 @test_v1i1_sub(i1 %x, i1 %y) {
;
; X86-LABEL: test_v1i1_sub:
; X86: ## %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: xorb {{[0-9]+}}(%esp), %al
; X86-NEXT: retl
%m0 = bitcast i1 %x to <1 x i1>
@ -5172,7 +5172,7 @@ define i1 @test_v1i1_mul(i1 %x, i1 %y) {
;
; X86-LABEL: test_v1i1_mul:
; X86: ## %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: andb {{[0-9]+}}(%esp), %al
; X86-NEXT: retl
%m0 = bitcast i1 %x to <1 x i1>

4
llvm/test/CodeGen/X86/avx512-select.ll
View File

@ -131,7 +131,7 @@ define <16 x double> @select04(<16 x double> %a, <16 x double> %b) {
define i8 @select05(i8 %a.0, i8 %m) {
; X86-LABEL: select05:
; X86: # %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: orb {{[0-9]+}}(%esp), %al
; X86-NEXT: retl
;
@ -206,7 +206,7 @@ define i8 @select05_mem(ptr %a.0, ptr %m) {
define i8 @select06(i8 %a.0, i8 %m) {
; X86-LABEL: select06:
; X86: # %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: andb {{[0-9]+}}(%esp), %al
; X86-NEXT: retl
;

4
llvm/test/CodeGen/X86/avx512bf16-vl-intrinsics.ll
View File

@ -321,7 +321,7 @@ entry:
define <4 x float> @test_mm128_maskz_dpbf16ps_128(<4 x float> %E, <4 x i32> %A, <4 x i32> %B, i4 zeroext %U) local_unnamed_addr #2 {
; X86-LABEL: test_mm128_maskz_dpbf16ps_128:
; X86: # %bb.0: # %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al # encoding: [0x8a,0x44,0x24,0x04]
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax # encoding: [0x0f,0xb6,0x44,0x24,0x04]
; X86-NEXT: kmovd %eax, %k1 # encoding: [0xc5,0xfb,0x92,0xc8]
; X86-NEXT: vdpbf16ps %xmm2, %xmm1, %xmm0 {%k1} {z} # encoding: [0x62,0xf2,0x76,0x89,0x52,0xc2]
; X86-NEXT: retl # encoding: [0xc3]
@ -340,7 +340,7 @@ entry:
define <4 x float> @test_mm128_mask_dpbf16ps_128(i4 zeroext %U, <4 x float> %E, <4 x i32> %A, <4 x i32> %B) local_unnamed_addr #2 {
; X86-LABEL: test_mm128_mask_dpbf16ps_128:
; X86: # %bb.0: # %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al # encoding: [0x8a,0x44,0x24,0x04]
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax # encoding: [0x0f,0xb6,0x44,0x24,0x04]
; X86-NEXT: kmovd %eax, %k1 # encoding: [0xc5,0xfb,0x92,0xc8]
; X86-NEXT: vdpbf16ps %xmm2, %xmm1, %xmm0 {%k1} # encoding: [0x62,0xf2,0x76,0x09,0x52,0xc2]
; X86-NEXT: retl # encoding: [0xc3]

4
llvm/test/CodeGen/X86/avx512bw-intrinsics-fast-isel.ll
View File

@ -111,7 +111,7 @@ define <8 x i64> @test_mm512_mask_set1_epi8(<8 x i64> %__O, i64 %__M, i8 signext
; X86: # %bb.0: # %entry
; X86-NEXT: kmovd {{[0-9]+}}(%esp), %k0
; X86-NEXT: kmovd {{[0-9]+}}(%esp), %k1
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: kunpckdq %k1, %k0, %k1
; X86-NEXT: vpbroadcastb %eax, %zmm0 {%k1}
; X86-NEXT: retl
@ -136,7 +136,7 @@ define <8 x i64> @test_mm512_maskz_set1_epi8(i64 %__M, i8 signext %__A) {
; X86: # %bb.0: # %entry
; X86-NEXT: kmovd {{[0-9]+}}(%esp), %k0
; X86-NEXT: kmovd {{[0-9]+}}(%esp), %k1
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: kunpckdq %k1, %k0, %k1
; X86-NEXT: vpbroadcastb %eax, %zmm0 {%k1} {z}
; X86-NEXT: retl

26
llvm/test/CodeGen/X86/avx512bwvl-intrinsics-fast-isel.ll
View File

@ -104,7 +104,7 @@ entry:
define zeroext i8 @test_mm_mask_test_epi16_mask(i8 zeroext %__U, <2 x i64> %__A, <2 x i64> %__B) {
; X86-LABEL: test_mm_mask_test_epi16_mask:
; X86: # %bb.0: # %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: kmovd %eax, %k1
; X86-NEXT: vptestmw %xmm0, %xmm1, %k0 {%k1}
; X86-NEXT: kmovd %k0, %eax
@ -272,7 +272,7 @@ entry:
define zeroext i8 @test_mm_mask_testn_epi16_mask(i8 zeroext %__U, <2 x i64> %__A, <2 x i64> %__B) {
; X86-LABEL: test_mm_mask_testn_epi16_mask:
; X86: # %bb.0: # %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: kmovd %eax, %k1
; X86-NEXT: vptestnmw %xmm0, %xmm1, %k0 {%k1}
; X86-NEXT: kmovd %k0, %eax
@ -343,7 +343,7 @@ entry:
define <2 x i64> @test_mm_mask_set1_epi8(<2 x i64> %__O, i16 zeroext %__M, i8 signext %__A) local_unnamed_addr #0 {
; X86-LABEL: test_mm_mask_set1_epi8:
; X86: # %bb.0: # %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1
; X86-NEXT: vpbroadcastb %eax, %xmm0 {%k1}
; X86-NEXT: retl
@ -366,7 +366,7 @@ entry:
define <2 x i64> @test_mm_maskz_set1_epi8(i16 zeroext %__M, i8 signext %__A) {
; X86-LABEL: test_mm_maskz_set1_epi8:
; X86: # %bb.0: # %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1
; X86-NEXT: vpbroadcastb %eax, %xmm0 {%k1} {z}
; X86-NEXT: retl
@ -388,7 +388,7 @@ entry:
define <4 x i64> @test_mm256_mask_set1_epi8(<4 x i64> %__O, i32 %__M, i8 signext %__A){
; X86-LABEL: test_mm256_mask_set1_epi8:
; X86: # %bb.0: # %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: kmovd {{[0-9]+}}(%esp), %k1
; X86-NEXT: vpbroadcastb %eax, %ymm0 {%k1}
; X86-NEXT: retl
@ -411,7 +411,7 @@ entry:
define <4 x i64> @test_mm256_maskz_set1_epi8(i32 %__M, i8 signext %__A) {
; X86-LABEL: test_mm256_maskz_set1_epi8:
; X86: # %bb.0: # %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: kmovd {{[0-9]+}}(%esp), %k1
; X86-NEXT: vpbroadcastb %eax, %ymm0 {%k1} {z}
; X86-NEXT: retl
@ -479,7 +479,7 @@ define <2 x i64> @test_mm_mask_set1_epi16(<2 x i64> %__O, i8 zeroext %__M, i16 s
; X86-LABEL: test_mm_mask_set1_epi16:
; X86: # %bb.0: # %entry
; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: kmovd %ecx, %k1
; X86-NEXT: vpbroadcastw %eax, %xmm0 {%k1}
; X86-NEXT: retl
@ -503,7 +503,7 @@ define <2 x i64> @test_mm_maskz_set1_epi16(i8 zeroext %__M, i16 signext %__A) {
; X86-LABEL: test_mm_maskz_set1_epi16:
; X86: # %bb.0: # %entry
; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: kmovd %ecx, %k1
; X86-NEXT: vpbroadcastw %eax, %xmm0 {%k1} {z}
; X86-NEXT: retl
@ -641,7 +641,7 @@ define <2 x i64> @test_mm_broadcastw_epi16(<2 x i64> %a0) {
define <2 x i64> @test_mm_mask_broadcastw_epi16(<2 x i64> %a0, i8 %a1, <2 x i64> %a2) {
; X86-LABEL: test_mm_mask_broadcastw_epi16:
; X86: # %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: kmovd %eax, %k1
; X86-NEXT: vpbroadcastw %xmm1, %xmm0 {%k1}
; X86-NEXT: retl
@ -663,7 +663,7 @@ define <2 x i64> @test_mm_mask_broadcastw_epi16(<2 x i64> %a0, i8 %a1, <2 x i64>
define <2 x i64> @test_mm_maskz_broadcastw_epi16(i8 %a0, <2 x i64> %a1) {
; X86-LABEL: test_mm_maskz_broadcastw_epi16:
; X86: # %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: kmovd %eax, %k1
; X86-NEXT: vpbroadcastw %xmm0, %xmm0 {%k1} {z}
; X86-NEXT: retl
@ -809,7 +809,7 @@ entry:
define <2 x i64> @test_mm_mask2_permutex2var_epi16(<2 x i64> %__A, <2 x i64> %__I, i8 zeroext %__U, <2 x i64> %__B) {
; X86-LABEL: test_mm_mask2_permutex2var_epi16:
; X86: # %bb.0: # %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: kmovd %eax, %k1
; X86-NEXT: vpermi2w %xmm2, %xmm0, %xmm1 {%k1}
; X86-NEXT: vmovdqa %xmm1, %xmm0
@ -874,7 +874,7 @@ entry:
define <2 x i64> @test_mm_mask_permutex2var_epi16(<2 x i64> %__A, i8 zeroext %__U, <2 x i64> %__I, <2 x i64> %__B) {
; X86-LABEL: test_mm_mask_permutex2var_epi16:
; X86: # %bb.0: # %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: kmovd %eax, %k1
; X86-NEXT: vpermt2w %xmm2, %xmm1, %xmm0 {%k1}
; X86-NEXT: retl
@ -898,7 +898,7 @@ entry:
define <2 x i64> @test_mm_maskz_permutex2var_epi16(i8 zeroext %__U, <2 x i64> %__A, <2 x i64> %__I, <2 x i64> %__B) {
; X86-LABEL: test_mm_maskz_permutex2var_epi16:
; X86: # %bb.0: # %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: kmovd %eax, %k1
; X86-NEXT: vpermt2w %xmm2, %xmm1, %xmm0 {%k1} {z}
; X86-NEXT: retl

4
llvm/test/CodeGen/X86/avx512bwvl-intrinsics-upgrade.ll
View File

@ -6174,7 +6174,7 @@ define i8@test_int_x86_avx512_ptestm_w_128(<8 x i16> %x0, <8 x i16> %x1, i8 %x2)
; X86: # %bb.0:
; X86-NEXT: vptestmw %xmm1, %xmm0, %k0 # encoding: [0x62,0xf2,0xfd,0x08,0x26,0xc1]
; X86-NEXT: kmovd %k0, %ecx # encoding: [0xc5,0xfb,0x93,0xc8]
; X86-NEXT: movb {{[0-9]+}}(%esp), %al # encoding: [0x8a,0x44,0x24,0x04]
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax # encoding: [0x0f,0xb6,0x44,0x24,0x04]
; X86-NEXT: andb %cl, %al # encoding: [0x20,0xc8]
; X86-NEXT: addb %cl, %al # encoding: [0x00,0xc8]
; X86-NEXT: retl # encoding: [0xc3]
@ -6283,7 +6283,7 @@ define i8@test_int_x86_avx512_ptestnm_w_128(<8 x i16> %x0, <8 x i16> %x1, i8 %x2
; X86: # %bb.0:
; X86-NEXT: vptestnmw %xmm1, %xmm0, %k0 # encoding: [0x62,0xf2,0xfe,0x08,0x26,0xc1]
; X86-NEXT: kmovd %k0, %ecx # encoding: [0xc5,0xfb,0x93,0xc8]
; X86-NEXT: movb {{[0-9]+}}(%esp), %al # encoding: [0x8a,0x44,0x24,0x04]
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax # encoding: [0x0f,0xb6,0x44,0x24,0x04]
; X86-NEXT: andb %cl, %al # encoding: [0x20,0xc8]
; X86-NEXT: addb %cl, %al # encoding: [0x00,0xc8]
; X86-NEXT: retl # encoding: [0xc3]

8
llvm/test/CodeGen/X86/avx512ifma-intrinsics-fast-isel.ll
View File

@ -17,7 +17,7 @@ entry:
define <8 x i64> @test_mm512_mask_madd52hi_epu64(<8 x i64> %__W, i8 zeroext %__M, <8 x i64> %__X, <8 x i64> %__Y) {
; X86-LABEL: test_mm512_mask_madd52hi_epu64:
; X86: # %bb.0: # %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: kmovw %eax, %k1
; X86-NEXT: vpmadd52huq %zmm2, %zmm1, %zmm0 {%k1}
; X86-NEXT: retl
@ -37,7 +37,7 @@ entry:
define <8 x i64> @test_mm512_maskz_madd52hi_epu64(i8 zeroext %__M, <8 x i64> %__X, <8 x i64> %__Y, <8 x i64> %__Z) {
; X86-LABEL: test_mm512_maskz_madd52hi_epu64:
; X86: # %bb.0: # %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: kmovw %eax, %k1
; X86-NEXT: vpmadd52huq %zmm2, %zmm1, %zmm0 {%k1} {z}
; X86-NEXT: retl
@ -67,7 +67,7 @@ entry:
define <8 x i64> @test_mm512_mask_madd52lo_epu64(<8 x i64> %__W, i8 zeroext %__M, <8 x i64> %__X, <8 x i64> %__Y) {
; X86-LABEL: test_mm512_mask_madd52lo_epu64:
; X86: # %bb.0: # %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: kmovw %eax, %k1
; X86-NEXT: vpmadd52luq %zmm2, %zmm1, %zmm0 {%k1}
; X86-NEXT: retl
@ -87,7 +87,7 @@ entry:
define <8 x i64> @test_mm512_maskz_madd52lo_epu64(i8 zeroext %__M, <8 x i64> %__X, <8 x i64> %__Y, <8 x i64> %__Z) {
; X86-LABEL: test_mm512_maskz_madd52lo_epu64:
; X86: # %bb.0: # %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: kmovw %eax, %k1
; X86-NEXT: vpmadd52luq %zmm2, %zmm1, %zmm0 {%k1} {z}
; X86-NEXT: retl

16
llvm/test/CodeGen/X86/avx512ifmavl-intrinsics-fast-isel.ll
View File

@ -17,7 +17,7 @@ entry:
define <2 x i64> @test_mm_mask_madd52hi_epu64(<2 x i64> %__W, i8 zeroext %__M, <2 x i64> %__X, <2 x i64> %__Y) {
; X86-LABEL: test_mm_mask_madd52hi_epu64:
; X86: # %bb.0: # %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: kmovw %eax, %k1
; X86-NEXT: vpmadd52huq %xmm2, %xmm1, %xmm0 {%k1}
; X86-NEXT: retl
@ -38,7 +38,7 @@ entry:
define <2 x i64> @test_mm_maskz_madd52hi_epu64(i8 zeroext %__M, <2 x i64> %__X, <2 x i64> %__Y, <2 x i64> %__Z) {
; X86-LABEL: test_mm_maskz_madd52hi_epu64:
; X86: # %bb.0: # %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: kmovw %eax, %k1
; X86-NEXT: vpmadd52huq %xmm2, %xmm1, %xmm0 {%k1} {z}
; X86-NEXT: retl
@ -69,7 +69,7 @@ entry:
define <4 x i64> @test_mm256_mask_madd52hi_epu64(<4 x i64> %__W, i8 zeroext %__M, <4 x i64> %__X, <4 x i64> %__Y) {
; X86-LABEL: test_mm256_mask_madd52hi_epu64:
; X86: # %bb.0: # %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: kmovw %eax, %k1
; X86-NEXT: vpmadd52huq %ymm2, %ymm1, %ymm0 {%k1}
; X86-NEXT: retl
@ -90,7 +90,7 @@ entry:
define <4 x i64> @test_mm256_maskz_madd52hi_epu64(i8 zeroext %__M, <4 x i64> %__X, <4 x i64> %__Y, <4 x i64> %__Z) {
; X86-LABEL: test_mm256_maskz_madd52hi_epu64:
; X86: # %bb.0: # %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: kmovw %eax, %k1
; X86-NEXT: vpmadd52huq %ymm2, %ymm1, %ymm0 {%k1} {z}
; X86-NEXT: retl
@ -121,7 +121,7 @@ entry:
define <2 x i64> @test_mm_mask_madd52lo_epu64(<2 x i64> %__W, i8 zeroext %__M, <2 x i64> %__X, <2 x i64> %__Y) {
; X86-LABEL: test_mm_mask_madd52lo_epu64:
; X86: # %bb.0: # %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: kmovw %eax, %k1
; X86-NEXT: vpmadd52luq %xmm2, %xmm1, %xmm0 {%k1}
; X86-NEXT: retl
@ -142,7 +142,7 @@ entry:
define <2 x i64> @test_mm_maskz_madd52lo_epu64(i8 zeroext %__M, <2 x i64> %__X, <2 x i64> %__Y, <2 x i64> %__Z) {
; X86-LABEL: test_mm_maskz_madd52lo_epu64:
; X86: # %bb.0: # %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: kmovw %eax, %k1
; X86-NEXT: vpmadd52luq %xmm2, %xmm1, %xmm0 {%k1} {z}
; X86-NEXT: retl
@ -173,7 +173,7 @@ entry:
define <4 x i64> @test_mm256_mask_madd52lo_epu64(<4 x i64> %__W, i8 zeroext %__M, <4 x i64> %__X, <4 x i64> %__Y) {
; X86-LABEL: test_mm256_mask_madd52lo_epu64:
; X86: # %bb.0: # %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: kmovw %eax, %k1
; X86-NEXT: vpmadd52luq %ymm2, %ymm1, %ymm0 {%k1}
; X86-NEXT: retl
@ -194,7 +194,7 @@ entry:
define <4 x i64> @test_mm256_maskz_madd52lo_epu64(i8 zeroext %__M, <4 x i64> %__X, <4 x i64> %__Y, <4 x i64> %__Z) {
; X86-LABEL: test_mm256_maskz_madd52lo_epu64:
; X86: # %bb.0: # %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: kmovw %eax, %k1
; X86-NEXT: vpmadd52luq %ymm2, %ymm1, %ymm0 {%k1} {z}
; X86-NEXT: retl

16
llvm/test/CodeGen/X86/avx512vbmi2-intrinsics-fast-isel.ll
View File

@ -303,7 +303,7 @@ entry:
define <8 x i64> @test_mm512_mask_shldi_epi64(<8 x i64> %__S, i8 zeroext %__U, <8 x i64> %__A, <8 x i64> %__B) {
; X86-LABEL: test_mm512_mask_shldi_epi64:
; X86: # %bb.0: # %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: kmovd %eax, %k1
; X86-NEXT: vpshldq $47, %zmm2, %zmm1, %zmm0 {%k1}
; X86-NEXT: retl
@ -325,7 +325,7 @@ declare <8 x i64> @llvm.fshl.v8i64(<8 x i64>, <8 x i64>, <8 x i64>)
define <8 x i64> @test_mm512_maskz_shldi_epi64(i8 zeroext %__U, <8 x i64> %__A, <8 x i64> %__B) {
; X86-LABEL: test_mm512_maskz_shldi_epi64:
; X86: # %bb.0: # %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: kmovd %eax, %k1
; X86-NEXT: vpshldq $63, %zmm1, %zmm0, %zmm0 {%k1} {z}
; X86-NEXT: retl
@ -475,7 +475,7 @@ entry:
define <8 x i64> @test_mm512_mask_shrdi_epi64(<8 x i64> %__S, i8 zeroext %__U, <8 x i64> %__A, <8 x i64> %__B) {
; X86-LABEL: test_mm512_mask_shrdi_epi64:
; X86: # %bb.0: # %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: kmovd %eax, %k1
; X86-NEXT: vpshrdq $47, %zmm2, %zmm1, %zmm0 {%k1}
; X86-NEXT: retl
@ -497,7 +497,7 @@ declare <8 x i64> @llvm.fshr.v8i64(<8 x i64>, <8 x i64>, <8 x i64>)
define <8 x i64> @test_mm512_maskz_shrdi_epi64(i8 zeroext %__U, <8 x i64> %__A, <8 x i64> %__B) {
; X86-LABEL: test_mm512_maskz_shrdi_epi64:
; X86: # %bb.0: # %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: kmovd %eax, %k1
; X86-NEXT: vpshrdq $63, %zmm1, %zmm0, %zmm0 {%k1} {z}
; X86-NEXT: retl
@ -647,7 +647,7 @@ entry:
define <8 x i64> @test_mm512_mask_shldv_epi64(<8 x i64> %__S, i8 zeroext %__U, <8 x i64> %__A, <8 x i64> %__B) {
; X86-LABEL: test_mm512_mask_shldv_epi64:
; X86: # %bb.0: # %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: kmovd %eax, %k1
; X86-NEXT: vpshldvq %zmm2, %zmm1, %zmm0 {%k1}
; X86-NEXT: retl
@ -667,7 +667,7 @@ entry:
define <8 x i64> @test_mm512_maskz_shldv_epi64(i8 zeroext %__U, <8 x i64> %__S, <8 x i64> %__A, <8 x i64> %__B) {
; X86-LABEL: test_mm512_maskz_shldv_epi64:
; X86: # %bb.0: # %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: kmovd %eax, %k1
; X86-NEXT: vpshldvq %zmm2, %zmm1, %zmm0 {%k1} {z}
; X86-NEXT: retl
@ -817,7 +817,7 @@ entry:
define <8 x i64> @test_mm512_mask_shrdv_epi64(<8 x i64> %__S, i8 zeroext %__U, <8 x i64> %__A, <8 x i64> %__B) {
; X86-LABEL: test_mm512_mask_shrdv_epi64:
; X86: # %bb.0: # %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: kmovd %eax, %k1
; X86-NEXT: vpshrdvq %zmm2, %zmm1, %zmm0 {%k1}
; X86-NEXT: retl
@ -837,7 +837,7 @@ entry:
define <8 x i64> @test_mm512_maskz_shrdv_epi64(i8 zeroext %__U, <8 x i64> %__S, <8 x i64> %__A, <8 x i64> %__B) {
; X86-LABEL: test_mm512_maskz_shrdv_epi64:
; X86: # %bb.0: # %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: kmovd %eax, %k1
; X86-NEXT: vpshrdvq %zmm2, %zmm1, %zmm0 {%k1} {z}
; X86-NEXT: retl

94
llvm/test/CodeGen/X86/avx512vbmi2vl-intrinsics-fast-isel.ll
View File

@ -7,7 +7,7 @@
define <2 x i64> @test_mm_mask_compress_epi16(<2 x i64> %__S, i8 zeroext %__U, <2 x i64> %__D) {
; X86-LABEL: test_mm_mask_compress_epi16:
; X86: # %bb.0: # %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: kmovd %eax, %k1
; X86-NEXT: vpcompressw %xmm1, %xmm0 {%k1}
; X86-NEXT: retl
@ -28,7 +28,7 @@ entry:
define <2 x i64> @test_mm_maskz_compress_epi16(i8 zeroext %__U, <2 x i64> %__D) {
; X86-LABEL: test_mm_maskz_compress_epi16:
; X86: # %bb.0: # %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: kmovd %eax, %k1
; X86-NEXT: vpcompressw %xmm0, %xmm0 {%k1} {z}
; X86-NEXT: retl
@ -87,7 +87,7 @@ entry:
define void @test_mm_mask_compressstoreu_epi16(ptr %__P, i8 zeroext %__U, <2 x i64> %__D) {
; X86-LABEL: test_mm_mask_compressstoreu_epi16:
; X86: # %bb.0: # %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: kmovd %eax, %k1
; X86-NEXT: vpcompressw %xmm0, (%ecx) {%k1}
@ -128,7 +128,7 @@ entry:
define <2 x i64> @test_mm_mask_expand_epi16(<2 x i64> %__S, i8 zeroext %__U, <2 x i64> %__D) {
; X86-LABEL: test_mm_mask_expand_epi16:
; X86: # %bb.0: # %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: kmovd %eax, %k1
; X86-NEXT: vpexpandw %xmm1, %xmm0 {%k1}
; X86-NEXT: retl
@ -149,7 +149,7 @@ entry:
define <2 x i64> @test_mm_maskz_expand_epi16(i8 zeroext %__U, <2 x i64> %__D) {
; X86-LABEL: test_mm_maskz_expand_epi16:
; X86: # %bb.0: # %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: kmovd %eax, %k1
; X86-NEXT: vpexpandw %xmm0, %xmm0 {%k1} {z}
; X86-NEXT: retl
@ -209,7 +209,7 @@ define <2 x i64> @test_mm_mask_expandloadu_epi16(<2 x i64> %__S, i8 zeroext %__U
; X86-LABEL: test_mm_mask_expandloadu_epi16:
; X86: # %bb.0: # %entry
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: kmovd %ecx, %k1
; X86-NEXT: vpexpandw (%eax), %xmm0 {%k1}
; X86-NEXT: retl
@ -231,7 +231,7 @@ define <2 x i64> @test_mm_maskz_expandloadu_epi16(i8 zeroext %__U, ptr readonly
; X86-LABEL: test_mm_maskz_expandloadu_epi16:
; X86: # %bb.0: # %entry
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: kmovd %ecx, %k1
; X86-NEXT: vpexpandw (%eax), %xmm0 {%k1} {z}
; X86-NEXT: retl
@ -574,7 +574,7 @@ entry:
define <4 x i64> @test_mm256_mask_shldi_epi64(<4 x i64> %__S, i8 zeroext %__U, <4 x i64> %__A, <4 x i64> %__B) {
; X86-LABEL: test_mm256_mask_shldi_epi64:
; X86: # %bb.0: # %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: kmovd %eax, %k1
; X86-NEXT: vpshldq $47, %ymm2, %ymm1, %ymm0 {%k1}
; X86-NEXT: retl
@ -597,7 +597,7 @@ declare <4 x i64> @llvm.fshl.v4i64(<4 x i64>, <4 x i64>, <4 x i64>)
define <4 x i64> @test_mm256_maskz_shldi_epi64(i8 zeroext %__U, <4 x i64> %__A, <4 x i64> %__B) {
; X86-LABEL: test_mm256_maskz_shldi_epi64:
; X86: # %bb.0: # %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: kmovd %eax, %k1
; X86-NEXT: vpshldq $63, %ymm1, %ymm0, %ymm0 {%k1} {z}
; X86-NEXT: retl
@ -628,7 +628,7 @@ entry:
define <2 x i64> @test_mm_mask_shldi_epi64(<2 x i64> %__S, i8 zeroext %__U, <2 x i64> %__A, <2 x i64> %__B) {
; X86-LABEL: test_mm_mask_shldi_epi64:
; X86: # %bb.0: # %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: kmovd %eax, %k1
; X86-NEXT: vpshldq $47, %xmm2, %xmm1, %xmm0 {%k1}
; X86-NEXT: retl
@ -651,7 +651,7 @@ declare <2 x i64> @llvm.fshl.v2i64(<2 x i64>, <2 x i64>, <2 x i64>)
define <2 x i64> @test_mm_maskz_shldi_epi64(i8 zeroext %__U, <2 x i64> %__A, <2 x i64> %__B) {
; X86-LABEL: test_mm_maskz_shldi_epi64:
; X86: # %bb.0: # %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: kmovd %eax, %k1
; X86-NEXT: vpshldq $63, %xmm1, %xmm0, %xmm0 {%k1} {z}
; X86-NEXT: retl
@ -682,7 +682,7 @@ entry:
define <4 x i64> @test_mm256_mask_shldi_epi32(<4 x i64> %__S, i8 zeroext %__U, <4 x i64> %__A, <4 x i64> %__B) {
; X86-LABEL: test_mm256_mask_shldi_epi32:
; X86: # %bb.0: # %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: kmovd %eax, %k1
; X86-NEXT: vpshldd $7, %ymm2, %ymm1, %ymm0 {%k1}
; X86-NEXT: retl
@ -708,7 +708,7 @@ declare <8 x i32> @llvm.fshl.v8i32(<8 x i32>, <8 x i32>, <8 x i32>)
define <4 x i64> @test_mm256_maskz_shldi_epi32(i8 zeroext %__U, <4 x i64> %__A, <4 x i64> %__B) {
; X86-LABEL: test_mm256_maskz_shldi_epi32:
; X86: # %bb.0: # %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: kmovd %eax, %k1
; X86-NEXT: vpshldd $15, %ymm1, %ymm0, %ymm0 {%k1} {z}
; X86-NEXT: retl
@ -744,7 +744,7 @@ entry:
define <2 x i64> @test_mm_mask_shldi_epi32(<2 x i64> %__S, i8 zeroext %__U, <2 x i64> %__A, <2 x i64> %__B) {
; X86-LABEL: test_mm_mask_shldi_epi32:
; X86: # %bb.0: # %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: kmovd %eax, %k1
; X86-NEXT: vpshldd $7, %xmm2, %xmm1, %xmm0 {%k1}
; X86-NEXT: retl
@ -771,7 +771,7 @@ declare <4 x i32> @llvm.fshl.v4i32(<4 x i32>, <4 x i32>, <4 x i32>)
define <2 x i64> @test_mm_maskz_shldi_epi32(i8 zeroext %__U, <2 x i64> %__A, <2 x i64> %__B) {
; X86-LABEL: test_mm_maskz_shldi_epi32:
; X86: # %bb.0: # %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: kmovd %eax, %k1
; X86-NEXT: vpshldd $15, %xmm1, %xmm0, %xmm0 {%k1} {z}
; X86-NEXT: retl
@ -868,7 +868,7 @@ entry:
define <2 x i64> @test_mm_mask_shldi_epi16(<2 x i64> %__S, i8 zeroext %__U, <2 x i64> %__A, <2 x i64> %__B) {
; X86-LABEL: test_mm_mask_shldi_epi16:
; X86: # %bb.0: # %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: kmovd %eax, %k1
; X86-NEXT: vpshldw $3, %xmm2, %xmm1, %xmm0 {%k1}
; X86-NEXT: retl
@ -894,7 +894,7 @@ declare <8 x i16> @llvm.fshl.v8i16(<8 x i16>, <8 x i16>, <8 x i16>)
define <2 x i64> @test_mm_maskz_shldi_epi16(i8 zeroext %__U, <2 x i64> %__A, <2 x i64> %__B) {
; X86-LABEL: test_mm_maskz_shldi_epi16:
; X86: # %bb.0: # %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: kmovd %eax, %k1
; X86-NEXT: vpshldw $7, %xmm1, %xmm0, %xmm0 {%k1} {z}
; X86-NEXT: retl
@ -930,7 +930,7 @@ entry:
define <4 x i64> @test_mm256_mask_shrdi_epi64(<4 x i64> %__S, i8 zeroext %__U, <4 x i64> %__A, <4 x i64> %__B) {
; X86-LABEL: test_mm256_mask_shrdi_epi64:
; X86: # %bb.0: # %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: kmovd %eax, %k1
; X86-NEXT: vpshrdq $47, %ymm2, %ymm1, %ymm0 {%k1}
; X86-NEXT: retl
@ -953,7 +953,7 @@ declare <4 x i64> @llvm.fshr.v4i64(<4 x i64>, <4 x i64>, <4 x i64>)
define <4 x i64> @test_mm256_maskz_shrdi_epi64(i8 zeroext %__U, <4 x i64> %__A, <4 x i64> %__B) {
; X86-LABEL: test_mm256_maskz_shrdi_epi64:
; X86: # %bb.0: # %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: kmovd %eax, %k1
; X86-NEXT: vpshrdq $63, %ymm1, %ymm0, %ymm0 {%k1} {z}
; X86-NEXT: retl
@ -984,7 +984,7 @@ entry:
define <2 x i64> @test_mm_mask_shrdi_epi64(<2 x i64> %__S, i8 zeroext %__U, <2 x i64> %__A, <2 x i64> %__B) {
; X86-LABEL: test_mm_mask_shrdi_epi64:
; X86: # %bb.0: # %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: kmovd %eax, %k1
; X86-NEXT: vpshrdq $47, %xmm2, %xmm1, %xmm0 {%k1}
; X86-NEXT: retl
@ -1007,7 +1007,7 @@ declare <2 x i64> @llvm.fshr.v2i64(<2 x i64>, <2 x i64>, <2 x i64>)
define <2 x i64> @test_mm_maskz_shrdi_epi64(i8 zeroext %__U, <2 x i64> %__A, <2 x i64> %__B) {
; X86-LABEL: test_mm_maskz_shrdi_epi64:
; X86: # %bb.0: # %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: kmovd %eax, %k1
; X86-NEXT: vpshrdq $63, %xmm1, %xmm0, %xmm0 {%k1} {z}
; X86-NEXT: retl
@ -1038,7 +1038,7 @@ entry:
define <4 x i64> @test_mm256_mask_shrdi_epi32(<4 x i64> %__S, i8 zeroext %__U, <4 x i64> %__A, <4 x i64> %__B) {
; X86-LABEL: test_mm256_mask_shrdi_epi32:
; X86: # %bb.0: # %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: kmovd %eax, %k1
; X86-NEXT: vpshrdd $7, %ymm2, %ymm1, %ymm0 {%k1}
; X86-NEXT: retl
@ -1064,7 +1064,7 @@ declare <8 x i32> @llvm.fshr.v8i32(<8 x i32>, <8 x i32>, <8 x i32>)
define <4 x i64> @test_mm256_maskz_shrdi_epi32(i8 zeroext %__U, <4 x i64> %__A, <4 x i64> %__B) {
; X86-LABEL: test_mm256_maskz_shrdi_epi32:
; X86: # %bb.0: # %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: kmovd %eax, %k1
; X86-NEXT: vpshrdd $15, %ymm1, %ymm0, %ymm0 {%k1} {z}
; X86-NEXT: retl
@ -1100,7 +1100,7 @@ entry:
define <2 x i64> @test_mm_mask_shrdi_epi32(<2 x i64> %__S, i8 zeroext %__U, <2 x i64> %__A, <2 x i64> %__B) {
; X86-LABEL: test_mm_mask_shrdi_epi32:
; X86: # %bb.0: # %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: kmovd %eax, %k1
; X86-NEXT: vpshrdd $7, %xmm2, %xmm1, %xmm0 {%k1}
; X86-NEXT: retl
@ -1127,7 +1127,7 @@ declare <4 x i32> @llvm.fshr.v4i32(<4 x i32>, <4 x i32>, <4 x i32>)
define <2 x i64> @test_mm_maskz_shrdi_epi32(i8 zeroext %__U, <2 x i64> %__A, <2 x i64> %__B) {
; X86-LABEL: test_mm_maskz_shrdi_epi32:
; X86: # %bb.0: # %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: kmovd %eax, %k1
; X86-NEXT: vpshrdd $15, %xmm1, %xmm0, %xmm0 {%k1} {z}
; X86-NEXT: retl
@ -1224,7 +1224,7 @@ entry:
define <2 x i64> @test_mm_mask_shrdi_epi16(<2 x i64> %__S, i8 zeroext %__U, <2 x i64> %__A, <2 x i64> %__B) {
; X86-LABEL: test_mm_mask_shrdi_epi16:
; X86: # %bb.0: # %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: kmovd %eax, %k1
; X86-NEXT: vpshrdw $3, %xmm2, %xmm1, %xmm0 {%k1}
; X86-NEXT: retl
@ -1250,7 +1250,7 @@ declare <8 x i16> @llvm.fshr.v8i16(<8 x i16>, <8 x i16>, <8 x i16>)
define <2 x i64> @test_mm_maskz_shrdi_epi16(i8 zeroext %__U, <2 x i64> %__A, <2 x i64> %__B) {
; X86-LABEL: test_mm_maskz_shrdi_epi16:
; X86: # %bb.0: # %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: kmovd %eax, %k1
; X86-NEXT: vpshrdw $7, %xmm1, %xmm0, %xmm0 {%k1} {z}
; X86-NEXT: retl
@ -1286,7 +1286,7 @@ entry:
define <4 x i64> @test_mm256_mask_shldv_epi64(<4 x i64> %__S, i8 zeroext %__U, <4 x i64> %__A, <4 x i64> %__B) {
; X86-LABEL: test_mm256_mask_shldv_epi64:
; X86: # %bb.0: # %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: kmovd %eax, %k1
; X86-NEXT: vpshldvq %ymm2, %ymm1, %ymm0 {%k1}
; X86-NEXT: retl
@ -1307,7 +1307,7 @@ entry:
define <4 x i64> @test_mm256_maskz_shldv_epi64(i8 zeroext %__U, <4 x i64> %__S, <4 x i64> %__A, <4 x i64> %__B) {
; X86-LABEL: test_mm256_maskz_shldv_epi64:
; X86: # %bb.0: # %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: kmovd %eax, %k1
; X86-NEXT: vpshldvq %ymm2, %ymm1, %ymm0 {%k1} {z}
; X86-NEXT: retl
@ -1338,7 +1338,7 @@ entry:
define <2 x i64> @test_mm_mask_shldv_epi64(<2 x i64> %__S, i8 zeroext %__U, <2 x i64> %__A, <2 x i64> %__B) {
; X86-LABEL: test_mm_mask_shldv_epi64:
; X86: # %bb.0: # %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: kmovd %eax, %k1
; X86-NEXT: vpshldvq %xmm2, %xmm1, %xmm0 {%k1}
; X86-NEXT: retl
@ -1359,7 +1359,7 @@ entry:
define <2 x i64> @test_mm_maskz_shldv_epi64(i8 zeroext %__U, <2 x i64> %__S, <2 x i64> %__A, <2 x i64> %__B) {
; X86-LABEL: test_mm_maskz_shldv_epi64:
; X86: # %bb.0: # %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: kmovd %eax, %k1
; X86-NEXT: vpshldvq %xmm2, %xmm1, %xmm0 {%k1} {z}
; X86-NEXT: retl
@ -1390,7 +1390,7 @@ entry:
define <4 x i64> @test_mm256_mask_shldv_epi32(<4 x i64> %__S, i8 zeroext %__U, <4 x i64> %__A, <4 x i64> %__B) {
; X86-LABEL: test_mm256_mask_shldv_epi32:
; X86: # %bb.0: # %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: kmovd %eax, %k1
; X86-NEXT: vpshldvd %ymm2, %ymm1, %ymm0 {%k1}
; X86-NEXT: retl
@ -1414,7 +1414,7 @@ entry:
define <4 x i64> @test_mm256_maskz_shldv_epi32(i8 zeroext %__U, <4 x i64> %__S, <4 x i64> %__A, <4 x i64> %__B) {
; X86-LABEL: test_mm256_maskz_shldv_epi32:
; X86: # %bb.0: # %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: kmovd %eax, %k1
; X86-NEXT: vpshldvd %ymm2, %ymm1, %ymm0 {%k1} {z}
; X86-NEXT: retl
@ -1452,7 +1452,7 @@ entry:
define <2 x i64> @test_mm_mask_shldv_epi32(<2 x i64> %__S, i8 zeroext %__U, <2 x i64> %__A, <2 x i64> %__B) {
; X86-LABEL: test_mm_mask_shldv_epi32:
; X86: # %bb.0: # %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: kmovd %eax, %k1
; X86-NEXT: vpshldvd %xmm2, %xmm1, %xmm0 {%k1}
; X86-NEXT: retl
@ -1477,7 +1477,7 @@ entry:
define <2 x i64> @test_mm_maskz_shldv_epi32(i8 zeroext %__U, <2 x i64> %__S, <2 x i64> %__A, <2 x i64> %__B) {
; X86-LABEL: test_mm_maskz_shldv_epi32:
; X86: # %bb.0: # %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: kmovd %eax, %k1
; X86-NEXT: vpshldvd %xmm2, %xmm1, %xmm0 {%k1} {z}
; X86-NEXT: retl
@ -1576,7 +1576,7 @@ entry:
define <2 x i64> @test_mm_mask_shldv_epi16(<2 x i64> %__S, i8 zeroext %__U, <2 x i64> %__A, <2 x i64> %__B) {
; X86-LABEL: test_mm_mask_shldv_epi16:
; X86: # %bb.0: # %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: kmovd %eax, %k1
; X86-NEXT: vpshldvw %xmm2, %xmm1, %xmm0 {%k1}
; X86-NEXT: retl
@ -1600,7 +1600,7 @@ entry:
define <2 x i64> @test_mm_maskz_shldv_epi16(i8 zeroext %__U, <2 x i64> %__S, <2 x i64> %__A, <2 x i64> %__B) {
; X86-LABEL: test_mm_maskz_shldv_epi16:
; X86: # %bb.0: # %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: kmovd %eax, %k1
; X86-NEXT: vpshldvw %xmm2, %xmm1, %xmm0 {%k1} {z}
; X86-NEXT: retl
@ -1638,7 +1638,7 @@ entry:
define <4 x i64> @test_mm256_mask_shrdv_epi64(<4 x i64> %__S, i8 zeroext %__U, <4 x i64> %__A, <4 x i64> %__B) {
; X86-LABEL: test_mm256_mask_shrdv_epi64:
; X86: # %bb.0: # %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: kmovd %eax, %k1
; X86-NEXT: vpshrdvq %ymm2, %ymm1, %ymm0 {%k1}
; X86-NEXT: retl
@ -1659,7 +1659,7 @@ entry:
define <4 x i64> @test_mm256_maskz_shrdv_epi64(i8 zeroext %__U, <4 x i64> %__S, <4 x i64> %__A, <4 x i64> %__B) {
; X86-LABEL: test_mm256_maskz_shrdv_epi64:
; X86: # %bb.0: # %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: kmovd %eax, %k1
; X86-NEXT: vpshrdvq %ymm2, %ymm1, %ymm0 {%k1} {z}
; X86-NEXT: retl
@ -1690,7 +1690,7 @@ entry:
define <2 x i64> @test_mm_mask_shrdv_epi64(<2 x i64> %__S, i8 zeroext %__U, <2 x i64> %__A, <2 x i64> %__B) {
; X86-LABEL: test_mm_mask_shrdv_epi64:
; X86: # %bb.0: # %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: kmovd %eax, %k1
; X86-NEXT: vpshrdvq %xmm2, %xmm1, %xmm0 {%k1}
; X86-NEXT: retl
@ -1711,7 +1711,7 @@ entry:
define <2 x i64> @test_mm_maskz_shrdv_epi64(i8 zeroext %__U, <2 x i64> %__S, <2 x i64> %__A, <2 x i64> %__B) {
; X86-LABEL: test_mm_maskz_shrdv_epi64:
; X86: # %bb.0: # %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: kmovd %eax, %k1
; X86-NEXT: vpshrdvq %xmm2, %xmm1, %xmm0 {%k1} {z}
; X86-NEXT: retl
@ -1742,7 +1742,7 @@ entry:
define <4 x i64> @test_mm256_mask_shrdv_epi32(<4 x i64> %__S, i8 zeroext %__U, <4 x i64> %__A, <4 x i64> %__B) {
; X86-LABEL: test_mm256_mask_shrdv_epi32:
; X86: # %bb.0: # %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: kmovd %eax, %k1
; X86-NEXT: vpshrdvd %ymm2, %ymm1, %ymm0 {%k1}
; X86-NEXT: retl
@ -1766,7 +1766,7 @@ entry:
define <4 x i64> @test_mm256_maskz_shrdv_epi32(i8 zeroext %__U, <4 x i64> %__S, <4 x i64> %__A, <4 x i64> %__B) {
; X86-LABEL: test_mm256_maskz_shrdv_epi32:
; X86: # %bb.0: # %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: kmovd %eax, %k1
; X86-NEXT: vpshrdvd %ymm2, %ymm1, %ymm0 {%k1} {z}
; X86-NEXT: retl
@ -1804,7 +1804,7 @@ entry:
define <2 x i64> @test_mm_mask_shrdv_epi32(<2 x i64> %__S, i8 zeroext %__U, <2 x i64> %__A, <2 x i64> %__B) {
; X86-LABEL: test_mm_mask_shrdv_epi32:
; X86: # %bb.0: # %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: kmovd %eax, %k1
; X86-NEXT: vpshrdvd %xmm2, %xmm1, %xmm0 {%k1}
; X86-NEXT: retl
@ -1829,7 +1829,7 @@ entry:
define <2 x i64> @test_mm_maskz_shrdv_epi32(i8 zeroext %__U, <2 x i64> %__S, <2 x i64> %__A, <2 x i64> %__B) {
; X86-LABEL: test_mm_maskz_shrdv_epi32:
; X86: # %bb.0: # %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: kmovd %eax, %k1
; X86-NEXT: vpshrdvd %xmm2, %xmm1, %xmm0 {%k1} {z}
; X86-NEXT: retl
@ -1928,7 +1928,7 @@ entry:
define <2 x i64> @test_mm_mask_shrdv_epi16(<2 x i64> %__S, i8 zeroext %__U, <2 x i64> %__A, <2 x i64> %__B) {
; X86-LABEL: test_mm_mask_shrdv_epi16:
; X86: # %bb.0: # %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: kmovd %eax, %k1
; X86-NEXT: vpshrdvw %xmm2, %xmm1, %xmm0 {%k1}
; X86-NEXT: retl
@ -1952,7 +1952,7 @@ entry:
define <2 x i64> @test_mm_maskz_shrdv_epi16(i8 zeroext %__U, <2 x i64> %__S, <2 x i64> %__A, <2 x i64> %__B) {
; X86-LABEL: test_mm_maskz_shrdv_epi16:
; X86: # %bb.0: # %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: kmovd %eax, %k1
; X86-NEXT: vpshrdvw %xmm2, %xmm1, %xmm0 {%k1} {z}
; X86-NEXT: retl

596
llvm/test/CodeGen/X86/avx512vl-intrinsics-fast-isel.ll
View File

File diff suppressed because it is too large Load Diff

4
llvm/test/CodeGen/X86/avx512vl-intrinsics-upgrade.ll
View File

@ -10753,7 +10753,7 @@ define i8@test_int_x86_avx512_ptestm_d_256(<8 x i32> %x0, <8 x i32> %x1, i8 %x2)
; X86: # %bb.0:
; X86-NEXT: vptestmd %ymm1, %ymm0, %k0 # encoding: [0x62,0xf2,0x7d,0x28,0x27,0xc1]
; X86-NEXT: kmovw %k0, %ecx # encoding: [0xc5,0xf8,0x93,0xc8]
; X86-NEXT: movb {{[0-9]+}}(%esp), %al # encoding: [0x8a,0x44,0x24,0x04]
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax # encoding: [0x0f,0xb6,0x44,0x24,0x04]
; X86-NEXT: andb %cl, %al # encoding: [0x20,0xc8]
; X86-NEXT: addb %cl, %al # encoding: [0x00,0xc8]
; X86-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
@ -10876,7 +10876,7 @@ define i8@test_int_x86_avx512_ptestnm_d_256(<8 x i32> %x0, <8 x i32> %x1, i8 %x2
; X86: # %bb.0:
; X86-NEXT: vptestnmd %ymm1, %ymm0, %k0 # encoding: [0x62,0xf2,0x7e,0x28,0x27,0xc1]
; X86-NEXT: kmovw %k0, %ecx # encoding: [0xc5,0xf8,0x93,0xc8]
; X86-NEXT: movb {{[0-9]+}}(%esp), %al # encoding: [0x8a,0x44,0x24,0x04]
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax # encoding: [0x0f,0xb6,0x44,0x24,0x04]
; X86-NEXT: andb %cl, %al # encoding: [0x20,0xc8]
; X86-NEXT: addb %cl, %al # encoding: [0x00,0xc8]
; X86-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]

6
llvm/test/CodeGen/X86/bitcast-vector-bool.ll
View File

@ -119,7 +119,7 @@ define i8 @bitcast_v16i8_to_v2i8(<16 x i8> %a0) nounwind {
; SSE2-SSSE3-NEXT: pmovmskb %xmm0, %eax
; SSE2-SSSE3-NEXT: movd %eax, %xmm0
; SSE2-SSSE3-NEXT: movdqa %xmm0, -{{[0-9]+}}(%rsp)
; SSE2-SSSE3-NEXT: movb -{{[0-9]+}}(%rsp), %al
; SSE2-SSSE3-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
; SSE2-SSSE3-NEXT: addb -{{[0-9]+}}(%rsp), %al
; SSE2-SSSE3-NEXT: retq
;
@ -211,7 +211,7 @@ define i8 @bitcast_v16i16_to_v2i8(<16 x i16> %a0) nounwind {
; SSE2-SSSE3-NEXT: pmovmskb %xmm0, %eax
; SSE2-SSSE3-NEXT: movd %eax, %xmm0
; SSE2-SSSE3-NEXT: movdqa %xmm0, -{{[0-9]+}}(%rsp)
; SSE2-SSSE3-NEXT: movb -{{[0-9]+}}(%rsp), %al
; SSE2-SSSE3-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
; SSE2-SSSE3-NEXT: addb -{{[0-9]+}}(%rsp), %al
; SSE2-SSSE3-NEXT: retq
;
@ -384,7 +384,7 @@ define i8 @bitcast_v16i32_to_v2i8(<16 x i32> %a0) nounwind {
; SSE2-SSSE3-NEXT: pmovmskb %xmm0, %eax
; SSE2-SSSE3-NEXT: movd %eax, %xmm0
; SSE2-SSSE3-NEXT: movdqa %xmm0, -{{[0-9]+}}(%rsp)
; SSE2-SSSE3-NEXT: movb -{{[0-9]+}}(%rsp), %al
; SSE2-SSSE3-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
; SSE2-SSSE3-NEXT: addb -{{[0-9]+}}(%rsp), %al
; SSE2-SSSE3-NEXT: retq
;

8
llvm/test/CodeGen/X86/bitreverse.ll
View File

@ -348,7 +348,7 @@ declare i8 @llvm.bitreverse.i8(i8) readnone
define i8 @test_bitreverse_i8(i8 %a) {
; X86-LABEL: test_bitreverse_i8:
; X86: # %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: rolb $4, %al
; X86-NEXT: movl %eax, %ecx
; X86-NEXT: andb $51, %cl
@ -397,7 +397,7 @@ declare i4 @llvm.bitreverse.i4(i4) readnone
define i4 @test_bitreverse_i4(i4 %a) {
; X86-LABEL: test_bitreverse_i4:
; X86: # %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl %ecx, %eax
; X86-NEXT: andb $15, %al
; X86-NEXT: movl %ecx, %edx
@ -528,7 +528,7 @@ define i4 @fold_i4() {
define i8 @identity_i8(i8 %a) {
; X86-LABEL: identity_i8:
; X86: # %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: retl
;
; X64-LABEL: identity_i8:
@ -539,7 +539,7 @@ define i8 @identity_i8(i8 %a) {
;
; X86XOP-LABEL: identity_i8:
; X86XOP: # %bb.0:
; X86XOP-NEXT: movb {{[0-9]+}}(%esp), %al
; X86XOP-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86XOP-NEXT: retl
%b = call i8 @llvm.bitreverse.i8(i8 %a)
%c = call i8 @llvm.bitreverse.i8(i8 %b)

2
llvm/test/CodeGen/X86/bmi.ll
View File

@ -291,7 +291,7 @@ define i1 @andn_cmp_swap_ops(i64 %x, i64 %y) {
define i1 @andn_cmp_i8(i8 %x, i8 %y) {
; X86-LABEL: andn_cmp_i8:
; X86: # %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: notb %al
; X86-NEXT: testb %al, {{[0-9]+}}(%esp)
; X86-NEXT: sete %al

10
llvm/test/CodeGen/X86/bool-math.ll
View File

@ -55,7 +55,7 @@ define i8 @sub_zext_cmp_mask_narrower_result(i32 %x) {
;
; X32-LABEL: sub_zext_cmp_mask_narrower_result:
; X32: # %bb.0:
; X32-NEXT: movb {{[0-9]+}}(%esp), %al
; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X32-NEXT: andb $1, %al
; X32-NEXT: orb $46, %al
; X32-NEXT: retl
@ -77,7 +77,7 @@ define i8 @add_zext_cmp_mask_same_size_result(i8 %x) {
;
; X32-LABEL: add_zext_cmp_mask_same_size_result:
; X32: # %bb.0:
; X32-NEXT: movb {{[0-9]+}}(%esp), %al
; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X32-NEXT: andb $1, %al
; X32-NEXT: xorb $27, %al
; X32-NEXT: retl
@ -120,7 +120,7 @@ define i8 @add_zext_cmp_mask_narrower_result(i32 %x) {
;
; X32-LABEL: add_zext_cmp_mask_narrower_result:
; X32: # %bb.0:
; X32-NEXT: movb {{[0-9]+}}(%esp), %al
; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X32-NEXT: andb $1, %al
; X32-NEXT: xorb $43, %al
; X32-NEXT: retl
@ -205,7 +205,7 @@ define i8 @low_bit_select_constants_bigger_true_same_size_result(i8 %x) {
;
; X32-LABEL: low_bit_select_constants_bigger_true_same_size_result:
; X32: # %bb.0:
; X32-NEXT: movb {{[0-9]+}}(%esp), %al
; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X32-NEXT: andb $1, %al
; X32-NEXT: xorb $-29, %al
; X32-NEXT: retl
@ -246,7 +246,7 @@ define i8 @low_bit_select_constants_bigger_true_narrower_result(i16 %x) {
;
; X32-LABEL: low_bit_select_constants_bigger_true_narrower_result:
; X32: # %bb.0:
; X32-NEXT: movb {{[0-9]+}}(%esp), %al
; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X32-NEXT: andb $1, %al
; X32-NEXT: xorb $41, %al
; X32-NEXT: retl

6
llvm/test/CodeGen/X86/bool-vector.ll
View File

@ -9,9 +9,9 @@
define i32 @PR15215_bad(<4 x i32> %input) {
; X86-LABEL: PR15215_bad:
; X86: # %bb.0: # %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movb {{[0-9]+}}(%esp), %dl
; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %edx
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movb {{[0-9]+}}(%esp), %ah
; X86-NEXT: addb %ah, %ah
; X86-NEXT: andb $1, %cl

2
llvm/test/CodeGen/X86/brcond.ll
View File

@ -6,7 +6,7 @@
define i32 @test1(i32 %a, i32 %b) nounwind ssp {
; CHECK-LABEL: test1:
; CHECK: ## %bb.0: ## %entry
; CHECK-NEXT: movb {{[0-9]+}}(%esp), %al
; CHECK-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; CHECK-NEXT: xorb {{[0-9]+}}(%esp), %al
; CHECK-NEXT: testb $64, %al
; CHECK-NEXT: je LBB0_1

2
llvm/test/CodeGen/X86/bt.ll
View File

@ -1148,7 +1148,7 @@ define void @demanded_i32(ptr nocapture readonly, ptr nocapture, i32) nounwind {
define zeroext i1 @demanded_with_known_zeroes(i32 %bit, i32 %bits) {
; X86-LABEL: demanded_with_known_zeroes:
; X86: # %bb.0: # %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: shlb $2, %al
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movzbl %al, %eax

78
llvm/test/CodeGen/X86/btc_bts_btr.ll
View File

@ -17,7 +17,7 @@ define i16 @btr_16(i16 %x, i16 %n) {
; X86-LABEL: btr_16:
; X86: # %bb.0:
; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: btrw %cx, %ax
; X86-NEXT: retl
%1 = shl i16 1, %n
@ -36,7 +36,7 @@ define i16 @bts_16(i16 %x, i16 %n) {
;
; X86-LABEL: bts_16:
; X86: # %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl $1, %eax
; X86-NEXT: shll %cl, %eax
; X86-NEXT: orw {{[0-9]+}}(%esp), %ax
@ -57,7 +57,7 @@ define i16 @btc_16(i16 %x, i16 %n) {
;
; X86-LABEL: btc_16:
; X86: # %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl $1, %eax
; X86-NEXT: shll %cl, %eax
; X86-NEXT: xorw {{[0-9]+}}(%esp), %ax
@ -78,7 +78,7 @@ define i32 @btr_32(i32 %x, i32 %n) {
; X86-LABEL: btr_32:
; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: btrl %ecx, %eax
; X86-NEXT: retl
%1 = shl i32 1, %n
@ -97,7 +97,7 @@ define i32 @bts_32(i32 %x, i32 %n) {
; X86-LABEL: bts_32:
; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: btsl %ecx, %eax
; X86-NEXT: retl
%1 = shl i32 1, %n
@ -115,7 +115,7 @@ define i32 @btc_32(i32 %x, i32 %n) {
; X86-LABEL: btc_32:
; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: btcl %ecx, %eax
; X86-NEXT: retl
%1 = shl i32 1, %n
@ -132,7 +132,7 @@ define i64 @btr_64(i64 %x, i64 %n) {
;
; X86-LABEL: btr_64:
; X86: # %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl $1, %eax
; X86-NEXT: xorl %edx, %edx
; X86-NEXT: shldl %cl, %eax, %edx
@ -163,7 +163,7 @@ define i64 @bts_64(i64 %x, i64 %n) {
;
; X86-LABEL: bts_64:
; X86: # %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl $1, %eax
; X86-NEXT: xorl %edx, %edx
; X86-NEXT: shldl %cl, %eax, %edx
@ -191,7 +191,7 @@ define i64 @btc_64(i64 %x, i64 %n) {
;
; X86-LABEL: btc_64:
; X86: # %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl $1, %eax
; X86-NEXT: xorl %edx, %edx
; X86-NEXT: shldl %cl, %eax, %edx
@ -224,7 +224,7 @@ define i16 @btr_16_mask(i16 %x, i16 %n) {
; X86-LABEL: btr_16_mask:
; X86: # %bb.0:
; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: btrw %cx, %ax
; X86-NEXT: retl
%1 = and i16 %n, 15
@ -245,7 +245,7 @@ define i16 @bts_16_mask(i16 %x, i16 %n) {
;
; X86-LABEL: bts_16_mask:
; X86: # %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: andb $15, %cl
; X86-NEXT: movl $1, %eax
; X86-NEXT: shll %cl, %eax
@ -269,7 +269,7 @@ define i16 @btc_16_mask(i16 %x, i16 %n) {
;
; X86-LABEL: btc_16_mask:
; X86: # %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: andb $15, %cl
; X86-NEXT: movl $1, %eax
; X86-NEXT: shll %cl, %eax
@ -292,7 +292,7 @@ define i32 @btr_32_mask(i32 %x, i32 %n) {
; X86-LABEL: btr_32_mask:
; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: btrl %ecx, %eax
; X86-NEXT: retl
%1 = and i32 %n, 31
@ -312,7 +312,7 @@ define i32 @bts_32_mask(i32 %x, i32 %n) {
; X86-LABEL: bts_32_mask:
; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: btsl %ecx, %eax
; X86-NEXT: retl
%1 = and i32 %n, 31
@ -331,7 +331,7 @@ define i32 @btc_32_mask(i32 %x, i32 %n) {
; X86-LABEL: btc_32_mask:
; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: btcl %ecx, %eax
; X86-NEXT: retl
%1 = and i32 %n, 31
@ -349,7 +349,7 @@ define i64 @btr_64_mask(i64 %x, i64 %n) {
;
; X86-LABEL: btr_64_mask:
; X86: # %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl $1, %eax
; X86-NEXT: xorl %edx, %edx
; X86-NEXT: shldl %cl, %eax, %edx
@ -381,7 +381,7 @@ define i64 @bts_64_mask(i64 %x, i64 %n) {
;
; X86-LABEL: bts_64_mask:
; X86: # %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl $1, %eax
; X86-NEXT: xorl %edx, %edx
; X86-NEXT: shldl %cl, %eax, %edx
@ -410,7 +410,7 @@ define i64 @btc_64_mask(i64 %x, i64 %n) {
;
; X86-LABEL: btc_64_mask:
; X86: # %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl $1, %eax
; X86-NEXT: xorl %edx, %edx
; X86-NEXT: shldl %cl, %eax, %edx
@ -441,7 +441,7 @@ define i16 @btr_16_load(ptr %x, i16 %n) {
;
; X86-LABEL: btr_16_load:
; X86: # %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movzwl (%eax), %eax
; X86-NEXT: btrw %cx, %ax
@ -467,7 +467,7 @@ define i16 @bts_16_load(ptr %x, i16 %n) {
; X86-LABEL: bts_16_load:
; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl $1, %eax
; X86-NEXT: shll %cl, %eax
; X86-NEXT: orw (%edx), %ax
@ -493,7 +493,7 @@ define i16 @btc_16_load(ptr %x, i16 %n) {
; X86-LABEL: btc_16_load:
; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl $1, %eax
; X86-NEXT: shll %cl, %eax
; X86-NEXT: xorw (%edx), %ax
@ -514,7 +514,7 @@ define i32 @btr_32_load(ptr %x, i32 %n) {
;
; X86-LABEL: btr_32_load:
; X86: # %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl (%eax), %eax
; X86-NEXT: btrl %ecx, %eax
@ -535,7 +535,7 @@ define i32 @bts_32_load(ptr %x, i32 %n) {
;
; X86-LABEL: bts_32_load:
; X86: # %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl (%eax), %eax
; X86-NEXT: btsl %ecx, %eax
@ -555,7 +555,7 @@ define i32 @btc_32_load(ptr %x, i32 %n) {
;
; X86-LABEL: btc_32_load:
; X86: # %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl (%eax), %eax
; X86-NEXT: btcl %ecx, %eax
@ -579,7 +579,7 @@ define i64 @btr_64_load(ptr %x, i64 %n) {
; X86-NEXT: .cfi_def_cfa_offset 8
; X86-NEXT: .cfi_offset %esi, -8
; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl $1, %eax
; X86-NEXT: xorl %edx, %edx
; X86-NEXT: shldl %cl, %eax, %edx
@ -617,7 +617,7 @@ define i64 @bts_64_load(ptr %x, i64 %n) {
; X86-NEXT: .cfi_def_cfa_offset 8
; X86-NEXT: .cfi_offset %esi, -8
; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl $1, %eax
; X86-NEXT: xorl %edx, %edx
; X86-NEXT: shldl %cl, %eax, %edx
@ -652,7 +652,7 @@ define i64 @btc_64_load(ptr %x, i64 %n) {
; X86-NEXT: .cfi_def_cfa_offset 8
; X86-NEXT: .cfi_offset %esi, -8
; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl $1, %eax
; X86-NEXT: xorl %edx, %edx
; X86-NEXT: shldl %cl, %eax, %edx
@ -691,7 +691,7 @@ define void @btr_16_dont_fold(ptr %x, i16 %n) {
; X86-LABEL: btr_16_dont_fold:
; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movw $-2, %dx
; X86-NEXT: rolw %cl, %dx
; X86-NEXT: andw %dx, (%eax)
@ -717,7 +717,7 @@ define void @bts_16_dont_fold(ptr %x, i16 %n) {
; X86-LABEL: bts_16_dont_fold:
; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl $1, %edx
; X86-NEXT: shll %cl, %edx
; X86-NEXT: orw %dx, (%eax)
@ -742,7 +742,7 @@ define void @btc_16_dont_fold(ptr %x, i16 %n) {
; X86-LABEL: btc_16_dont_fold:
; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl $1, %edx
; X86-NEXT: shll %cl, %edx
; X86-NEXT: xorw %dx, (%eax)
@ -767,7 +767,7 @@ define void @btr_32_dont_fold(ptr %x, i32 %n) {
; X86-LABEL: btr_32_dont_fold:
; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl $-2, %edx
; X86-NEXT: roll %cl, %edx
; X86-NEXT: andl %edx, (%eax)
@ -793,7 +793,7 @@ define void @bts_32_dont_fold(ptr %x, i32 %n) {
; X86-LABEL: bts_32_dont_fold:
; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl $1, %edx
; X86-NEXT: shll %cl, %edx
; X86-NEXT: orl %edx, (%eax)
@ -818,7 +818,7 @@ define void @btc_32_dont_fold(ptr %x, i32 %n) {
; X86-LABEL: btc_32_dont_fold:
; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl $1, %edx
; X86-NEXT: shll %cl, %edx
; X86-NEXT: xorl %edx, (%eax)
@ -846,7 +846,7 @@ define void @btr_64_dont_fold(ptr %x, i64 %n) {
; X86-NEXT: .cfi_def_cfa_offset 8
; X86-NEXT: .cfi_offset %esi, -8
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl $1, %edx
; X86-NEXT: xorl %esi, %esi
; X86-NEXT: shldl %cl, %edx, %esi
@ -888,7 +888,7 @@ define void @bts_64_dont_fold(ptr %x, i64 %n) {
; X86-NEXT: .cfi_def_cfa_offset 8
; X86-NEXT: .cfi_offset %esi, -8
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl $1, %edx
; X86-NEXT: xorl %esi, %esi
; X86-NEXT: shldl %cl, %edx, %esi
@ -927,7 +927,7 @@ define void @btc_64_dont_fold(ptr %x, i64 %n) {
; X86-NEXT: .cfi_def_cfa_offset 8
; X86-NEXT: .cfi_offset %esi, -8
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl $1, %edx
; X86-NEXT: xorl %esi, %esi
; X86-NEXT: shldl %cl, %edx, %esi
@ -960,7 +960,7 @@ define i32 @btr_32_mask_zeros(i32 %x, i32 %n) {
;
; X86-LABEL: btr_32_mask_zeros:
; X86: # %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: shlb $2, %cl
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: btrl %ecx, %eax
@ -983,7 +983,7 @@ define i32 @bts_32_mask_zeros(i32 %x, i32 %n) {
;
; X86-LABEL: bts_32_mask_zeros:
; X86: # %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: shlb $2, %cl
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: btsl %ecx, %eax
@ -1005,7 +1005,7 @@ define i32 @btc_32_mask_zeros(i32 %x, i32 %n) {
;
; X86-LABEL: btc_32_mask_zeros:
; X86: # %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: shlb $2, %cl
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: btcl %ecx, %eax

14
llvm/test/CodeGen/X86/byval5.ll
View File

@ -38,14 +38,14 @@ define void @g(i8 signext %a1, i8 signext %a2, i8 signext %a3, i8 signext %a
; X64-NEXT: movq %rsp, %rdi
; X64-NEXT: movq %rbx, %rsi
; X64-NEXT: rep;movsq (%rsi), %es:(%rdi)
; X64-NEXT: movb {{[0-9]+}}(%rsp), %al
; X64-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; X64-NEXT: movb %al, {{[0-9]+}}(%rsp)
; X64-NEXT: callq f@PLT
; X64-NEXT: movl $16, %ecx
; X64-NEXT: movq %rsp, %rdi
; X64-NEXT: movq %rbx, %rsi
; X64-NEXT: rep;movsq (%rsi), %es:(%rdi)
; X64-NEXT: movb {{[0-9]+}}(%rsp), %al
; X64-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; X64-NEXT: movb %al, {{[0-9]+}}(%rsp)
; X64-NEXT: callq f@PLT
; X64-NEXT: addq $272, %rsp # imm = 0x110
@ -61,9 +61,9 @@ define void @g(i8 signext %a1, i8 signext %a2, i8 signext %a3, i8 signext %a
; X86-NEXT: pushl %esi
; X86-NEXT: andl $-8, %esp
; X86-NEXT: subl $272, %esp # imm = 0x110
; X86-NEXT: movb 28(%ebp), %al
; X86-NEXT: movb 24(%ebp), %cl
; X86-NEXT: movb 20(%ebp), %dl
; X86-NEXT: movzbl 28(%ebp), %eax
; X86-NEXT: movzbl 24(%ebp), %ecx
; X86-NEXT: movzbl 20(%ebp), %edx
; X86-NEXT: movb 16(%ebp), %ah
; X86-NEXT: movb 12(%ebp), %ch
; X86-NEXT: movb 8(%ebp), %dh
@ -78,14 +78,14 @@ define void @g(i8 signext %a1, i8 signext %a2, i8 signext %a3, i8 signext %a
; X86-NEXT: movl %esp, %edi
; X86-NEXT: movl %ebx, %esi
; X86-NEXT: rep;movsl (%esi), %es:(%edi)
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movb %al, {{[0-9]+}}(%esp)
; X86-NEXT: calll f@PLT
; X86-NEXT: movl $32, %ecx
; X86-NEXT: movl %esp, %edi
; X86-NEXT: movl %ebx, %esi
; X86-NEXT: rep;movsl (%esi), %es:(%edi)
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movb %al, {{[0-9]+}}(%esp)
; X86-NEXT: calll f@PLT
; X86-NEXT: leal -12(%ebp), %esp

2
llvm/test/CodeGen/X86/callbr-asm-instr-scheduling.ll
View File

@ -26,7 +26,7 @@ define i64 @early_ioremap_pmd(i64 %addr) {
; CHECK-NEXT: #NO_APP
; CHECK-NEXT: movabsq $9223372036854771712, %rdx # imm = 0x7FFFFFFFFFFFF000
; CHECK-NEXT: andq %rax, %rdx
; CHECK-NEXT: movb pgdir_shift(%rip), %al
; CHECK-NEXT: movzbl pgdir_shift(%rip), %eax
; CHECK-NEXT: movq page_offset_base(%rip), %rcx
; CHECK-NEXT: shrxq %rax, %rdi, %rax
; CHECK-NEXT: addq %rcx, %rdx

104
llvm/test/CodeGen/X86/clear-highbits.ll
View File

@ -24,8 +24,8 @@
define i8 @clear_highbits8_c0(i8 %val, i8 %numhighbits) nounwind {
; X86-LABEL: clear_highbits8_c0:
; X86: # %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: shlb %cl, %al
; X86-NEXT: shrb %cl, %al
; X86-NEXT: retl
@ -47,9 +47,9 @@ define i8 @clear_highbits8_c0(i8 %val, i8 %numhighbits) nounwind {
define i8 @clear_highbits8_c2_load(ptr %w, i8 %numhighbits) nounwind {
; X86-LABEL: clear_highbits8_c2_load:
; X86: # %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movb (%eax), %al
; X86-NEXT: movzbl (%eax), %eax
; X86-NEXT: shlb %cl, %al
; X86-NEXT: shrb %cl, %al
; X86-NEXT: retl
@ -57,7 +57,7 @@ define i8 @clear_highbits8_c2_load(ptr %w, i8 %numhighbits) nounwind {
; X64-LABEL: clear_highbits8_c2_load:
; X64: # %bb.0:
; X64-NEXT: movl %esi, %ecx
; X64-NEXT: movb (%rdi), %al
; X64-NEXT: movzbl (%rdi), %eax
; X64-NEXT: shlb %cl, %al
; X64-NEXT: # kill: def $cl killed $cl killed $ecx
; X64-NEXT: shrb %cl, %al
@ -71,8 +71,8 @@ define i8 @clear_highbits8_c2_load(ptr %w, i8 %numhighbits) nounwind {
define i8 @clear_highbits8_c4_commutative(i8 %val, i8 %numhighbits) nounwind {
; X86-LABEL: clear_highbits8_c4_commutative:
; X86: # %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: shlb %cl, %al
; X86-NEXT: shrb %cl, %al
; X86-NEXT: retl
@ -98,7 +98,7 @@ define i8 @clear_highbits8_c4_commutative(i8 %val, i8 %numhighbits) nounwind {
define i16 @clear_highbits16_c0(i16 %val, i16 %numhighbits) nounwind {
; X86-NOBMI2-LABEL: clear_highbits16_c0:
; X86-NOBMI2: # %bb.0:
; X86-NOBMI2-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NOBMI2-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NOBMI2-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NOBMI2-NEXT: shll %cl, %eax
; X86-NOBMI2-NEXT: movzwl %ax, %eax
@ -108,7 +108,7 @@ define i16 @clear_highbits16_c0(i16 %val, i16 %numhighbits) nounwind {
;
; X86-BMI2-LABEL: clear_highbits16_c0:
; X86-BMI2: # %bb.0:
; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-BMI2-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-BMI2-NEXT: shlxl %eax, {{[0-9]+}}(%esp), %ecx
; X86-BMI2-NEXT: movzwl %cx, %ecx
; X86-BMI2-NEXT: shrxl %eax, %ecx, %eax
@ -140,7 +140,7 @@ define i16 @clear_highbits16_c0(i16 %val, i16 %numhighbits) nounwind {
define i16 @clear_highbits16_c1_indexzext(i16 %val, i8 %numhighbits) nounwind {
; X86-NOBMI2-LABEL: clear_highbits16_c1_indexzext:
; X86-NOBMI2: # %bb.0:
; X86-NOBMI2-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NOBMI2-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NOBMI2-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NOBMI2-NEXT: shll %cl, %eax
; X86-NOBMI2-NEXT: movzwl %ax, %eax
@ -150,7 +150,7 @@ define i16 @clear_highbits16_c1_indexzext(i16 %val, i8 %numhighbits) nounwind {
;
; X86-BMI2-LABEL: clear_highbits16_c1_indexzext:
; X86-BMI2: # %bb.0:
; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-BMI2-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-BMI2-NEXT: shlxl %eax, {{[0-9]+}}(%esp), %ecx
; X86-BMI2-NEXT: movzwl %cx, %ecx
; X86-BMI2-NEXT: shrxl %eax, %ecx, %eax
@ -183,7 +183,7 @@ define i16 @clear_highbits16_c1_indexzext(i16 %val, i8 %numhighbits) nounwind {
define i16 @clear_highbits16_c2_load(ptr %w, i16 %numhighbits) nounwind {
; X86-NOBMI2-LABEL: clear_highbits16_c2_load:
; X86-NOBMI2: # %bb.0:
; X86-NOBMI2-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NOBMI2-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NOBMI2-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NOBMI2-NEXT: movzwl (%eax), %eax
; X86-NOBMI2-NEXT: shll %cl, %eax
@ -194,7 +194,7 @@ define i16 @clear_highbits16_c2_load(ptr %w, i16 %numhighbits) nounwind {
;
; X86-BMI2-LABEL: clear_highbits16_c2_load:
; X86-BMI2: # %bb.0:
; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-BMI2-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-BMI2-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-BMI2-NEXT: movzwl (%ecx), %ecx
; X86-BMI2-NEXT: shlxl %eax, %ecx, %ecx
@ -231,7 +231,7 @@ define i16 @clear_highbits16_c2_load(ptr %w, i16 %numhighbits) nounwind {
define i16 @clear_highbits16_c3_load_indexzext(ptr %w, i8 %numhighbits) nounwind {
; X86-NOBMI2-LABEL: clear_highbits16_c3_load_indexzext:
; X86-NOBMI2: # %bb.0:
; X86-NOBMI2-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NOBMI2-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NOBMI2-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NOBMI2-NEXT: movzwl (%eax), %eax
; X86-NOBMI2-NEXT: shll %cl, %eax
@ -242,7 +242,7 @@ define i16 @clear_highbits16_c3_load_indexzext(ptr %w, i8 %numhighbits) nounwind
;
; X86-BMI2-LABEL: clear_highbits16_c3_load_indexzext:
; X86-BMI2: # %bb.0:
; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-BMI2-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-BMI2-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-BMI2-NEXT: movzwl (%ecx), %ecx
; X86-BMI2-NEXT: shlxl %eax, %ecx, %ecx
@ -280,7 +280,7 @@ define i16 @clear_highbits16_c3_load_indexzext(ptr %w, i8 %numhighbits) nounwind
define i16 @clear_highbits16_c4_commutative(i16 %val, i16 %numhighbits) nounwind {
; X86-NOBMI2-LABEL: clear_highbits16_c4_commutative:
; X86-NOBMI2: # %bb.0:
; X86-NOBMI2-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NOBMI2-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NOBMI2-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NOBMI2-NEXT: shll %cl, %eax
; X86-NOBMI2-NEXT: movzwl %ax, %eax
@ -290,7 +290,7 @@ define i16 @clear_highbits16_c4_commutative(i16 %val, i16 %numhighbits) nounwind
;
; X86-BMI2-LABEL: clear_highbits16_c4_commutative:
; X86-BMI2: # %bb.0:
; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-BMI2-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-BMI2-NEXT: shlxl %eax, {{[0-9]+}}(%esp), %ecx
; X86-BMI2-NEXT: movzwl %cx, %ecx
; X86-BMI2-NEXT: shrxl %eax, %ecx, %eax
@ -326,7 +326,7 @@ define i16 @clear_highbits16_c4_commutative(i16 %val, i16 %numhighbits) nounwind
define i32 @clear_highbits32_c0(i32 %val, i32 %numhighbits) nounwind {
; X86-NOBMI2-LABEL: clear_highbits32_c0:
; X86-NOBMI2: # %bb.0:
; X86-NOBMI2-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NOBMI2-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NOBMI2-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NOBMI2-NEXT: shll %cl, %eax
; X86-NOBMI2-NEXT: shrl %cl, %eax
@ -334,7 +334,7 @@ define i32 @clear_highbits32_c0(i32 %val, i32 %numhighbits) nounwind {
;
; X86-BMI2-LABEL: clear_highbits32_c0:
; X86-BMI2: # %bb.0:
; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-BMI2-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-BMI2-NEXT: movl $32, %ecx
; X86-BMI2-NEXT: subl %eax, %ecx
; X86-BMI2-NEXT: bzhil %ecx, {{[0-9]+}}(%esp), %eax
@ -363,7 +363,7 @@ define i32 @clear_highbits32_c0(i32 %val, i32 %numhighbits) nounwind {
define i32 @clear_highbits32_c1_indexzext(i32 %val, i8 %numhighbits) nounwind {
; X86-NOBMI2-LABEL: clear_highbits32_c1_indexzext:
; X86-NOBMI2: # %bb.0:
; X86-NOBMI2-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NOBMI2-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NOBMI2-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NOBMI2-NEXT: shll %cl, %eax
; X86-NOBMI2-NEXT: shrl %cl, %eax
@ -371,7 +371,7 @@ define i32 @clear_highbits32_c1_indexzext(i32 %val, i8 %numhighbits) nounwind {
;
; X86-BMI2-LABEL: clear_highbits32_c1_indexzext:
; X86-BMI2: # %bb.0:
; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-BMI2-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-BMI2-NEXT: movl $32, %ecx
; X86-BMI2-NEXT: subl %eax, %ecx
; X86-BMI2-NEXT: bzhil %ecx, {{[0-9]+}}(%esp), %eax
@ -401,7 +401,7 @@ define i32 @clear_highbits32_c1_indexzext(i32 %val, i8 %numhighbits) nounwind {
define i32 @clear_highbits32_c2_load(ptr %w, i32 %numhighbits) nounwind {
; X86-NOBMI2-LABEL: clear_highbits32_c2_load:
; X86-NOBMI2: # %bb.0:
; X86-NOBMI2-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NOBMI2-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NOBMI2-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NOBMI2-NEXT: movl (%eax), %eax
; X86-NOBMI2-NEXT: shll %cl, %eax
@ -411,7 +411,7 @@ define i32 @clear_highbits32_c2_load(ptr %w, i32 %numhighbits) nounwind {
; X86-BMI2-LABEL: clear_highbits32_c2_load:
; X86-BMI2: # %bb.0:
; X86-BMI2-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-BMI2-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-BMI2-NEXT: movl $32, %edx
; X86-BMI2-NEXT: subl %ecx, %edx
; X86-BMI2-NEXT: bzhil %edx, (%eax), %eax
@ -441,7 +441,7 @@ define i32 @clear_highbits32_c2_load(ptr %w, i32 %numhighbits) nounwind {
define i32 @clear_highbits32_c3_load_indexzext(ptr %w, i8 %numhighbits) nounwind {
; X86-NOBMI2-LABEL: clear_highbits32_c3_load_indexzext:
; X86-NOBMI2: # %bb.0:
; X86-NOBMI2-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NOBMI2-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NOBMI2-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NOBMI2-NEXT: movl (%eax), %eax
; X86-NOBMI2-NEXT: shll %cl, %eax
@ -451,7 +451,7 @@ define i32 @clear_highbits32_c3_load_indexzext(ptr %w, i8 %numhighbits) nounwind
; X86-BMI2-LABEL: clear_highbits32_c3_load_indexzext:
; X86-BMI2: # %bb.0:
; X86-BMI2-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-BMI2-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-BMI2-NEXT: movl $32, %edx
; X86-BMI2-NEXT: subl %ecx, %edx
; X86-BMI2-NEXT: bzhil %edx, (%eax), %eax
@ -482,7 +482,7 @@ define i32 @clear_highbits32_c3_load_indexzext(ptr %w, i8 %numhighbits) nounwind
define i32 @clear_highbits32_c4_commutative(i32 %val, i32 %numhighbits) nounwind {
; X86-NOBMI2-LABEL: clear_highbits32_c4_commutative:
; X86-NOBMI2: # %bb.0:
; X86-NOBMI2-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NOBMI2-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NOBMI2-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NOBMI2-NEXT: shll %cl, %eax
; X86-NOBMI2-NEXT: shrl %cl, %eax
@ -490,7 +490,7 @@ define i32 @clear_highbits32_c4_commutative(i32 %val, i32 %numhighbits) nounwind
;
; X86-BMI2-LABEL: clear_highbits32_c4_commutative:
; X86-BMI2: # %bb.0:
; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-BMI2-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-BMI2-NEXT: movl $32, %ecx
; X86-BMI2-NEXT: subl %eax, %ecx
; X86-BMI2-NEXT: bzhil %ecx, {{[0-9]+}}(%esp), %eax
@ -524,7 +524,7 @@ define i64 @clear_highbits64_c0(i64 %val, i64 %numhighbits) nounwind {
; X86-BASELINE-LABEL: clear_highbits64_c0:
; X86-BASELINE: # %bb.0:
; X86-BASELINE-NEXT: pushl %esi
; X86-BASELINE-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-BASELINE-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-BASELINE-NEXT: movl $-1, %eax
; X86-BASELINE-NEXT: movl $-1, %esi
; X86-BASELINE-NEXT: shrl %cl, %esi
@ -545,7 +545,7 @@ define i64 @clear_highbits64_c0(i64 %val, i64 %numhighbits) nounwind {
; X86-BMI1-LABEL: clear_highbits64_c0:
; X86-BMI1: # %bb.0:
; X86-BMI1-NEXT: pushl %esi
; X86-BMI1-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-BMI1-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-BMI1-NEXT: movl $-1, %esi
; X86-BMI1-NEXT: movl $-1, %eax
; X86-BMI1-NEXT: shrl %cl, %eax
@ -561,7 +561,7 @@ define i64 @clear_highbits64_c0(i64 %val, i64 %numhighbits) nounwind {
; X86-BMI2-LABEL: clear_highbits64_c0:
; X86-BMI2: # %bb.0:
; X86-BMI2-NEXT: pushl %esi
; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-BMI2-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-BMI2-NEXT: movl $-1, %eax
; X86-BMI2-NEXT: shrxl %ecx, %eax, %esi
; X86-BMI2-NEXT: xorl %edx, %edx
@ -597,7 +597,7 @@ define i64 @clear_highbits64_c1_indexzext(i64 %val, i8 %numhighbits) nounwind {
; X86-BASELINE-LABEL: clear_highbits64_c1_indexzext:
; X86-BASELINE: # %bb.0:
; X86-BASELINE-NEXT: pushl %esi
; X86-BASELINE-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-BASELINE-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-BASELINE-NEXT: movl $-1, %eax
; X86-BASELINE-NEXT: movl $-1, %esi
; X86-BASELINE-NEXT: shrl %cl, %esi
@ -618,7 +618,7 @@ define i64 @clear_highbits64_c1_indexzext(i64 %val, i8 %numhighbits) nounwind {
; X86-BMI1-LABEL: clear_highbits64_c1_indexzext:
; X86-BMI1: # %bb.0:
; X86-BMI1-NEXT: pushl %esi
; X86-BMI1-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-BMI1-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-BMI1-NEXT: movl $-1, %esi
; X86-BMI1-NEXT: movl $-1, %eax
; X86-BMI1-NEXT: shrl %cl, %eax
@ -634,7 +634,7 @@ define i64 @clear_highbits64_c1_indexzext(i64 %val, i8 %numhighbits) nounwind {
; X86-BMI2-LABEL: clear_highbits64_c1_indexzext:
; X86-BMI2: # %bb.0:
; X86-BMI2-NEXT: pushl %esi
; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-BMI2-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-BMI2-NEXT: movl $-1, %eax
; X86-BMI2-NEXT: shrxl %ecx, %eax, %esi
; X86-BMI2-NEXT: xorl %edx, %edx
@ -673,7 +673,7 @@ define i64 @clear_highbits64_c2_load(ptr %w, i64 %numhighbits) nounwind {
; X86-BASELINE-NEXT: pushl %edi
; X86-BASELINE-NEXT: pushl %esi
; X86-BASELINE-NEXT: movl {{[0-9]+}}(%esp), %esi
; X86-BASELINE-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-BASELINE-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-BASELINE-NEXT: movl $-1, %eax
; X86-BASELINE-NEXT: movl $-1, %edi
; X86-BASELINE-NEXT: shrl %cl, %edi
@ -697,7 +697,7 @@ define i64 @clear_highbits64_c2_load(ptr %w, i64 %numhighbits) nounwind {
; X86-BMI1-NEXT: pushl %edi
; X86-BMI1-NEXT: pushl %esi
; X86-BMI1-NEXT: movl {{[0-9]+}}(%esp), %esi
; X86-BMI1-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-BMI1-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-BMI1-NEXT: movl $-1, %edi
; X86-BMI1-NEXT: movl $-1, %eax
; X86-BMI1-NEXT: shrl %cl, %eax
@ -716,7 +716,7 @@ define i64 @clear_highbits64_c2_load(ptr %w, i64 %numhighbits) nounwind {
; X86-BMI2-NEXT: pushl %ebx
; X86-BMI2-NEXT: pushl %esi
; X86-BMI2-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %bl
; X86-BMI2-NEXT: movzbl {{[0-9]+}}(%esp), %ebx
; X86-BMI2-NEXT: movl $-1, %eax
; X86-BMI2-NEXT: shrxl %ebx, %eax, %esi
; X86-BMI2-NEXT: xorl %edx, %edx
@ -756,7 +756,7 @@ define i64 @clear_highbits64_c3_load_indexzext(ptr %w, i8 %numhighbits) nounwind
; X86-BASELINE-NEXT: pushl %edi
; X86-BASELINE-NEXT: pushl %esi
; X86-BASELINE-NEXT: movl {{[0-9]+}}(%esp), %esi
; X86-BASELINE-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-BASELINE-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-BASELINE-NEXT: movl $-1, %eax
; X86-BASELINE-NEXT: movl $-1, %edi
; X86-BASELINE-NEXT: shrl %cl, %edi
@ -780,7 +780,7 @@ define i64 @clear_highbits64_c3_load_indexzext(ptr %w, i8 %numhighbits) nounwind
; X86-BMI1-NEXT: pushl %edi
; X86-BMI1-NEXT: pushl %esi
; X86-BMI1-NEXT: movl {{[0-9]+}}(%esp), %esi
; X86-BMI1-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-BMI1-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-BMI1-NEXT: movl $-1, %edi
; X86-BMI1-NEXT: movl $-1, %eax
; X86-BMI1-NEXT: shrl %cl, %eax
@ -799,7 +799,7 @@ define i64 @clear_highbits64_c3_load_indexzext(ptr %w, i8 %numhighbits) nounwind
; X86-BMI2-NEXT: pushl %ebx
; X86-BMI2-NEXT: pushl %esi
; X86-BMI2-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %bl
; X86-BMI2-NEXT: movzbl {{[0-9]+}}(%esp), %ebx
; X86-BMI2-NEXT: movl $-1, %eax
; X86-BMI2-NEXT: shrxl %ebx, %eax, %esi
; X86-BMI2-NEXT: xorl %edx, %edx
@ -838,7 +838,7 @@ define i64 @clear_highbits64_c4_commutative(i64 %val, i64 %numhighbits) nounwind
; X86-BASELINE-LABEL: clear_highbits64_c4_commutative:
; X86-BASELINE: # %bb.0:
; X86-BASELINE-NEXT: pushl %esi
; X86-BASELINE-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-BASELINE-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-BASELINE-NEXT: movl $-1, %eax
; X86-BASELINE-NEXT: movl $-1, %esi
; X86-BASELINE-NEXT: shrl %cl, %esi
@ -859,7 +859,7 @@ define i64 @clear_highbits64_c4_commutative(i64 %val, i64 %numhighbits) nounwind
; X86-BMI1-LABEL: clear_highbits64_c4_commutative:
; X86-BMI1: # %bb.0:
; X86-BMI1-NEXT: pushl %esi
; X86-BMI1-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-BMI1-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-BMI1-NEXT: movl $-1, %esi
; X86-BMI1-NEXT: movl $-1, %eax
; X86-BMI1-NEXT: shrl %cl, %eax
@ -875,7 +875,7 @@ define i64 @clear_highbits64_c4_commutative(i64 %val, i64 %numhighbits) nounwind
; X86-BMI2-LABEL: clear_highbits64_c4_commutative:
; X86-BMI2: # %bb.0:
; X86-BMI2-NEXT: pushl %esi
; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-BMI2-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-BMI2-NEXT: movl $-1, %eax
; X86-BMI2-NEXT: shrxl %ecx, %eax, %esi
; X86-BMI2-NEXT: xorl %edx, %edx
@ -915,7 +915,7 @@ define i32 @oneuse32_c(i32 %val, i32 %numhighbits, ptr %escape) nounwind {
; X86-NOBMI2-LABEL: oneuse32_c:
; X86-NOBMI2: # %bb.0:
; X86-NOBMI2-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NOBMI2-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NOBMI2-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NOBMI2-NEXT: movl $-1, %eax
; X86-NOBMI2-NEXT: shrl %cl, %eax
; X86-NOBMI2-NEXT: movl %eax, (%edx)
@ -925,7 +925,7 @@ define i32 @oneuse32_c(i32 %val, i32 %numhighbits, ptr %escape) nounwind {
; X86-BMI2-LABEL: oneuse32_c:
; X86-BMI2: # %bb.0:
; X86-BMI2-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-BMI2-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-BMI2-NEXT: movl $-1, %edx
; X86-BMI2-NEXT: shrxl %eax, %edx, %eax
; X86-BMI2-NEXT: movl %eax, (%ecx)
@ -960,7 +960,7 @@ define i64 @oneuse64_c(i64 %val, i64 %numhighbits, ptr %escape) nounwind {
; X86-BASELINE: # %bb.0:
; X86-BASELINE-NEXT: pushl %esi
; X86-BASELINE-NEXT: movl {{[0-9]+}}(%esp), %esi
; X86-BASELINE-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-BASELINE-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-BASELINE-NEXT: movl $-1, %eax
; X86-BASELINE-NEXT: movl $-1, %edx
; X86-BASELINE-NEXT: shrl %cl, %edx
@ -982,7 +982,7 @@ define i64 @oneuse64_c(i64 %val, i64 %numhighbits, ptr %escape) nounwind {
; X86-BMI1-NEXT: pushl %edi
; X86-BMI1-NEXT: pushl %esi
; X86-BMI1-NEXT: movl {{[0-9]+}}(%esp), %esi
; X86-BMI1-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-BMI1-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-BMI1-NEXT: movl $-1, %eax
; X86-BMI1-NEXT: movl $-1, %edi
; X86-BMI1-NEXT: shrl %cl, %edi
@ -1003,7 +1003,7 @@ define i64 @oneuse64_c(i64 %val, i64 %numhighbits, ptr %escape) nounwind {
; X86-BMI2-NEXT: pushl %ebx
; X86-BMI2-NEXT: pushl %esi
; X86-BMI2-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %bl
; X86-BMI2-NEXT: movzbl {{[0-9]+}}(%esp), %ebx
; X86-BMI2-NEXT: movl $-1, %eax
; X86-BMI2-NEXT: shrxl %ebx, %eax, %esi
; X86-BMI2-NEXT: xorl %edx, %edx
@ -1045,7 +1045,7 @@ define i32 @oneuse32_d(i32 %val, i32 %numhighbits, ptr %escape) nounwind {
; X86-NOBMI2-LABEL: oneuse32_d:
; X86-NOBMI2: # %bb.0:
; X86-NOBMI2-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NOBMI2-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NOBMI2-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NOBMI2-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NOBMI2-NEXT: shll %cl, %eax
; X86-NOBMI2-NEXT: movl %eax, (%edx)
@ -1055,7 +1055,7 @@ define i32 @oneuse32_d(i32 %val, i32 %numhighbits, ptr %escape) nounwind {
; X86-BMI2-LABEL: oneuse32_d:
; X86-BMI2: # %bb.0:
; X86-BMI2-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-BMI2-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-BMI2-NEXT: shlxl %ecx, {{[0-9]+}}(%esp), %edx
; X86-BMI2-NEXT: movl %edx, (%eax)
; X86-BMI2-NEXT: shrxl %ecx, %edx, %eax
@ -1089,7 +1089,7 @@ define i64 @oneusei64_d(i64 %val, i64 %numhighbits, ptr %escape) nounwind {
; X86-BASELINE-NEXT: pushl %ebx
; X86-BASELINE-NEXT: pushl %edi
; X86-BASELINE-NEXT: pushl %esi
; X86-BASELINE-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-BASELINE-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-BASELINE-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-BASELINE-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-BASELINE-NEXT: movl %edx, %edi
@ -1131,7 +1131,7 @@ define i64 @oneusei64_d(i64 %val, i64 %numhighbits, ptr %escape) nounwind {
; X86-BMI1-NEXT: pushl %ebx
; X86-BMI1-NEXT: pushl %edi
; X86-BMI1-NEXT: pushl %esi
; X86-BMI1-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-BMI1-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-BMI1-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-BMI1-NEXT: movl {{[0-9]+}}(%esp), %esi
; X86-BMI1-NEXT: movl %edx, %eax
@ -1161,7 +1161,7 @@ define i64 @oneusei64_d(i64 %val, i64 %numhighbits, ptr %escape) nounwind {
; X86-BMI2-NEXT: pushl %ebx
; X86-BMI2-NEXT: pushl %edi
; X86-BMI2-NEXT: pushl %esi
; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-BMI2-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-BMI2-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-BMI2-NEXT: movl {{[0-9]+}}(%esp), %esi
; X86-BMI2-NEXT: shldl %cl, %eax, %esi

90
llvm/test/CodeGen/X86/clear-lowbits.ll
View File

@ -26,8 +26,8 @@
define i8 @clear_lowbits8_c0(i8 %val, i8 %numlowbits) nounwind {
; X86-LABEL: clear_lowbits8_c0:
; X86: # %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: shrb %cl, %al
; X86-NEXT: shlb %cl, %al
; X86-NEXT: retl
@ -49,9 +49,9 @@ define i8 @clear_lowbits8_c0(i8 %val, i8 %numlowbits) nounwind {
define i8 @clear_lowbits8_c2_load(ptr %w, i8 %numlowbits) nounwind {
; X86-LABEL: clear_lowbits8_c2_load:
; X86: # %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movb (%eax), %al
; X86-NEXT: movzbl (%eax), %eax
; X86-NEXT: shrb %cl, %al
; X86-NEXT: shlb %cl, %al
; X86-NEXT: retl
@ -59,7 +59,7 @@ define i8 @clear_lowbits8_c2_load(ptr %w, i8 %numlowbits) nounwind {
; X64-LABEL: clear_lowbits8_c2_load:
; X64: # %bb.0:
; X64-NEXT: movl %esi, %ecx
; X64-NEXT: movb (%rdi), %al
; X64-NEXT: movzbl (%rdi), %eax
; X64-NEXT: shrb %cl, %al
; X64-NEXT: # kill: def $cl killed $cl killed $ecx
; X64-NEXT: shlb %cl, %al
@ -73,8 +73,8 @@ define i8 @clear_lowbits8_c2_load(ptr %w, i8 %numlowbits) nounwind {
define i8 @clear_lowbits8_c4_commutative(i8 %val, i8 %numlowbits) nounwind {
; X86-LABEL: clear_lowbits8_c4_commutative:
; X86: # %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: shrb %cl, %al
; X86-NEXT: shlb %cl, %al
; X86-NEXT: retl
@ -98,7 +98,7 @@ define i8 @clear_lowbits8_c4_commutative(i8 %val, i8 %numlowbits) nounwind {
define i16 @clear_lowbits16_c0(i16 %val, i16 %numlowbits) nounwind {
; X86-NOBMI2-LABEL: clear_lowbits16_c0:
; X86-NOBMI2: # %bb.0:
; X86-NOBMI2-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NOBMI2-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NOBMI2-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; X86-NOBMI2-NEXT: shrl %cl, %eax
; X86-NOBMI2-NEXT: shll %cl, %eax
@ -108,7 +108,7 @@ define i16 @clear_lowbits16_c0(i16 %val, i16 %numlowbits) nounwind {
; X86-BMI2-LABEL: clear_lowbits16_c0:
; X86-BMI2: # %bb.0:
; X86-BMI2-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-BMI2-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-BMI2-NEXT: shrxl %ecx, %eax, %eax
; X86-BMI2-NEXT: shlxl %ecx, %eax, %eax
; X86-BMI2-NEXT: # kill: def $ax killed $ax killed $eax
@ -139,7 +139,7 @@ define i16 @clear_lowbits16_c0(i16 %val, i16 %numlowbits) nounwind {
define i16 @clear_lowbits16_c1_indexzext(i16 %val, i8 %numlowbits) nounwind {
; X86-NOBMI2-LABEL: clear_lowbits16_c1_indexzext:
; X86-NOBMI2: # %bb.0:
; X86-NOBMI2-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NOBMI2-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NOBMI2-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; X86-NOBMI2-NEXT: shrl %cl, %eax
; X86-NOBMI2-NEXT: shll %cl, %eax
@ -149,7 +149,7 @@ define i16 @clear_lowbits16_c1_indexzext(i16 %val, i8 %numlowbits) nounwind {
; X86-BMI2-LABEL: clear_lowbits16_c1_indexzext:
; X86-BMI2: # %bb.0:
; X86-BMI2-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-BMI2-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-BMI2-NEXT: shrxl %ecx, %eax, %eax
; X86-BMI2-NEXT: shlxl %ecx, %eax, %eax
; X86-BMI2-NEXT: # kill: def $ax killed $ax killed $eax
@ -181,7 +181,7 @@ define i16 @clear_lowbits16_c1_indexzext(i16 %val, i8 %numlowbits) nounwind {
define i16 @clear_lowbits16_c2_load(ptr %w, i16 %numlowbits) nounwind {
; X86-NOBMI2-LABEL: clear_lowbits16_c2_load:
; X86-NOBMI2: # %bb.0:
; X86-NOBMI2-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NOBMI2-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NOBMI2-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NOBMI2-NEXT: movzwl (%eax), %eax
; X86-NOBMI2-NEXT: shrl %cl, %eax
@ -191,7 +191,7 @@ define i16 @clear_lowbits16_c2_load(ptr %w, i16 %numlowbits) nounwind {
;
; X86-BMI2-LABEL: clear_lowbits16_c2_load:
; X86-BMI2: # %bb.0:
; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-BMI2-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-BMI2-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-BMI2-NEXT: movzwl (%ecx), %ecx
; X86-BMI2-NEXT: shrxl %eax, %ecx, %ecx
@ -225,7 +225,7 @@ define i16 @clear_lowbits16_c2_load(ptr %w, i16 %numlowbits) nounwind {
define i16 @clear_lowbits16_c3_load_indexzext(ptr %w, i8 %numlowbits) nounwind {
; X86-NOBMI2-LABEL: clear_lowbits16_c3_load_indexzext:
; X86-NOBMI2: # %bb.0:
; X86-NOBMI2-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NOBMI2-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NOBMI2-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NOBMI2-NEXT: movzwl (%eax), %eax
; X86-NOBMI2-NEXT: shrl %cl, %eax
@ -235,7 +235,7 @@ define i16 @clear_lowbits16_c3_load_indexzext(ptr %w, i8 %numlowbits) nounwind {
;
; X86-BMI2-LABEL: clear_lowbits16_c3_load_indexzext:
; X86-BMI2: # %bb.0:
; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-BMI2-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-BMI2-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-BMI2-NEXT: movzwl (%ecx), %ecx
; X86-BMI2-NEXT: shrxl %eax, %ecx, %ecx
@ -270,7 +270,7 @@ define i16 @clear_lowbits16_c3_load_indexzext(ptr %w, i8 %numlowbits) nounwind {
define i16 @clear_lowbits16_c4_commutative(i16 %val, i16 %numlowbits) nounwind {
; X86-NOBMI2-LABEL: clear_lowbits16_c4_commutative:
; X86-NOBMI2: # %bb.0:
; X86-NOBMI2-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NOBMI2-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NOBMI2-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; X86-NOBMI2-NEXT: shrl %cl, %eax
; X86-NOBMI2-NEXT: shll %cl, %eax
@ -280,7 +280,7 @@ define i16 @clear_lowbits16_c4_commutative(i16 %val, i16 %numlowbits) nounwind {
; X86-BMI2-LABEL: clear_lowbits16_c4_commutative:
; X86-BMI2: # %bb.0:
; X86-BMI2-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-BMI2-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-BMI2-NEXT: shrxl %ecx, %eax, %eax
; X86-BMI2-NEXT: shlxl %ecx, %eax, %eax
; X86-BMI2-NEXT: # kill: def $ax killed $ax killed $eax
@ -313,7 +313,7 @@ define i16 @clear_lowbits16_c4_commutative(i16 %val, i16 %numlowbits) nounwind {
define i32 @clear_lowbits32_c0(i32 %val, i32 %numlowbits) nounwind {
; X86-NOBMI2-LABEL: clear_lowbits32_c0:
; X86-NOBMI2: # %bb.0:
; X86-NOBMI2-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NOBMI2-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NOBMI2-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NOBMI2-NEXT: shrl %cl, %eax
; X86-NOBMI2-NEXT: shll %cl, %eax
@ -321,7 +321,7 @@ define i32 @clear_lowbits32_c0(i32 %val, i32 %numlowbits) nounwind {
;
; X86-BMI2-LABEL: clear_lowbits32_c0:
; X86-BMI2: # %bb.0:
; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-BMI2-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-BMI2-NEXT: shrxl %eax, {{[0-9]+}}(%esp), %ecx
; X86-BMI2-NEXT: shlxl %eax, %ecx, %eax
; X86-BMI2-NEXT: retl
@ -348,7 +348,7 @@ define i32 @clear_lowbits32_c0(i32 %val, i32 %numlowbits) nounwind {
define i32 @clear_lowbits32_c1_indexzext(i32 %val, i8 %numlowbits) nounwind {
; X86-NOBMI2-LABEL: clear_lowbits32_c1_indexzext:
; X86-NOBMI2: # %bb.0:
; X86-NOBMI2-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NOBMI2-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NOBMI2-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NOBMI2-NEXT: shrl %cl, %eax
; X86-NOBMI2-NEXT: shll %cl, %eax
@ -356,7 +356,7 @@ define i32 @clear_lowbits32_c1_indexzext(i32 %val, i8 %numlowbits) nounwind {
;
; X86-BMI2-LABEL: clear_lowbits32_c1_indexzext:
; X86-BMI2: # %bb.0:
; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-BMI2-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-BMI2-NEXT: shrxl %eax, {{[0-9]+}}(%esp), %ecx
; X86-BMI2-NEXT: shlxl %eax, %ecx, %eax
; X86-BMI2-NEXT: retl
@ -384,7 +384,7 @@ define i32 @clear_lowbits32_c1_indexzext(i32 %val, i8 %numlowbits) nounwind {
define i32 @clear_lowbits32_c2_load(ptr %w, i32 %numlowbits) nounwind {
; X86-NOBMI2-LABEL: clear_lowbits32_c2_load:
; X86-NOBMI2: # %bb.0:
; X86-NOBMI2-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NOBMI2-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NOBMI2-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NOBMI2-NEXT: movl (%eax), %eax
; X86-NOBMI2-NEXT: shrl %cl, %eax
@ -394,7 +394,7 @@ define i32 @clear_lowbits32_c2_load(ptr %w, i32 %numlowbits) nounwind {
; X86-BMI2-LABEL: clear_lowbits32_c2_load:
; X86-BMI2: # %bb.0:
; X86-BMI2-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-BMI2-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-BMI2-NEXT: shrxl %ecx, (%eax), %eax
; X86-BMI2-NEXT: shlxl %ecx, %eax, %eax
; X86-BMI2-NEXT: retl
@ -422,7 +422,7 @@ define i32 @clear_lowbits32_c2_load(ptr %w, i32 %numlowbits) nounwind {
define i32 @clear_lowbits32_c3_load_indexzext(ptr %w, i8 %numlowbits) nounwind {
; X86-NOBMI2-LABEL: clear_lowbits32_c3_load_indexzext:
; X86-NOBMI2: # %bb.0:
; X86-NOBMI2-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NOBMI2-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NOBMI2-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NOBMI2-NEXT: movl (%eax), %eax
; X86-NOBMI2-NEXT: shrl %cl, %eax
@ -432,7 +432,7 @@ define i32 @clear_lowbits32_c3_load_indexzext(ptr %w, i8 %numlowbits) nounwind {
; X86-BMI2-LABEL: clear_lowbits32_c3_load_indexzext:
; X86-BMI2: # %bb.0:
; X86-BMI2-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-BMI2-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-BMI2-NEXT: shrxl %ecx, (%eax), %eax
; X86-BMI2-NEXT: shlxl %ecx, %eax, %eax
; X86-BMI2-NEXT: retl
@ -461,7 +461,7 @@ define i32 @clear_lowbits32_c3_load_indexzext(ptr %w, i8 %numlowbits) nounwind {
define i32 @clear_lowbits32_c4_commutative(i32 %val, i32 %numlowbits) nounwind {
; X86-NOBMI2-LABEL: clear_lowbits32_c4_commutative:
; X86-NOBMI2: # %bb.0:
; X86-NOBMI2-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NOBMI2-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NOBMI2-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NOBMI2-NEXT: shrl %cl, %eax
; X86-NOBMI2-NEXT: shll %cl, %eax
@ -469,7 +469,7 @@ define i32 @clear_lowbits32_c4_commutative(i32 %val, i32 %numlowbits) nounwind {
;
; X86-BMI2-LABEL: clear_lowbits32_c4_commutative:
; X86-BMI2: # %bb.0:
; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-BMI2-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-BMI2-NEXT: shrxl %eax, {{[0-9]+}}(%esp), %ecx
; X86-BMI2-NEXT: shlxl %eax, %ecx, %eax
; X86-BMI2-NEXT: retl
@ -498,7 +498,7 @@ define i32 @clear_lowbits32_c4_commutative(i32 %val, i32 %numlowbits) nounwind {
define i64 @clear_lowbits64_c0(i64 %val, i64 %numlowbits) nounwind {
; X86-NOBMI2-LABEL: clear_lowbits64_c0:
; X86-NOBMI2: # %bb.0:
; X86-NOBMI2-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NOBMI2-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NOBMI2-NEXT: movl $-1, %edx
; X86-NOBMI2-NEXT: movl $-1, %eax
; X86-NOBMI2-NEXT: shll %cl, %eax
@ -514,7 +514,7 @@ define i64 @clear_lowbits64_c0(i64 %val, i64 %numlowbits) nounwind {
;
; X86-BMI2-LABEL: clear_lowbits64_c0:
; X86-BMI2: # %bb.0:
; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-BMI2-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-BMI2-NEXT: movl $-1, %edx
; X86-BMI2-NEXT: shlxl %ecx, %edx, %eax
; X86-BMI2-NEXT: testb $32, %cl
@ -549,7 +549,7 @@ define i64 @clear_lowbits64_c0(i64 %val, i64 %numlowbits) nounwind {
define i64 @clear_lowbits64_c1_indexzext(i64 %val, i8 %numlowbits) nounwind {
; X86-NOBMI2-LABEL: clear_lowbits64_c1_indexzext:
; X86-NOBMI2: # %bb.0:
; X86-NOBMI2-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NOBMI2-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NOBMI2-NEXT: movl $-1, %edx
; X86-NOBMI2-NEXT: movl $-1, %eax
; X86-NOBMI2-NEXT: shll %cl, %eax
@ -565,7 +565,7 @@ define i64 @clear_lowbits64_c1_indexzext(i64 %val, i8 %numlowbits) nounwind {
;
; X86-BMI2-LABEL: clear_lowbits64_c1_indexzext:
; X86-BMI2: # %bb.0:
; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-BMI2-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-BMI2-NEXT: movl $-1, %edx
; X86-BMI2-NEXT: shlxl %ecx, %edx, %eax
; X86-BMI2-NEXT: testb $32, %cl
@ -604,7 +604,7 @@ define i64 @clear_lowbits64_c2_load(ptr %w, i64 %numlowbits) nounwind {
; X86-NOBMI2: # %bb.0:
; X86-NOBMI2-NEXT: pushl %esi
; X86-NOBMI2-NEXT: movl {{[0-9]+}}(%esp), %esi
; X86-NOBMI2-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NOBMI2-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NOBMI2-NEXT: movl $-1, %edx
; X86-NOBMI2-NEXT: movl $-1, %eax
; X86-NOBMI2-NEXT: shll %cl, %eax
@ -623,7 +623,7 @@ define i64 @clear_lowbits64_c2_load(ptr %w, i64 %numlowbits) nounwind {
; X86-BMI2: # %bb.0:
; X86-BMI2-NEXT: pushl %ebx
; X86-BMI2-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %bl
; X86-BMI2-NEXT: movzbl {{[0-9]+}}(%esp), %ebx
; X86-BMI2-NEXT: movl $-1, %edx
; X86-BMI2-NEXT: shlxl %ebx, %edx, %eax
; X86-BMI2-NEXT: testb $32, %bl
@ -662,7 +662,7 @@ define i64 @clear_lowbits64_c3_load_indexzext(ptr %w, i8 %numlowbits) nounwind {
; X86-NOBMI2: # %bb.0:
; X86-NOBMI2-NEXT: pushl %esi
; X86-NOBMI2-NEXT: movl {{[0-9]+}}(%esp), %esi
; X86-NOBMI2-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NOBMI2-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NOBMI2-NEXT: movl $-1, %edx
; X86-NOBMI2-NEXT: movl $-1, %eax
; X86-NOBMI2-NEXT: shll %cl, %eax
@ -681,7 +681,7 @@ define i64 @clear_lowbits64_c3_load_indexzext(ptr %w, i8 %numlowbits) nounwind {
; X86-BMI2: # %bb.0:
; X86-BMI2-NEXT: pushl %ebx
; X86-BMI2-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %bl
; X86-BMI2-NEXT: movzbl {{[0-9]+}}(%esp), %ebx
; X86-BMI2-NEXT: movl $-1, %edx
; X86-BMI2-NEXT: shlxl %ebx, %edx, %eax
; X86-BMI2-NEXT: testb $32, %bl
@ -720,7 +720,7 @@ define i64 @clear_lowbits64_c3_load_indexzext(ptr %w, i8 %numlowbits) nounwind {
define i64 @clear_lowbits64_c4_commutative(i64 %val, i64 %numlowbits) nounwind {
; X86-NOBMI2-LABEL: clear_lowbits64_c4_commutative:
; X86-NOBMI2: # %bb.0:
; X86-NOBMI2-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NOBMI2-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NOBMI2-NEXT: movl $-1, %edx
; X86-NOBMI2-NEXT: movl $-1, %eax
; X86-NOBMI2-NEXT: shll %cl, %eax
@ -736,7 +736,7 @@ define i64 @clear_lowbits64_c4_commutative(i64 %val, i64 %numlowbits) nounwind {
;
; X86-BMI2-LABEL: clear_lowbits64_c4_commutative:
; X86-BMI2: # %bb.0:
; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-BMI2-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-BMI2-NEXT: movl $-1, %edx
; X86-BMI2-NEXT: shlxl %ecx, %edx, %eax
; X86-BMI2-NEXT: testb $32, %cl
@ -777,7 +777,7 @@ define i64 @clear_lowbits64_c4_commutative(i64 %val, i64 %numlowbits) nounwind {
define i8 @clear_lowbits8_ic0(i8 %val, i8 %numlowbits) nounwind {
; X86-LABEL: clear_lowbits8_ic0:
; X86: # %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movb $8, %cl
; X86-NEXT: subb {{[0-9]+}}(%esp), %cl
; X86-NEXT: shrb %cl, %al
@ -803,7 +803,7 @@ define i8 @clear_lowbits8_ic2_load(ptr %w, i8 %numlowbits) nounwind {
; X86-LABEL: clear_lowbits8_ic2_load:
; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movb (%eax), %al
; X86-NEXT: movzbl (%eax), %eax
; X86-NEXT: movb $8, %cl
; X86-NEXT: subb {{[0-9]+}}(%esp), %cl
; X86-NEXT: shrb %cl, %al
@ -812,7 +812,7 @@ define i8 @clear_lowbits8_ic2_load(ptr %w, i8 %numlowbits) nounwind {
;
; X64-LABEL: clear_lowbits8_ic2_load:
; X64: # %bb.0:
; X64-NEXT: movb (%rdi), %al
; X64-NEXT: movzbl (%rdi), %eax
; X64-NEXT: movb $8, %cl
; X64-NEXT: subb %sil, %cl
; X64-NEXT: shrb %cl, %al
@ -828,7 +828,7 @@ define i8 @clear_lowbits8_ic2_load(ptr %w, i8 %numlowbits) nounwind {
define i8 @clear_lowbits8_ic4_commutative(i8 %val, i8 %numlowbits) nounwind {
; X86-LABEL: clear_lowbits8_ic4_commutative:
; X86: # %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movb $8, %cl
; X86-NEXT: subb {{[0-9]+}}(%esp), %cl
; X86-NEXT: shrb %cl, %al
@ -1613,7 +1613,7 @@ define i32 @oneuse32_c(i32 %val, i32 %numlowbits, ptr %escape) nounwind {
; X86-NOBMI2-LABEL: oneuse32_c:
; X86-NOBMI2: # %bb.0:
; X86-NOBMI2-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NOBMI2-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NOBMI2-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NOBMI2-NEXT: movl $-1, %eax
; X86-NOBMI2-NEXT: shll %cl, %eax
; X86-NOBMI2-NEXT: movl %eax, (%edx)
@ -1623,7 +1623,7 @@ define i32 @oneuse32_c(i32 %val, i32 %numlowbits, ptr %escape) nounwind {
; X86-BMI2-LABEL: oneuse32_c:
; X86-BMI2: # %bb.0:
; X86-BMI2-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-BMI2-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-BMI2-NEXT: movl $-1, %edx
; X86-BMI2-NEXT: shlxl %eax, %edx, %eax
; X86-BMI2-NEXT: movl %eax, (%ecx)
@ -1659,7 +1659,7 @@ define i64 @oneuse64(i64 %val, i64 %numlowbits, ptr %escape) nounwind {
; X86-NOBMI2-NEXT: pushl %edi
; X86-NOBMI2-NEXT: pushl %esi
; X86-NOBMI2-NEXT: movl {{[0-9]+}}(%esp), %esi
; X86-NOBMI2-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NOBMI2-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NOBMI2-NEXT: movl $-1, %edx
; X86-NOBMI2-NEXT: movl $-1, %edi
; X86-NOBMI2-NEXT: shll %cl, %edi
@ -1685,7 +1685,7 @@ define i64 @oneuse64(i64 %val, i64 %numlowbits, ptr %escape) nounwind {
; X86-BMI2-NEXT: pushl %ebx
; X86-BMI2-NEXT: pushl %esi
; X86-BMI2-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %bl
; X86-BMI2-NEXT: movzbl {{[0-9]+}}(%esp), %ebx
; X86-BMI2-NEXT: movl $-1, %edx
; X86-BMI2-NEXT: shlxl %ebx, %edx, %esi
; X86-BMI2-NEXT: xorl %eax, %eax

12
llvm/test/CodeGen/X86/clz.ll
View File

@ -302,7 +302,7 @@ define i64 @ctlz_i64(i64 %x) {
define i8 @ctlz_i8_zero_test(i8 %n) {
; X86-LABEL: ctlz_i8_zero_test:
; X86: # %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: testb %al, %al
; X86-NEXT: je .LBB8_1
; X86-NEXT: # %bb.2: # %cond.false
@ -512,7 +512,7 @@ define i64 @ctlz_i64_zero_test(i64 %n) {
define i8 @cttz_i8_zero_test(i8 %n) {
; X86-LABEL: cttz_i8_zero_test:
; X86: # %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: testb %al, %al
; X86-NEXT: je .LBB12_1
; X86-NEXT: # %bb.2: # %cond.false
@ -819,7 +819,7 @@ define i32 @ctlz_bsr_zero_test(i32 %n) {
define i8 @cttz_i8_knownbits(i8 %x) {
; X86-LABEL: cttz_i8_knownbits:
; X86: # %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: orb $2, %al
; X86-NEXT: movzbl %al, %eax
; X86-NEXT: bsfl %eax, %eax
@ -836,7 +836,7 @@ define i8 @cttz_i8_knownbits(i8 %x) {
;
; X86-CLZ-LABEL: cttz_i8_knownbits:
; X86-CLZ: # %bb.0:
; X86-CLZ-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-CLZ-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-CLZ-NEXT: orb $2, %al
; X86-CLZ-NEXT: movzbl %al, %eax
; X86-CLZ-NEXT: tzcntl %eax, %eax
@ -859,7 +859,7 @@ define i8 @cttz_i8_knownbits(i8 %x) {
define i8 @ctlz_i8_knownbits(i8 %x) {
; X86-LABEL: ctlz_i8_knownbits:
; X86: # %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: orb $64, %al
; X86-NEXT: movzbl %al, %eax
; X86-NEXT: bsrl %eax, %eax
@ -878,7 +878,7 @@ define i8 @ctlz_i8_knownbits(i8 %x) {
;
; X86-CLZ-LABEL: ctlz_i8_knownbits:
; X86-CLZ: # %bb.0:
; X86-CLZ-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-CLZ-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-CLZ-NEXT: orb $64, %al
; X86-CLZ-NEXT: movzbl %al, %eax
; X86-CLZ-NEXT: lzcntl %eax, %eax

6
llvm/test/CodeGen/X86/cmov.ll
View File

@ -85,11 +85,11 @@ define i1 @test4() nounwind {
; CHECK-NEXT: xorb $1, %cl
; CHECK-NEXT: # kill: def $cl killed $cl killed $ecx
; CHECK-NEXT: sarl %cl, %edx
; CHECK-NEXT: movb g_96(%rip), %al
; CHECK-NEXT: movzbl g_96(%rip), %eax
; CHECK-NEXT: testb %al, %al
; CHECK-NEXT: je .LBB3_2
; CHECK-NEXT: # %bb.1: # %bb.i.i.i
; CHECK-NEXT: movb g_100(%rip), %cl
; CHECK-NEXT: movzbl g_100(%rip), %ecx
; CHECK-NEXT: .LBB3_2: # %func_4.exit.i
; CHECK-NEXT: xorl %esi, %esi
; CHECK-NEXT: testb %dl, %dl
@ -102,7 +102,7 @@ define i1 @test4() nounwind {
; CHECK-NEXT: testb %bl, %bl
; CHECK-NEXT: jne .LBB3_5
; CHECK-NEXT: # %bb.4: # %bb.i.i
; CHECK-NEXT: movb g_100(%rip), %cl
; CHECK-NEXT: movzbl g_100(%rip), %ecx
; CHECK-NEXT: xorl %ebx, %ebx
; CHECK-NEXT: movl %eax, %ecx
; CHECK-NEXT: .LBB3_5: # %func_1.exit

2
llvm/test/CodeGen/X86/cmovcmov.ll
View File

@ -339,7 +339,7 @@ define dso_local void @no_cascade_opt(i32 %v0, i32 %v1, i32 %v2, i32 %v3) nounwi
; NOCMOV-NEXT: movb %al, g8
; NOCMOV-NEXT: retl
; NOCMOV-NEXT: .LBB7_1: # %entry
; NOCMOV-NEXT: movb {{[0-9]+}}(%esp), %cl
; NOCMOV-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; NOCMOV-NEXT: jg .LBB7_4
; NOCMOV-NEXT: .LBB7_3: # %entry
; NOCMOV-NEXT: movl %ecx, %eax

2
llvm/test/CodeGen/X86/combine-andintoload.ll
View File

@ -10,7 +10,7 @@ define zeroext i1 @bigger(ptr nocapture readonly %c, ptr nocapture readonly %e,
; CHECK-NEXT: movl $5, %r8d
; CHECK-NEXT: movl %eax, %ecx
; CHECK-NEXT: shll %cl, %r8d
; CHECK-NEXT: movb (%rsi,%rdx), %al
; CHECK-NEXT: movzbl (%rsi,%rdx), %eax
; CHECK-NEXT: xorb (%rdi,%rdx), %al
; CHECK-NEXT: movzbl %al, %eax
; CHECK-NEXT: andl %r8d, %eax

4
llvm/test/CodeGen/X86/combine-bswap.ll
View File

@ -176,13 +176,13 @@ define void @demand_one_loaded_byte(ptr %xp, ptr %yp) {
; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movb 4(%ecx), %cl
; X86-NEXT: movzbl 4(%ecx), %ecx
; X86-NEXT: movb %cl, (%eax)
; X86-NEXT: retl
;
; X64-LABEL: demand_one_loaded_byte:
; X64: # %bb.0:
; X64-NEXT: movb 4(%rdi), %al
; X64-NEXT: movzbl 4(%rdi), %eax
; X64-NEXT: movb %al, (%rsi)
; X64-NEXT: retq
%x = load i64, ptr %xp, align 8

54
llvm/test/CodeGen/X86/const-shift-of-constmasked.ll
View File

@ -13,7 +13,7 @@
define i8 @test_i8_7_mask_lshr_1(i8 %a0) {
; X86-LABEL: test_i8_7_mask_lshr_1:
; X86: # %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: andb $6, %al
; X86-NEXT: shrb %al
; X86-NEXT: retl
@ -33,7 +33,7 @@ define i8 @test_i8_7_mask_lshr_1(i8 %a0) {
define i8 @test_i8_28_mask_lshr_1(i8 %a0) {
; X86-LABEL: test_i8_28_mask_lshr_1:
; X86: # %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: andb $28, %al
; X86-NEXT: shrb %al
; X86-NEXT: retl
@ -52,7 +52,7 @@ define i8 @test_i8_28_mask_lshr_1(i8 %a0) {
define i8 @test_i8_28_mask_lshr_2(i8 %a0) {
; X86-LABEL: test_i8_28_mask_lshr_2:
; X86: # %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: andb $28, %al
; X86-NEXT: shrb $2, %al
; X86-NEXT: retl
@ -71,7 +71,7 @@ define i8 @test_i8_28_mask_lshr_2(i8 %a0) {
define i8 @test_i8_28_mask_lshr_3(i8 %a0) {
; X86-LABEL: test_i8_28_mask_lshr_3:
; X86: # %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: andb $24, %al
; X86-NEXT: shrb $3, %al
; X86-NEXT: retl
@ -90,7 +90,7 @@ define i8 @test_i8_28_mask_lshr_3(i8 %a0) {
define i8 @test_i8_28_mask_lshr_4(i8 %a0) {
; X86-LABEL: test_i8_28_mask_lshr_4:
; X86: # %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: andb $16, %al
; X86-NEXT: shrb $4, %al
; X86-NEXT: retl
@ -110,7 +110,7 @@ define i8 @test_i8_28_mask_lshr_4(i8 %a0) {
define i8 @test_i8_224_mask_lshr_1(i8 %a0) {
; X86-LABEL: test_i8_224_mask_lshr_1:
; X86: # %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: andb $-32, %al
; X86-NEXT: shrb %al
; X86-NEXT: retl
@ -129,7 +129,7 @@ define i8 @test_i8_224_mask_lshr_1(i8 %a0) {
define i8 @test_i8_224_mask_lshr_4(i8 %a0) {
; X86-LABEL: test_i8_224_mask_lshr_4:
; X86: # %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: andb $-32, %al
; X86-NEXT: shrb $4, %al
; X86-NEXT: retl
@ -148,7 +148,7 @@ define i8 @test_i8_224_mask_lshr_4(i8 %a0) {
define i8 @test_i8_224_mask_lshr_5(i8 %a0) {
; X86-LABEL: test_i8_224_mask_lshr_5:
; X86: # %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: shrb $5, %al
; X86-NEXT: retl
;
@ -165,7 +165,7 @@ define i8 @test_i8_224_mask_lshr_5(i8 %a0) {
define i8 @test_i8_224_mask_lshr_6(i8 %a0) {
; X86-LABEL: test_i8_224_mask_lshr_6:
; X86: # %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: shrb $6, %al
; X86-NEXT: retl
;
@ -185,7 +185,7 @@ define i8 @test_i8_224_mask_lshr_6(i8 %a0) {
define i8 @test_i8_7_mask_ashr_1(i8 %a0) {
; X86-LABEL: test_i8_7_mask_ashr_1:
; X86: # %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: andb $6, %al
; X86-NEXT: shrb %al
; X86-NEXT: retl
@ -205,7 +205,7 @@ define i8 @test_i8_7_mask_ashr_1(i8 %a0) {
define i8 @test_i8_28_mask_ashr_1(i8 %a0) {
; X86-LABEL: test_i8_28_mask_ashr_1:
; X86: # %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: andb $28, %al
; X86-NEXT: shrb %al
; X86-NEXT: retl
@ -224,7 +224,7 @@ define i8 @test_i8_28_mask_ashr_1(i8 %a0) {
define i8 @test_i8_28_mask_ashr_2(i8 %a0) {
; X86-LABEL: test_i8_28_mask_ashr_2:
; X86: # %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: andb $28, %al
; X86-NEXT: shrb $2, %al
; X86-NEXT: retl
@ -243,7 +243,7 @@ define i8 @test_i8_28_mask_ashr_2(i8 %a0) {
define i8 @test_i8_28_mask_ashr_3(i8 %a0) {
; X86-LABEL: test_i8_28_mask_ashr_3:
; X86: # %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: andb $24, %al
; X86-NEXT: shrb $3, %al
; X86-NEXT: retl
@ -262,7 +262,7 @@ define i8 @test_i8_28_mask_ashr_3(i8 %a0) {
define i8 @test_i8_28_mask_ashr_4(i8 %a0) {
; X86-LABEL: test_i8_28_mask_ashr_4:
; X86: # %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: andb $16, %al
; X86-NEXT: shrb $4, %al
; X86-NEXT: retl
@ -282,7 +282,7 @@ define i8 @test_i8_28_mask_ashr_4(i8 %a0) {
define i8 @test_i8_224_mask_ashr_1(i8 %a0) {
; X86-LABEL: test_i8_224_mask_ashr_1:
; X86: # %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: andb $-32, %al
; X86-NEXT: sarb %al
; X86-NEXT: retl
@ -301,7 +301,7 @@ define i8 @test_i8_224_mask_ashr_1(i8 %a0) {
define i8 @test_i8_224_mask_ashr_4(i8 %a0) {
; X86-LABEL: test_i8_224_mask_ashr_4:
; X86: # %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: andb $-32, %al
; X86-NEXT: sarb $4, %al
; X86-NEXT: retl
@ -320,7 +320,7 @@ define i8 @test_i8_224_mask_ashr_4(i8 %a0) {
define i8 @test_i8_224_mask_ashr_5(i8 %a0) {
; X86-LABEL: test_i8_224_mask_ashr_5:
; X86: # %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: sarb $5, %al
; X86-NEXT: retl
;
@ -337,7 +337,7 @@ define i8 @test_i8_224_mask_ashr_5(i8 %a0) {
define i8 @test_i8_224_mask_ashr_6(i8 %a0) {
; X86-LABEL: test_i8_224_mask_ashr_6:
; X86: # %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: sarb $6, %al
; X86-NEXT: retl
;
@ -357,7 +357,7 @@ define i8 @test_i8_224_mask_ashr_6(i8 %a0) {
define i8 @test_i8_7_mask_shl_1(i8 %a0) {
; X86-LABEL: test_i8_7_mask_shl_1:
; X86: # %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: andb $7, %al
; X86-NEXT: addb %al, %al
; X86-NEXT: retl
@ -376,7 +376,7 @@ define i8 @test_i8_7_mask_shl_1(i8 %a0) {
define i8 @test_i8_7_mask_shl_4(i8 %a0) {
; X86-LABEL: test_i8_7_mask_shl_4:
; X86: # %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: andb $7, %al
; X86-NEXT: shlb $4, %al
; X86-NEXT: retl
@ -395,7 +395,7 @@ define i8 @test_i8_7_mask_shl_4(i8 %a0) {
define i8 @test_i8_7_mask_shl_5(i8 %a0) {
; X86-LABEL: test_i8_7_mask_shl_5:
; X86: # %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: shlb $5, %al
; X86-NEXT: retl
;
@ -412,7 +412,7 @@ define i8 @test_i8_7_mask_shl_5(i8 %a0) {
define i8 @test_i8_7_mask_shl_6(i8 %a0) {
; X86-LABEL: test_i8_7_mask_shl_6:
; X86: # %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: shlb $6, %al
; X86-NEXT: retl
;
@ -430,7 +430,7 @@ define i8 @test_i8_7_mask_shl_6(i8 %a0) {
define i8 @test_i8_28_mask_shl_1(i8 %a0) {
; X86-LABEL: test_i8_28_mask_shl_1:
; X86: # %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: andb $28, %al
; X86-NEXT: addb %al, %al
; X86-NEXT: retl
@ -449,7 +449,7 @@ define i8 @test_i8_28_mask_shl_1(i8 %a0) {
define i8 @test_i8_28_mask_shl_2(i8 %a0) {
; X86-LABEL: test_i8_28_mask_shl_2:
; X86: # %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: andb $28, %al
; X86-NEXT: shlb $2, %al
; X86-NEXT: retl
@ -468,7 +468,7 @@ define i8 @test_i8_28_mask_shl_2(i8 %a0) {
define i8 @test_i8_28_mask_shl_3(i8 %a0) {
; X86-LABEL: test_i8_28_mask_shl_3:
; X86: # %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: andb $28, %al
; X86-NEXT: shlb $3, %al
; X86-NEXT: retl
@ -487,7 +487,7 @@ define i8 @test_i8_28_mask_shl_3(i8 %a0) {
define i8 @test_i8_28_mask_shl_4(i8 %a0) {
; X86-LABEL: test_i8_28_mask_shl_4:
; X86: # %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: andb $12, %al
; X86-NEXT: shlb $4, %al
; X86-NEXT: retl
@ -507,7 +507,7 @@ define i8 @test_i8_28_mask_shl_4(i8 %a0) {
define i8 @test_i8_224_mask_shl_1(i8 %a0) {
; X86-LABEL: test_i8_224_mask_shl_1:
; X86: # %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: andb $96, %al
; X86-NEXT: addb %al, %al
; X86-NEXT: retl

6
llvm/test/CodeGen/X86/copy-eflags.ll
View File

@ -18,7 +18,7 @@ declare dso_local void @external(i32)
define dso_local i32 @test1() nounwind {
; X32-LABEL: test1:
; X32: # %bb.0: # %entry
; X32-NEXT: movb b, %cl
; X32-NEXT: movzbl b, %ecx
; X32-NEXT: movl %ecx, %eax
; X32-NEXT: incb %al
; X32-NEXT: movb %al, b
@ -44,12 +44,12 @@ define dso_local i32 @test1() nounwind {
; X64-LABEL: test1:
; X64: # %bb.0: # %entry
; X64-NEXT: pushq %rax
; X64-NEXT: movb b(%rip), %cl
; X64-NEXT: movzbl b(%rip), %ecx
; X64-NEXT: leal 1(%rcx), %eax
; X64-NEXT: movb %al, b(%rip)
; X64-NEXT: incl c(%rip)
; X64-NEXT: sete %dl
; X64-NEXT: movb a(%rip), %sil
; X64-NEXT: movzbl a(%rip), %esi
; X64-NEXT: leal 1(%rsi), %edi
; X64-NEXT: cmpb %cl, %sil
; X64-NEXT: sete d(%rip)

2
llvm/test/CodeGen/X86/div-rem-pair-recomposition-signed.ll
View File

@ -966,7 +966,7 @@ define i32 @multiple_bb(i32 %x, i32 %y, ptr %divdst, i1 zeroext %store_srem, ptr
; X86-NEXT: pushl %esi
; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movb {{[0-9]+}}(%esp), %bl
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ebx
; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
; X86-NEXT: movl %ecx, %eax
; X86-NEXT: cltd

2
llvm/test/CodeGen/X86/div-rem-pair-recomposition-unsigned.ll
View File

@ -966,7 +966,7 @@ define i32 @multiple_bb(i32 %x, i32 %y, ptr %divdst, i1 zeroext %store_urem, ptr
; X86-NEXT: pushl %esi
; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movb {{[0-9]+}}(%esp), %bl
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ebx
; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
; X86-NEXT: movl %ecx, %eax
; X86-NEXT: xorl %edx, %edx

4
llvm/test/CodeGen/X86/divide-by-constant.ll
View File

@ -162,7 +162,7 @@ define i32 @test7(i32 %x) nounwind {
define i8 @test8(i8 %x) nounwind {
; X32-LABEL: test8:
; X32: # %bb.0:
; X32-NEXT: movb {{[0-9]+}}(%esp), %al
; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X32-NEXT: shrb %al
; X32-NEXT: movzbl %al, %eax
; X32-NEXT: imull $211, %eax, %eax
@ -185,7 +185,7 @@ define i8 @test8(i8 %x) nounwind {
define i8 @test9(i8 %x) nounwind {
; X32-LABEL: test9:
; X32: # %bb.0:
; X32-NEXT: movb {{[0-9]+}}(%esp), %al
; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X32-NEXT: shrb $2, %al
; X32-NEXT: movzbl %al, %eax
; X32-NEXT: imull $71, %eax, %eax

4
llvm/test/CodeGen/X86/divrem8_ext.ll
View File

@ -49,7 +49,7 @@ define zeroext i8 @test_urem_zext_ah(i8 %x, i8 %y) {
define i8 @test_urem_noext_ah(i8 %x, i8 %y) {
; X32-LABEL: test_urem_noext_ah:
; X32: # %bb.0:
; X32-NEXT: movb {{[0-9]+}}(%esp), %cl
; X32-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X32-NEXT: divb %cl
; X32-NEXT: movzbl %ah, %eax
@ -137,7 +137,7 @@ define signext i8 @test_srem_sext_ah(i8 %x, i8 %y) {
define i8 @test_srem_noext_ah(i8 %x, i8 %y) {
; X32-LABEL: test_srem_noext_ah:
; X32: # %bb.0:
; X32-NEXT: movb {{[0-9]+}}(%esp), %cl
; X32-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X32-NEXT: movsbl {{[0-9]+}}(%esp), %eax
; X32-NEXT: idivb %cl
; X32-NEXT: movsbl %ah, %eax

2
llvm/test/CodeGen/X86/emutls.ll
View File

@ -211,7 +211,7 @@ define dso_local i8 @f13() {
; X86-LABEL: f13:
; X86: movl $__emutls_v.b1, (%esp)
; X86-NEXT: calll __emutls_get_address
; X86-NEXT: movb (%eax), %al
; X86-NEXT: movzbl (%eax), %eax
; X86-NEXT: addl $12, %esp
; X86-NEXT: .cfi_def_cfa_offset 4
; X86-NEXT: retl

486
llvm/test/CodeGen/X86/extract-bits.ll
View File

File diff suppressed because it is too large Load Diff

4
llvm/test/CodeGen/X86/extract-insert.ll
View File

@ -15,7 +15,7 @@ define i32 @extractelt_undef_insertelt(i32 %x, i32 %y) {
define i8 @extractelt_bitcast(i32 %x) nounwind {
; X86-LABEL: extractelt_bitcast:
; X86: # %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: retl
;
; X64-LABEL: extractelt_bitcast:
@ -87,7 +87,7 @@ define i16 @trunc_i64_to_i16_le(i64 %x) {
define i8 @trunc_i32_to_i8_le(i32 %x) {
; X86-LABEL: trunc_i32_to_i8_le:
; X86: # %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: retl
;
; X64-LABEL: trunc_i32_to_i8_le:

212
llvm/test/CodeGen/X86/extract-lowbits.ll
View File

@ -30,7 +30,7 @@
define i32 @bzhi32_a0(i32 %val, i32 %numlowbits) nounwind {
; X86-NOBMI-LABEL: bzhi32_a0:
; X86-NOBMI: # %bb.0:
; X86-NOBMI-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NOBMI-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NOBMI-NEXT: movl $1, %eax
; X86-NOBMI-NEXT: shll %cl, %eax
; X86-NOBMI-NEXT: decl %eax
@ -39,14 +39,14 @@ define i32 @bzhi32_a0(i32 %val, i32 %numlowbits) nounwind {
;
; X86-BMI1-LABEL: bzhi32_a0:
; X86-BMI1: # %bb.0:
; X86-BMI1-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-BMI1-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-BMI1-NEXT: shll $8, %eax
; X86-BMI1-NEXT: bextrl %eax, {{[0-9]+}}(%esp), %eax
; X86-BMI1-NEXT: retl
;
; X86-BMI2-LABEL: bzhi32_a0:
; X86-BMI2: # %bb.0:
; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-BMI2-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-BMI2-NEXT: bzhil %eax, {{[0-9]+}}(%esp), %eax
; X86-BMI2-NEXT: retl
;
@ -79,7 +79,7 @@ define i32 @bzhi32_a0(i32 %val, i32 %numlowbits) nounwind {
define i32 @bzhi32_a1_indexzext(i32 %val, i8 zeroext %numlowbits) nounwind {
; X86-NOBMI-LABEL: bzhi32_a1_indexzext:
; X86-NOBMI: # %bb.0:
; X86-NOBMI-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NOBMI-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NOBMI-NEXT: movl $1, %eax
; X86-NOBMI-NEXT: shll %cl, %eax
; X86-NOBMI-NEXT: decl %eax
@ -88,14 +88,14 @@ define i32 @bzhi32_a1_indexzext(i32 %val, i8 zeroext %numlowbits) nounwind {
;
; X86-BMI1-LABEL: bzhi32_a1_indexzext:
; X86-BMI1: # %bb.0:
; X86-BMI1-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-BMI1-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-BMI1-NEXT: shll $8, %eax
; X86-BMI1-NEXT: bextrl %eax, {{[0-9]+}}(%esp), %eax
; X86-BMI1-NEXT: retl
;
; X86-BMI2-LABEL: bzhi32_a1_indexzext:
; X86-BMI2: # %bb.0:
; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-BMI2-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-BMI2-NEXT: bzhil %eax, {{[0-9]+}}(%esp), %eax
; X86-BMI2-NEXT: retl
;
@ -130,7 +130,7 @@ define i32 @bzhi32_a2_load(ptr %w, i32 %numlowbits) nounwind {
; X86-NOBMI-LABEL: bzhi32_a2_load:
; X86-NOBMI: # %bb.0:
; X86-NOBMI-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NOBMI-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NOBMI-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NOBMI-NEXT: movl $1, %eax
; X86-NOBMI-NEXT: shll %cl, %eax
; X86-NOBMI-NEXT: decl %eax
@ -140,7 +140,7 @@ define i32 @bzhi32_a2_load(ptr %w, i32 %numlowbits) nounwind {
; X86-BMI1-LABEL: bzhi32_a2_load:
; X86-BMI1: # %bb.0:
; X86-BMI1-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-BMI1-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-BMI1-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-BMI1-NEXT: shll $8, %ecx
; X86-BMI1-NEXT: bextrl %ecx, (%eax), %eax
; X86-BMI1-NEXT: retl
@ -148,7 +148,7 @@ define i32 @bzhi32_a2_load(ptr %w, i32 %numlowbits) nounwind {
; X86-BMI2-LABEL: bzhi32_a2_load:
; X86-BMI2: # %bb.0:
; X86-BMI2-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-BMI2-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-BMI2-NEXT: bzhil %ecx, (%eax), %eax
; X86-BMI2-NEXT: retl
;
@ -183,7 +183,7 @@ define i32 @bzhi32_a3_load_indexzext(ptr %w, i8 zeroext %numlowbits) nounwind {
; X86-NOBMI-LABEL: bzhi32_a3_load_indexzext:
; X86-NOBMI: # %bb.0:
; X86-NOBMI-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NOBMI-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NOBMI-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NOBMI-NEXT: movl $1, %eax
; X86-NOBMI-NEXT: shll %cl, %eax
; X86-NOBMI-NEXT: decl %eax
@ -193,7 +193,7 @@ define i32 @bzhi32_a3_load_indexzext(ptr %w, i8 zeroext %numlowbits) nounwind {
; X86-BMI1-LABEL: bzhi32_a3_load_indexzext:
; X86-BMI1: # %bb.0:
; X86-BMI1-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-BMI1-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-BMI1-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-BMI1-NEXT: shll $8, %ecx
; X86-BMI1-NEXT: bextrl %ecx, (%eax), %eax
; X86-BMI1-NEXT: retl
@ -201,7 +201,7 @@ define i32 @bzhi32_a3_load_indexzext(ptr %w, i8 zeroext %numlowbits) nounwind {
; X86-BMI2-LABEL: bzhi32_a3_load_indexzext:
; X86-BMI2: # %bb.0:
; X86-BMI2-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-BMI2-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-BMI2-NEXT: bzhil %ecx, (%eax), %eax
; X86-BMI2-NEXT: retl
;
@ -236,7 +236,7 @@ define i32 @bzhi32_a3_load_indexzext(ptr %w, i8 zeroext %numlowbits) nounwind {
define i32 @bzhi32_a4_commutative(i32 %val, i32 %numlowbits) nounwind {
; X86-NOBMI-LABEL: bzhi32_a4_commutative:
; X86-NOBMI: # %bb.0:
; X86-NOBMI-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NOBMI-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NOBMI-NEXT: movl $1, %eax
; X86-NOBMI-NEXT: shll %cl, %eax
; X86-NOBMI-NEXT: decl %eax
@ -245,14 +245,14 @@ define i32 @bzhi32_a4_commutative(i32 %val, i32 %numlowbits) nounwind {
;
; X86-BMI1-LABEL: bzhi32_a4_commutative:
; X86-BMI1: # %bb.0:
; X86-BMI1-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-BMI1-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-BMI1-NEXT: shll $8, %eax
; X86-BMI1-NEXT: bextrl %eax, {{[0-9]+}}(%esp), %eax
; X86-BMI1-NEXT: retl
;
; X86-BMI2-LABEL: bzhi32_a4_commutative:
; X86-BMI2: # %bb.0:
; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-BMI2-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-BMI2-NEXT: bzhil %eax, {{[0-9]+}}(%esp), %eax
; X86-BMI2-NEXT: retl
;
@ -287,7 +287,7 @@ define i32 @bzhi32_a4_commutative(i32 %val, i32 %numlowbits) nounwind {
define i64 @bzhi64_a0(i64 %val, i64 %numlowbits) nounwind {
; X86-NOBMI-LABEL: bzhi64_a0:
; X86-NOBMI: # %bb.0:
; X86-NOBMI-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NOBMI-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NOBMI-NEXT: movl $1, %eax
; X86-NOBMI-NEXT: xorl %edx, %edx
; X86-NOBMI-NEXT: shldl %cl, %eax, %edx
@ -306,7 +306,7 @@ define i64 @bzhi64_a0(i64 %val, i64 %numlowbits) nounwind {
;
; X86-BMI1-LABEL: bzhi64_a0:
; X86-BMI1: # %bb.0:
; X86-BMI1-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-BMI1-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-BMI1-NEXT: movl $1, %eax
; X86-BMI1-NEXT: xorl %edx, %edx
; X86-BMI1-NEXT: shldl %cl, %eax, %edx
@ -325,7 +325,7 @@ define i64 @bzhi64_a0(i64 %val, i64 %numlowbits) nounwind {
;
; X86-BMI2-LABEL: bzhi64_a0:
; X86-BMI2: # %bb.0:
; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-BMI2-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-BMI2-NEXT: movl $1, %eax
; X86-BMI2-NEXT: xorl %edx, %edx
; X86-BMI2-NEXT: shldl %cl, %eax, %edx
@ -371,7 +371,7 @@ define i64 @bzhi64_a0(i64 %val, i64 %numlowbits) nounwind {
define i64 @bzhi64_a1_indexzext(i64 %val, i8 zeroext %numlowbits) nounwind {
; X86-NOBMI-LABEL: bzhi64_a1_indexzext:
; X86-NOBMI: # %bb.0:
; X86-NOBMI-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NOBMI-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NOBMI-NEXT: movl $1, %eax
; X86-NOBMI-NEXT: xorl %edx, %edx
; X86-NOBMI-NEXT: shldl %cl, %eax, %edx
@ -390,7 +390,7 @@ define i64 @bzhi64_a1_indexzext(i64 %val, i8 zeroext %numlowbits) nounwind {
;
; X86-BMI1-LABEL: bzhi64_a1_indexzext:
; X86-BMI1: # %bb.0:
; X86-BMI1-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-BMI1-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-BMI1-NEXT: movl $1, %eax
; X86-BMI1-NEXT: xorl %edx, %edx
; X86-BMI1-NEXT: shldl %cl, %eax, %edx
@ -409,7 +409,7 @@ define i64 @bzhi64_a1_indexzext(i64 %val, i8 zeroext %numlowbits) nounwind {
;
; X86-BMI2-LABEL: bzhi64_a1_indexzext:
; X86-BMI2: # %bb.0:
; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-BMI2-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-BMI2-NEXT: movl $1, %eax
; X86-BMI2-NEXT: xorl %edx, %edx
; X86-BMI2-NEXT: shldl %cl, %eax, %edx
@ -460,7 +460,7 @@ define i64 @bzhi64_a2_load(ptr %w, i64 %numlowbits) nounwind {
; X86-NOBMI: # %bb.0:
; X86-NOBMI-NEXT: pushl %esi
; X86-NOBMI-NEXT: movl {{[0-9]+}}(%esp), %esi
; X86-NOBMI-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NOBMI-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NOBMI-NEXT: movl $1, %eax
; X86-NOBMI-NEXT: xorl %edx, %edx
; X86-NOBMI-NEXT: shldl %cl, %eax, %edx
@ -482,7 +482,7 @@ define i64 @bzhi64_a2_load(ptr %w, i64 %numlowbits) nounwind {
; X86-BMI1: # %bb.0:
; X86-BMI1-NEXT: pushl %esi
; X86-BMI1-NEXT: movl {{[0-9]+}}(%esp), %esi
; X86-BMI1-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-BMI1-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-BMI1-NEXT: movl $1, %eax
; X86-BMI1-NEXT: xorl %edx, %edx
; X86-BMI1-NEXT: shldl %cl, %eax, %edx
@ -504,7 +504,7 @@ define i64 @bzhi64_a2_load(ptr %w, i64 %numlowbits) nounwind {
; X86-BMI2: # %bb.0:
; X86-BMI2-NEXT: pushl %esi
; X86-BMI2-NEXT: movl {{[0-9]+}}(%esp), %esi
; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-BMI2-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-BMI2-NEXT: movl $1, %eax
; X86-BMI2-NEXT: xorl %edx, %edx
; X86-BMI2-NEXT: shldl %cl, %eax, %edx
@ -554,7 +554,7 @@ define i64 @bzhi64_a3_load_indexzext(ptr %w, i8 zeroext %numlowbits) nounwind {
; X86-NOBMI: # %bb.0:
; X86-NOBMI-NEXT: pushl %esi
; X86-NOBMI-NEXT: movl {{[0-9]+}}(%esp), %esi
; X86-NOBMI-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NOBMI-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NOBMI-NEXT: movl $1, %eax
; X86-NOBMI-NEXT: xorl %edx, %edx
; X86-NOBMI-NEXT: shldl %cl, %eax, %edx
@ -576,7 +576,7 @@ define i64 @bzhi64_a3_load_indexzext(ptr %w, i8 zeroext %numlowbits) nounwind {
; X86-BMI1: # %bb.0:
; X86-BMI1-NEXT: pushl %esi
; X86-BMI1-NEXT: movl {{[0-9]+}}(%esp), %esi
; X86-BMI1-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-BMI1-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-BMI1-NEXT: movl $1, %eax
; X86-BMI1-NEXT: xorl %edx, %edx
; X86-BMI1-NEXT: shldl %cl, %eax, %edx
@ -598,7 +598,7 @@ define i64 @bzhi64_a3_load_indexzext(ptr %w, i8 zeroext %numlowbits) nounwind {
; X86-BMI2: # %bb.0:
; X86-BMI2-NEXT: pushl %esi
; X86-BMI2-NEXT: movl {{[0-9]+}}(%esp), %esi
; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-BMI2-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-BMI2-NEXT: movl $1, %eax
; X86-BMI2-NEXT: xorl %edx, %edx
; X86-BMI2-NEXT: shldl %cl, %eax, %edx
@ -649,7 +649,7 @@ define i64 @bzhi64_a3_load_indexzext(ptr %w, i8 zeroext %numlowbits) nounwind {
define i64 @bzhi64_a4_commutative(i64 %val, i64 %numlowbits) nounwind {
; X86-NOBMI-LABEL: bzhi64_a4_commutative:
; X86-NOBMI: # %bb.0:
; X86-NOBMI-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NOBMI-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NOBMI-NEXT: movl $1, %eax
; X86-NOBMI-NEXT: xorl %edx, %edx
; X86-NOBMI-NEXT: shldl %cl, %eax, %edx
@ -668,7 +668,7 @@ define i64 @bzhi64_a4_commutative(i64 %val, i64 %numlowbits) nounwind {
;
; X86-BMI1-LABEL: bzhi64_a4_commutative:
; X86-BMI1: # %bb.0:
; X86-BMI1-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-BMI1-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-BMI1-NEXT: movl $1, %eax
; X86-BMI1-NEXT: xorl %edx, %edx
; X86-BMI1-NEXT: shldl %cl, %eax, %edx
@ -687,7 +687,7 @@ define i64 @bzhi64_a4_commutative(i64 %val, i64 %numlowbits) nounwind {
;
; X86-BMI2-LABEL: bzhi64_a4_commutative:
; X86-BMI2: # %bb.0:
; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-BMI2-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-BMI2-NEXT: movl $1, %eax
; X86-BMI2-NEXT: xorl %edx, %edx
; X86-BMI2-NEXT: shldl %cl, %eax, %edx
@ -736,7 +736,7 @@ define i64 @bzhi64_a4_commutative(i64 %val, i64 %numlowbits) nounwind {
define i32 @bzhi64_32_a0(i64 %val, i64 %numlowbits) nounwind {
; X86-NOBMI-LABEL: bzhi64_32_a0:
; X86-NOBMI: # %bb.0:
; X86-NOBMI-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NOBMI-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NOBMI-NEXT: movl $1, %edx
; X86-NOBMI-NEXT: shll %cl, %edx
; X86-NOBMI-NEXT: xorl %eax, %eax
@ -751,7 +751,7 @@ define i32 @bzhi64_32_a0(i64 %val, i64 %numlowbits) nounwind {
;
; X86-BMI1-LABEL: bzhi64_32_a0:
; X86-BMI1: # %bb.0:
; X86-BMI1-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-BMI1-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-BMI1-NEXT: movl $1, %edx
; X86-BMI1-NEXT: shll %cl, %edx
; X86-BMI1-NEXT: xorl %eax, %eax
@ -766,7 +766,7 @@ define i32 @bzhi64_32_a0(i64 %val, i64 %numlowbits) nounwind {
;
; X86-BMI2-LABEL: bzhi64_32_a0:
; X86-BMI2: # %bb.0:
; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-BMI2-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-BMI2-NEXT: xorl %eax, %eax
; X86-BMI2-NEXT: testb $32, %cl
; X86-BMI2-NEXT: jne .LBB10_2
@ -810,7 +810,7 @@ define i32 @bzhi64_32_a0(i64 %val, i64 %numlowbits) nounwind {
define i32 @bzhi64_32_a1(i64 %val, i32 %numlowbits) nounwind {
; X86-NOBMI-LABEL: bzhi64_32_a1:
; X86-NOBMI: # %bb.0:
; X86-NOBMI-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NOBMI-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NOBMI-NEXT: movl $1, %eax
; X86-NOBMI-NEXT: shll %cl, %eax
; X86-NOBMI-NEXT: decl %eax
@ -819,14 +819,14 @@ define i32 @bzhi64_32_a1(i64 %val, i32 %numlowbits) nounwind {
;
; X86-BMI1-LABEL: bzhi64_32_a1:
; X86-BMI1: # %bb.0:
; X86-BMI1-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-BMI1-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-BMI1-NEXT: shll $8, %eax
; X86-BMI1-NEXT: bextrl %eax, {{[0-9]+}}(%esp), %eax
; X86-BMI1-NEXT: retl
;
; X86-BMI2-LABEL: bzhi64_32_a1:
; X86-BMI2: # %bb.0:
; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-BMI2-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-BMI2-NEXT: bzhil %eax, {{[0-9]+}}(%esp), %eax
; X86-BMI2-NEXT: retl
;
@ -862,7 +862,7 @@ define i32 @bzhi64_32_a1(i64 %val, i32 %numlowbits) nounwind {
define i32 @bzhi64_32_a1_trunc_extrause(i64 %val, i32 %numlowbits, ptr %escape) nounwind {
; X86-NOBMI-LABEL: bzhi64_32_a1_trunc_extrause:
; X86-NOBMI: # %bb.0:
; X86-NOBMI-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NOBMI-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NOBMI-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NOBMI-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NOBMI-NEXT: movl %edx, (%eax)
@ -874,7 +874,7 @@ define i32 @bzhi64_32_a1_trunc_extrause(i64 %val, i32 %numlowbits, ptr %escape)
;
; X86-BMI1-LABEL: bzhi64_32_a1_trunc_extrause:
; X86-BMI1: # %bb.0:
; X86-BMI1-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-BMI1-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-BMI1-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-BMI1-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-BMI1-NEXT: movl %ecx, (%edx)
@ -884,7 +884,7 @@ define i32 @bzhi64_32_a1_trunc_extrause(i64 %val, i32 %numlowbits, ptr %escape)
;
; X86-BMI2-LABEL: bzhi64_32_a1_trunc_extrause:
; X86-BMI2: # %bb.0:
; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-BMI2-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-BMI2-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-BMI2-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-BMI2-NEXT: movl %ecx, (%edx)
@ -927,7 +927,7 @@ define i32 @bzhi64_32_a1_trunc_extrause(i64 %val, i32 %numlowbits, ptr %escape)
define i32 @bzhi64_32_a2(i64 %val, i32 %numlowbits) nounwind {
; X86-NOBMI-LABEL: bzhi64_32_a2:
; X86-NOBMI: # %bb.0:
; X86-NOBMI-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NOBMI-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NOBMI-NEXT: movl $1, %eax
; X86-NOBMI-NEXT: shll %cl, %eax
; X86-NOBMI-NEXT: decl %eax
@ -936,14 +936,14 @@ define i32 @bzhi64_32_a2(i64 %val, i32 %numlowbits) nounwind {
;
; X86-BMI1-LABEL: bzhi64_32_a2:
; X86-BMI1: # %bb.0:
; X86-BMI1-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-BMI1-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-BMI1-NEXT: shll $8, %eax
; X86-BMI1-NEXT: bextrl %eax, {{[0-9]+}}(%esp), %eax
; X86-BMI1-NEXT: retl
;
; X86-BMI2-LABEL: bzhi64_32_a2:
; X86-BMI2: # %bb.0:
; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-BMI2-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-BMI2-NEXT: bzhil %eax, {{[0-9]+}}(%esp), %eax
; X86-BMI2-NEXT: retl
;
@ -980,7 +980,7 @@ define i32 @bzhi64_32_a2(i64 %val, i32 %numlowbits) nounwind {
define i32 @bzhi64_32_a3(i64 %val, i64 %numlowbits) nounwind {
; X86-NOBMI-LABEL: bzhi64_32_a3:
; X86-NOBMI: # %bb.0:
; X86-NOBMI-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NOBMI-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NOBMI-NEXT: movl $1, %edx
; X86-NOBMI-NEXT: shll %cl, %edx
; X86-NOBMI-NEXT: xorl %eax, %eax
@ -995,7 +995,7 @@ define i32 @bzhi64_32_a3(i64 %val, i64 %numlowbits) nounwind {
;
; X86-BMI1-LABEL: bzhi64_32_a3:
; X86-BMI1: # %bb.0:
; X86-BMI1-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-BMI1-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-BMI1-NEXT: movl $1, %edx
; X86-BMI1-NEXT: shll %cl, %edx
; X86-BMI1-NEXT: xorl %eax, %eax
@ -1010,7 +1010,7 @@ define i32 @bzhi64_32_a3(i64 %val, i64 %numlowbits) nounwind {
;
; X86-BMI2-LABEL: bzhi64_32_a3:
; X86-BMI2: # %bb.0:
; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-BMI2-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-BMI2-NEXT: xorl %eax, %eax
; X86-BMI2-NEXT: testb $32, %cl
; X86-BMI2-NEXT: jne .LBB14_2
@ -1057,7 +1057,7 @@ define i32 @bzhi64_32_a3(i64 %val, i64 %numlowbits) nounwind {
define i32 @bzhi32_b0(i32 %val, i32 %numlowbits) nounwind {
; X86-NOBMI-LABEL: bzhi32_b0:
; X86-NOBMI: # %bb.0:
; X86-NOBMI-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NOBMI-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NOBMI-NEXT: movl $-1, %eax
; X86-NOBMI-NEXT: shll %cl, %eax
; X86-NOBMI-NEXT: notl %eax
@ -1066,14 +1066,14 @@ define i32 @bzhi32_b0(i32 %val, i32 %numlowbits) nounwind {
;
; X86-BMI1-LABEL: bzhi32_b0:
; X86-BMI1: # %bb.0:
; X86-BMI1-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-BMI1-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-BMI1-NEXT: shll $8, %eax
; X86-BMI1-NEXT: bextrl %eax, {{[0-9]+}}(%esp), %eax
; X86-BMI1-NEXT: retl
;
; X86-BMI2-LABEL: bzhi32_b0:
; X86-BMI2: # %bb.0:
; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-BMI2-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-BMI2-NEXT: bzhil %eax, {{[0-9]+}}(%esp), %eax
; X86-BMI2-NEXT: retl
;
@ -1106,7 +1106,7 @@ define i32 @bzhi32_b0(i32 %val, i32 %numlowbits) nounwind {
define i32 @bzhi32_b1_indexzext(i32 %val, i8 zeroext %numlowbits) nounwind {
; X86-NOBMI-LABEL: bzhi32_b1_indexzext:
; X86-NOBMI: # %bb.0:
; X86-NOBMI-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NOBMI-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NOBMI-NEXT: movl $-1, %eax
; X86-NOBMI-NEXT: shll %cl, %eax
; X86-NOBMI-NEXT: notl %eax
@ -1115,14 +1115,14 @@ define i32 @bzhi32_b1_indexzext(i32 %val, i8 zeroext %numlowbits) nounwind {
;
; X86-BMI1-LABEL: bzhi32_b1_indexzext:
; X86-BMI1: # %bb.0:
; X86-BMI1-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-BMI1-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-BMI1-NEXT: shll $8, %eax
; X86-BMI1-NEXT: bextrl %eax, {{[0-9]+}}(%esp), %eax
; X86-BMI1-NEXT: retl
;
; X86-BMI2-LABEL: bzhi32_b1_indexzext:
; X86-BMI2: # %bb.0:
; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-BMI2-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-BMI2-NEXT: bzhil %eax, {{[0-9]+}}(%esp), %eax
; X86-BMI2-NEXT: retl
;
@ -1157,7 +1157,7 @@ define i32 @bzhi32_b2_load(ptr %w, i32 %numlowbits) nounwind {
; X86-NOBMI-LABEL: bzhi32_b2_load:
; X86-NOBMI: # %bb.0:
; X86-NOBMI-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NOBMI-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NOBMI-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NOBMI-NEXT: movl $-1, %eax
; X86-NOBMI-NEXT: shll %cl, %eax
; X86-NOBMI-NEXT: notl %eax
@ -1167,7 +1167,7 @@ define i32 @bzhi32_b2_load(ptr %w, i32 %numlowbits) nounwind {
; X86-BMI1-LABEL: bzhi32_b2_load:
; X86-BMI1: # %bb.0:
; X86-BMI1-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-BMI1-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-BMI1-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-BMI1-NEXT: shll $8, %ecx
; X86-BMI1-NEXT: bextrl %ecx, (%eax), %eax
; X86-BMI1-NEXT: retl
@ -1175,7 +1175,7 @@ define i32 @bzhi32_b2_load(ptr %w, i32 %numlowbits) nounwind {
; X86-BMI2-LABEL: bzhi32_b2_load:
; X86-BMI2: # %bb.0:
; X86-BMI2-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-BMI2-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-BMI2-NEXT: bzhil %ecx, (%eax), %eax
; X86-BMI2-NEXT: retl
;
@ -1210,7 +1210,7 @@ define i32 @bzhi32_b3_load_indexzext(ptr %w, i8 zeroext %numlowbits) nounwind {
; X86-NOBMI-LABEL: bzhi32_b3_load_indexzext:
; X86-NOBMI: # %bb.0:
; X86-NOBMI-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NOBMI-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NOBMI-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NOBMI-NEXT: movl $-1, %eax
; X86-NOBMI-NEXT: shll %cl, %eax
; X86-NOBMI-NEXT: notl %eax
@ -1220,7 +1220,7 @@ define i32 @bzhi32_b3_load_indexzext(ptr %w, i8 zeroext %numlowbits) nounwind {
; X86-BMI1-LABEL: bzhi32_b3_load_indexzext:
; X86-BMI1: # %bb.0:
; X86-BMI1-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-BMI1-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-BMI1-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-BMI1-NEXT: shll $8, %ecx
; X86-BMI1-NEXT: bextrl %ecx, (%eax), %eax
; X86-BMI1-NEXT: retl
@ -1228,7 +1228,7 @@ define i32 @bzhi32_b3_load_indexzext(ptr %w, i8 zeroext %numlowbits) nounwind {
; X86-BMI2-LABEL: bzhi32_b3_load_indexzext:
; X86-BMI2: # %bb.0:
; X86-BMI2-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-BMI2-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-BMI2-NEXT: bzhil %ecx, (%eax), %eax
; X86-BMI2-NEXT: retl
;
@ -1263,7 +1263,7 @@ define i32 @bzhi32_b3_load_indexzext(ptr %w, i8 zeroext %numlowbits) nounwind {
define i32 @bzhi32_b4_commutative(i32 %val, i32 %numlowbits) nounwind {
; X86-NOBMI-LABEL: bzhi32_b4_commutative:
; X86-NOBMI: # %bb.0:
; X86-NOBMI-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NOBMI-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NOBMI-NEXT: movl $-1, %eax
; X86-NOBMI-NEXT: shll %cl, %eax
; X86-NOBMI-NEXT: notl %eax
@ -1272,14 +1272,14 @@ define i32 @bzhi32_b4_commutative(i32 %val, i32 %numlowbits) nounwind {
;
; X86-BMI1-LABEL: bzhi32_b4_commutative:
; X86-BMI1: # %bb.0:
; X86-BMI1-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-BMI1-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-BMI1-NEXT: shll $8, %eax
; X86-BMI1-NEXT: bextrl %eax, {{[0-9]+}}(%esp), %eax
; X86-BMI1-NEXT: retl
;
; X86-BMI2-LABEL: bzhi32_b4_commutative:
; X86-BMI2: # %bb.0:
; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-BMI2-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-BMI2-NEXT: bzhil %eax, {{[0-9]+}}(%esp), %eax
; X86-BMI2-NEXT: retl
;
@ -1315,7 +1315,7 @@ define i64 @bzhi64_b0(i64 %val, i64 %numlowbits) nounwind {
; X86-NOBMI-LABEL: bzhi64_b0:
; X86-NOBMI: # %bb.0:
; X86-NOBMI-NEXT: pushl %esi
; X86-NOBMI-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NOBMI-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NOBMI-NEXT: movl $-1, %edx
; X86-NOBMI-NEXT: movl $-1, %esi
; X86-NOBMI-NEXT: shll %cl, %esi
@ -1337,7 +1337,7 @@ define i64 @bzhi64_b0(i64 %val, i64 %numlowbits) nounwind {
;
; X86-BMI1-LABEL: bzhi64_b0:
; X86-BMI1: # %bb.0:
; X86-BMI1-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-BMI1-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-BMI1-NEXT: movl $-1, %edx
; X86-BMI1-NEXT: movl $-1, %eax
; X86-BMI1-NEXT: shll %cl, %eax
@ -1353,7 +1353,7 @@ define i64 @bzhi64_b0(i64 %val, i64 %numlowbits) nounwind {
;
; X86-BMI2-LABEL: bzhi64_b0:
; X86-BMI2: # %bb.0:
; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %dl
; X86-BMI2-NEXT: movzbl {{[0-9]+}}(%esp), %edx
; X86-BMI2-NEXT: movl $-1, %ecx
; X86-BMI2-NEXT: shlxl %edx, %ecx, %eax
; X86-BMI2-NEXT: testb $32, %dl
@ -1396,7 +1396,7 @@ define i64 @bzhi64_b1_indexzext(i64 %val, i8 zeroext %numlowbits) nounwind {
; X86-NOBMI-LABEL: bzhi64_b1_indexzext:
; X86-NOBMI: # %bb.0:
; X86-NOBMI-NEXT: pushl %esi
; X86-NOBMI-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NOBMI-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NOBMI-NEXT: movl $-1, %edx
; X86-NOBMI-NEXT: movl $-1, %esi
; X86-NOBMI-NEXT: shll %cl, %esi
@ -1418,7 +1418,7 @@ define i64 @bzhi64_b1_indexzext(i64 %val, i8 zeroext %numlowbits) nounwind {
;
; X86-BMI1-LABEL: bzhi64_b1_indexzext:
; X86-BMI1: # %bb.0:
; X86-BMI1-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-BMI1-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-BMI1-NEXT: movl $-1, %edx
; X86-BMI1-NEXT: movl $-1, %eax
; X86-BMI1-NEXT: shll %cl, %eax
@ -1434,7 +1434,7 @@ define i64 @bzhi64_b1_indexzext(i64 %val, i8 zeroext %numlowbits) nounwind {
;
; X86-BMI2-LABEL: bzhi64_b1_indexzext:
; X86-BMI2: # %bb.0:
; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %dl
; X86-BMI2-NEXT: movzbl {{[0-9]+}}(%esp), %edx
; X86-BMI2-NEXT: movl $-1, %ecx
; X86-BMI2-NEXT: shlxl %edx, %ecx, %eax
; X86-BMI2-NEXT: testb $32, %dl
@ -1482,7 +1482,7 @@ define i64 @bzhi64_b2_load(ptr %w, i64 %numlowbits) nounwind {
; X86-NOBMI-NEXT: pushl %edi
; X86-NOBMI-NEXT: pushl %esi
; X86-NOBMI-NEXT: movl {{[0-9]+}}(%esp), %esi
; X86-NOBMI-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NOBMI-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NOBMI-NEXT: movl $-1, %edx
; X86-NOBMI-NEXT: movl $-1, %edi
; X86-NOBMI-NEXT: shll %cl, %edi
@ -1507,7 +1507,7 @@ define i64 @bzhi64_b2_load(ptr %w, i64 %numlowbits) nounwind {
; X86-BMI1: # %bb.0:
; X86-BMI1-NEXT: pushl %esi
; X86-BMI1-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-BMI1-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-BMI1-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-BMI1-NEXT: movl $-1, %esi
; X86-BMI1-NEXT: movl $-1, %eax
; X86-BMI1-NEXT: shll %cl, %eax
@ -1526,7 +1526,7 @@ define i64 @bzhi64_b2_load(ptr %w, i64 %numlowbits) nounwind {
; X86-BMI2: # %bb.0:
; X86-BMI2-NEXT: pushl %ebx
; X86-BMI2-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %bl
; X86-BMI2-NEXT: movzbl {{[0-9]+}}(%esp), %ebx
; X86-BMI2-NEXT: movl $-1, %edx
; X86-BMI2-NEXT: shlxl %ebx, %edx, %eax
; X86-BMI2-NEXT: testb $32, %bl
@ -1573,7 +1573,7 @@ define i64 @bzhi64_b3_load_indexzext(ptr %w, i8 zeroext %numlowbits) nounwind {
; X86-NOBMI-NEXT: pushl %edi
; X86-NOBMI-NEXT: pushl %esi
; X86-NOBMI-NEXT: movl {{[0-9]+}}(%esp), %esi
; X86-NOBMI-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NOBMI-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NOBMI-NEXT: movl $-1, %edx
; X86-NOBMI-NEXT: movl $-1, %edi
; X86-NOBMI-NEXT: shll %cl, %edi
@ -1598,7 +1598,7 @@ define i64 @bzhi64_b3_load_indexzext(ptr %w, i8 zeroext %numlowbits) nounwind {
; X86-BMI1: # %bb.0:
; X86-BMI1-NEXT: pushl %esi
; X86-BMI1-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-BMI1-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-BMI1-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-BMI1-NEXT: movl $-1, %esi
; X86-BMI1-NEXT: movl $-1, %eax
; X86-BMI1-NEXT: shll %cl, %eax
@ -1617,7 +1617,7 @@ define i64 @bzhi64_b3_load_indexzext(ptr %w, i8 zeroext %numlowbits) nounwind {
; X86-BMI2: # %bb.0:
; X86-BMI2-NEXT: pushl %ebx
; X86-BMI2-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %bl
; X86-BMI2-NEXT: movzbl {{[0-9]+}}(%esp), %ebx
; X86-BMI2-NEXT: movl $-1, %edx
; X86-BMI2-NEXT: shlxl %ebx, %edx, %eax
; X86-BMI2-NEXT: testb $32, %bl
@ -1665,7 +1665,7 @@ define i64 @bzhi64_b4_commutative(i64 %val, i64 %numlowbits) nounwind {
; X86-NOBMI-LABEL: bzhi64_b4_commutative:
; X86-NOBMI: # %bb.0:
; X86-NOBMI-NEXT: pushl %esi
; X86-NOBMI-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NOBMI-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NOBMI-NEXT: movl $-1, %edx
; X86-NOBMI-NEXT: movl $-1, %esi
; X86-NOBMI-NEXT: shll %cl, %esi
@ -1687,7 +1687,7 @@ define i64 @bzhi64_b4_commutative(i64 %val, i64 %numlowbits) nounwind {
;
; X86-BMI1-LABEL: bzhi64_b4_commutative:
; X86-BMI1: # %bb.0:
; X86-BMI1-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-BMI1-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-BMI1-NEXT: movl $-1, %edx
; X86-BMI1-NEXT: movl $-1, %eax
; X86-BMI1-NEXT: shll %cl, %eax
@ -1703,7 +1703,7 @@ define i64 @bzhi64_b4_commutative(i64 %val, i64 %numlowbits) nounwind {
;
; X86-BMI2-LABEL: bzhi64_b4_commutative:
; X86-BMI2: # %bb.0:
; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %dl
; X86-BMI2-NEXT: movzbl {{[0-9]+}}(%esp), %edx
; X86-BMI2-NEXT: movl $-1, %ecx
; X86-BMI2-NEXT: shlxl %edx, %ecx, %eax
; X86-BMI2-NEXT: testb $32, %dl
@ -1748,7 +1748,7 @@ define i64 @bzhi64_b4_commutative(i64 %val, i64 %numlowbits) nounwind {
define i32 @bzhi64_32_b0(i64 %val, i8 %numlowbits) nounwind {
; X86-NOBMI-LABEL: bzhi64_32_b0:
; X86-NOBMI: # %bb.0:
; X86-NOBMI-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NOBMI-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NOBMI-NEXT: movl $-1, %edx
; X86-NOBMI-NEXT: shll %cl, %edx
; X86-NOBMI-NEXT: xorl %eax, %eax
@ -1763,7 +1763,7 @@ define i32 @bzhi64_32_b0(i64 %val, i8 %numlowbits) nounwind {
;
; X86-BMI1-LABEL: bzhi64_32_b0:
; X86-BMI1: # %bb.0:
; X86-BMI1-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-BMI1-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-BMI1-NEXT: movl $-1, %eax
; X86-BMI1-NEXT: shll %cl, %eax
; X86-BMI1-NEXT: xorl %edx, %edx
@ -1777,7 +1777,7 @@ define i32 @bzhi64_32_b0(i64 %val, i8 %numlowbits) nounwind {
;
; X86-BMI2-LABEL: bzhi64_32_b0:
; X86-BMI2: # %bb.0:
; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-BMI2-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-BMI2-NEXT: xorl %ecx, %ecx
; X86-BMI2-NEXT: testb $32, %al
; X86-BMI2-NEXT: jne .LBB25_2
@ -1821,7 +1821,7 @@ define i32 @bzhi64_32_b0(i64 %val, i8 %numlowbits) nounwind {
define i32 @bzhi64_32_b1(i64 %val, i8 %numlowbits) nounwind {
; X86-NOBMI-LABEL: bzhi64_32_b1:
; X86-NOBMI: # %bb.0:
; X86-NOBMI-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NOBMI-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NOBMI-NEXT: movl $-1, %eax
; X86-NOBMI-NEXT: shll %cl, %eax
; X86-NOBMI-NEXT: notl %eax
@ -1830,14 +1830,14 @@ define i32 @bzhi64_32_b1(i64 %val, i8 %numlowbits) nounwind {
;
; X86-BMI1-LABEL: bzhi64_32_b1:
; X86-BMI1: # %bb.0:
; X86-BMI1-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-BMI1-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-BMI1-NEXT: shll $8, %eax
; X86-BMI1-NEXT: bextrl %eax, {{[0-9]+}}(%esp), %eax
; X86-BMI1-NEXT: retl
;
; X86-BMI2-LABEL: bzhi64_32_b1:
; X86-BMI2: # %bb.0:
; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-BMI2-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-BMI2-NEXT: bzhil %eax, {{[0-9]+}}(%esp), %eax
; X86-BMI2-NEXT: retl
;
@ -1874,7 +1874,7 @@ define i32 @bzhi64_32_b1(i64 %val, i8 %numlowbits) nounwind {
define i32 @bzhi64_32_b2(i64 %val, i8 %numlowbits) nounwind {
; X86-NOBMI-LABEL: bzhi64_32_b2:
; X86-NOBMI: # %bb.0:
; X86-NOBMI-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NOBMI-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NOBMI-NEXT: movl $-1, %eax
; X86-NOBMI-NEXT: shll %cl, %eax
; X86-NOBMI-NEXT: notl %eax
@ -1883,14 +1883,14 @@ define i32 @bzhi64_32_b2(i64 %val, i8 %numlowbits) nounwind {
;
; X86-BMI1-LABEL: bzhi64_32_b2:
; X86-BMI1: # %bb.0:
; X86-BMI1-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-BMI1-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-BMI1-NEXT: shll $8, %eax
; X86-BMI1-NEXT: bextrl %eax, {{[0-9]+}}(%esp), %eax
; X86-BMI1-NEXT: retl
;
; X86-BMI2-LABEL: bzhi64_32_b2:
; X86-BMI2: # %bb.0:
; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-BMI2-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-BMI2-NEXT: bzhil %eax, {{[0-9]+}}(%esp), %eax
; X86-BMI2-NEXT: retl
;
@ -1928,7 +1928,7 @@ define i32 @bzhi64_32_b2(i64 %val, i8 %numlowbits) nounwind {
define i32 @bzhi64_32_b3(i64 %val, i8 %numlowbits) nounwind {
; X86-NOBMI-LABEL: bzhi64_32_b3:
; X86-NOBMI: # %bb.0:
; X86-NOBMI-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NOBMI-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NOBMI-NEXT: movl $-1, %edx
; X86-NOBMI-NEXT: shll %cl, %edx
; X86-NOBMI-NEXT: xorl %eax, %eax
@ -1943,7 +1943,7 @@ define i32 @bzhi64_32_b3(i64 %val, i8 %numlowbits) nounwind {
;
; X86-BMI1-LABEL: bzhi64_32_b3:
; X86-BMI1: # %bb.0:
; X86-BMI1-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-BMI1-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-BMI1-NEXT: movl $-1, %eax
; X86-BMI1-NEXT: shll %cl, %eax
; X86-BMI1-NEXT: xorl %edx, %edx
@ -1957,7 +1957,7 @@ define i32 @bzhi64_32_b3(i64 %val, i8 %numlowbits) nounwind {
;
; X86-BMI2-LABEL: bzhi64_32_b3:
; X86-BMI2: # %bb.0:
; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-BMI2-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-BMI2-NEXT: xorl %ecx, %ecx
; X86-BMI2-NEXT: testb $32, %al
; X86-BMI2-NEXT: jne .LBB28_2
@ -2031,7 +2031,7 @@ define i32 @bzhi32_c0(i32 %val, i32 %numlowbits, ptr %escape) nounwind {
; X86-BMI2: # %bb.0:
; X86-BMI2-NEXT: pushl %esi
; X86-BMI2-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %dl
; X86-BMI2-NEXT: movzbl {{[0-9]+}}(%esp), %edx
; X86-BMI2-NEXT: bzhil %edx, {{[0-9]+}}(%esp), %eax
; X86-BMI2-NEXT: # kill: def $dl killed $dl killed $edx def $edx
; X86-BMI2-NEXT: negb %dl
@ -2108,7 +2108,7 @@ define i32 @bzhi32_c1_indexzext(i32 %val, i8 %numlowbits, ptr %escape) nounwind
; X86-BMI2: # %bb.0:
; X86-BMI2-NEXT: pushl %esi
; X86-BMI2-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %dl
; X86-BMI2-NEXT: movzbl {{[0-9]+}}(%esp), %edx
; X86-BMI2-NEXT: bzhil %edx, {{[0-9]+}}(%esp), %eax
; X86-BMI2-NEXT: # kill: def $dl killed $dl killed $edx def $edx
; X86-BMI2-NEXT: negb %dl
@ -2195,7 +2195,7 @@ define i32 @bzhi32_c2_load(ptr %w, i32 %numlowbits, ptr %escape) nounwind {
; X86-BMI2-NEXT: pushl %esi
; X86-BMI2-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-BMI2-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %dl
; X86-BMI2-NEXT: movzbl {{[0-9]+}}(%esp), %edx
; X86-BMI2-NEXT: bzhil %edx, (%eax), %eax
; X86-BMI2-NEXT: # kill: def $dl killed $dl killed $edx def $edx
; X86-BMI2-NEXT: negb %dl
@ -2284,7 +2284,7 @@ define i32 @bzhi32_c3_load_indexzext(ptr %w, i8 %numlowbits, ptr %escape) nounwi
; X86-BMI2-NEXT: pushl %esi
; X86-BMI2-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-BMI2-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %dl
; X86-BMI2-NEXT: movzbl {{[0-9]+}}(%esp), %edx
; X86-BMI2-NEXT: bzhil %edx, (%eax), %eax
; X86-BMI2-NEXT: # kill: def $dl killed $dl killed $edx def $edx
; X86-BMI2-NEXT: negb %dl
@ -2365,7 +2365,7 @@ define i32 @bzhi32_c4_commutative(i32 %val, i32 %numlowbits, ptr %escape) nounwi
; X86-BMI2: # %bb.0:
; X86-BMI2-NEXT: pushl %esi
; X86-BMI2-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %dl
; X86-BMI2-NEXT: movzbl {{[0-9]+}}(%esp), %edx
; X86-BMI2-NEXT: bzhil %edx, {{[0-9]+}}(%esp), %eax
; X86-BMI2-NEXT: # kill: def $dl killed $dl killed $edx def $edx
; X86-BMI2-NEXT: negb %dl
@ -3070,14 +3070,14 @@ define i32 @bzhi64_32_c1(i64 %val, i32 %numlowbits) nounwind {
;
; X86-BMI1-LABEL: bzhi64_32_c1:
; X86-BMI1: # %bb.0:
; X86-BMI1-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-BMI1-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-BMI1-NEXT: shll $8, %eax
; X86-BMI1-NEXT: bextrl %eax, {{[0-9]+}}(%esp), %eax
; X86-BMI1-NEXT: retl
;
; X86-BMI2-LABEL: bzhi64_32_c1:
; X86-BMI2: # %bb.0:
; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-BMI2-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-BMI2-NEXT: bzhil %eax, {{[0-9]+}}(%esp), %eax
; X86-BMI2-NEXT: retl
;
@ -3124,14 +3124,14 @@ define i32 @bzhi64_32_c2(i64 %val, i32 %numlowbits) nounwind {
;
; X86-BMI1-LABEL: bzhi64_32_c2:
; X86-BMI1: # %bb.0:
; X86-BMI1-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-BMI1-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-BMI1-NEXT: shll $8, %eax
; X86-BMI1-NEXT: bextrl %eax, {{[0-9]+}}(%esp), %eax
; X86-BMI1-NEXT: retl
;
; X86-BMI2-LABEL: bzhi64_32_c2:
; X86-BMI2: # %bb.0:
; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-BMI2-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-BMI2-NEXT: bzhil %eax, {{[0-9]+}}(%esp), %eax
; X86-BMI2-NEXT: retl
;
@ -3236,14 +3236,14 @@ define i32 @bzhi32_d0(i32 %val, i32 %numlowbits) nounwind {
;
; X86-BMI1-LABEL: bzhi32_d0:
; X86-BMI1: # %bb.0:
; X86-BMI1-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-BMI1-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-BMI1-NEXT: shll $8, %eax
; X86-BMI1-NEXT: bextrl %eax, {{[0-9]+}}(%esp), %eax
; X86-BMI1-NEXT: retl
;
; X86-BMI2-LABEL: bzhi32_d0:
; X86-BMI2: # %bb.0:
; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-BMI2-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-BMI2-NEXT: bzhil %eax, {{[0-9]+}}(%esp), %eax
; X86-BMI2-NEXT: retl
;
@ -3286,14 +3286,14 @@ define i32 @bzhi32_d1_indexzext(i32 %val, i8 %numlowbits) nounwind {
;
; X86-BMI1-LABEL: bzhi32_d1_indexzext:
; X86-BMI1: # %bb.0:
; X86-BMI1-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-BMI1-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-BMI1-NEXT: shll $8, %eax
; X86-BMI1-NEXT: bextrl %eax, {{[0-9]+}}(%esp), %eax
; X86-BMI1-NEXT: retl
;
; X86-BMI2-LABEL: bzhi32_d1_indexzext:
; X86-BMI2: # %bb.0:
; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-BMI2-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-BMI2-NEXT: bzhil %eax, {{[0-9]+}}(%esp), %eax
; X86-BMI2-NEXT: retl
;
@ -3339,7 +3339,7 @@ define i32 @bzhi32_d2_load(ptr %w, i32 %numlowbits) nounwind {
; X86-BMI1-LABEL: bzhi32_d2_load:
; X86-BMI1: # %bb.0:
; X86-BMI1-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-BMI1-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-BMI1-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-BMI1-NEXT: shll $8, %ecx
; X86-BMI1-NEXT: bextrl %ecx, (%eax), %eax
; X86-BMI1-NEXT: retl
@ -3347,7 +3347,7 @@ define i32 @bzhi32_d2_load(ptr %w, i32 %numlowbits) nounwind {
; X86-BMI2-LABEL: bzhi32_d2_load:
; X86-BMI2: # %bb.0:
; X86-BMI2-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-BMI2-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-BMI2-NEXT: bzhil %ecx, (%eax), %eax
; X86-BMI2-NEXT: retl
;
@ -3393,7 +3393,7 @@ define i32 @bzhi32_d3_load_indexzext(ptr %w, i8 %numlowbits) nounwind {
; X86-BMI1-LABEL: bzhi32_d3_load_indexzext:
; X86-BMI1: # %bb.0:
; X86-BMI1-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-BMI1-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-BMI1-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-BMI1-NEXT: shll $8, %ecx
; X86-BMI1-NEXT: bextrl %ecx, (%eax), %eax
; X86-BMI1-NEXT: retl
@ -3401,7 +3401,7 @@ define i32 @bzhi32_d3_load_indexzext(ptr %w, i8 %numlowbits) nounwind {
; X86-BMI2-LABEL: bzhi32_d3_load_indexzext:
; X86-BMI2: # %bb.0:
; X86-BMI2-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-BMI2-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-BMI2-NEXT: bzhil %ecx, (%eax), %eax
; X86-BMI2-NEXT: retl
;
@ -4119,14 +4119,14 @@ define i32 @bzhi64_32_d1(i64 %val, i32 %numlowbits) nounwind {
;
; X86-BMI1-LABEL: bzhi64_32_d1:
; X86-BMI1: # %bb.0:
; X86-BMI1-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-BMI1-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-BMI1-NEXT: shll $8, %eax
; X86-BMI1-NEXT: bextrl %eax, {{[0-9]+}}(%esp), %eax
; X86-BMI1-NEXT: retl
;
; X86-BMI2-LABEL: bzhi64_32_d1:
; X86-BMI2: # %bb.0:
; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-BMI2-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-BMI2-NEXT: bzhil %eax, {{[0-9]+}}(%esp), %eax
; X86-BMI2-NEXT: retl
;

8
llvm/test/CodeGen/X86/extractelement-index.ll
View File

@ -427,14 +427,14 @@ define i8 @extractelement_v16i8_var(<16 x i8> %a, i256 %i) nounwind {
; SSE: # %bb.0:
; SSE-NEXT: andl $15, %edi
; SSE-NEXT: movaps %xmm0, -{{[0-9]+}}(%rsp)
; SSE-NEXT: movb -24(%rsp,%rdi), %al
; SSE-NEXT: movzbl -24(%rsp,%rdi), %eax
; SSE-NEXT: retq
;
; AVX-LABEL: extractelement_v16i8_var:
; AVX: # %bb.0:
; AVX-NEXT: andl $15, %edi
; AVX-NEXT: vmovaps %xmm0, -{{[0-9]+}}(%rsp)
; AVX-NEXT: movb -24(%rsp,%rdi), %al
; AVX-NEXT: movzbl -24(%rsp,%rdi), %eax
; AVX-NEXT: retq
%b = extractelement <16 x i8> %a, i256 %i
ret i8 %b
@ -446,7 +446,7 @@ define i8 @extractelement_v32i8_var(<32 x i8> %a, i256 %i) nounwind {
; SSE-NEXT: andl $31, %edi
; SSE-NEXT: movaps %xmm1, -{{[0-9]+}}(%rsp)
; SSE-NEXT: movaps %xmm0, -{{[0-9]+}}(%rsp)
; SSE-NEXT: movb -40(%rsp,%rdi), %al
; SSE-NEXT: movzbl -40(%rsp,%rdi), %eax
; SSE-NEXT: retq
;
; AVX-LABEL: extractelement_v32i8_var:
@ -457,7 +457,7 @@ define i8 @extractelement_v32i8_var(<32 x i8> %a, i256 %i) nounwind {
; AVX-NEXT: subq $64, %rsp
; AVX-NEXT: andl $31, %edi
; AVX-NEXT: vmovaps %ymm0, (%rsp)
; AVX-NEXT: movb (%rsp,%rdi), %al
; AVX-NEXT: movzbl (%rsp,%rdi), %eax
; AVX-NEXT: movq %rbp, %rsp
; AVX-NEXT: popq %rbp
; AVX-NEXT: vzeroupper

2
llvm/test/CodeGen/X86/fast-isel-call-bool.ll
View File

@ -9,7 +9,7 @@ define i64 @foo(ptr %arg) {
; CHECK-LABEL: foo:
top:
%0 = load i8, ptr %arg
; CHECK: movb
; CHECK: movzbl
%1 = trunc i8 %0 to i1
; CHECK: andb $1,
%2 = call i64 @bar(i1 %1)

2
llvm/test/CodeGen/X86/fast-isel-i1.ll
View File

@ -25,7 +25,7 @@ define void @test2(ptr %a) nounwind {
entry:
; clang uses i8 constants for booleans, so we test with an i8 1.
; CHECK-LABEL: test2:
; CHECK: movb {{.*}} %al
; CHECK: movzbl {{.*}} %eax
; CHECK-NEXT: xorb $1, %al
; CHECK-NEXT: testb $1
%tmp = load i8, ptr %a, align 1

4
llvm/test/CodeGen/X86/fast-isel-sext-zext.ll
View File

@ -5,7 +5,7 @@
define i8 @test1(i8 %x) nounwind {
; X32-LABEL: test1:
; X32: ## %bb.0:
; X32-NEXT: movb {{[0-9]+}}(%esp), %al
; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X32-NEXT: andb $1, %al
; X32-NEXT: negb %al
; X32-NEXT: retl
@ -87,7 +87,7 @@ define i32 @test4(i32 %x) nounwind {
define i8 @test5(i8 %x) nounwind {
; X32-LABEL: test5:
; X32: ## %bb.0:
; X32-NEXT: movb {{[0-9]+}}(%esp), %al
; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X32-NEXT: andb $1, %al
; X32-NEXT: retl
;

13
llvm/test/CodeGen/X86/fixup-bw-copy.ll
View File

@ -13,10 +13,15 @@ define i8 @test_movb(i8 %a0) nounwind {
; X64-NEXT: # kill: def $al killed $al killed $eax
; X64-NEXT: retq
;
; X32-LABEL: test_movb:
; X32: # %bb.0:
; X32-NEXT: movb {{[0-9]+}}(%esp), %al
; X32-NEXT: retl
; BWON32-LABEL: test_movb:
; BWON32: # %bb.0:
; BWON32-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; BWON32-NEXT: retl
;
; BWOFF32-LABEL: test_movb:
; BWOFF32: # %bb.0:
; BWOFF32-NEXT: movb {{[0-9]+}}(%esp), %al
; BWOFF32-NEXT: retl
ret i8 %a0
}

8
llvm/test/CodeGen/X86/fixup-bw-inst.ll
View File

@ -96,11 +96,11 @@ a4: ; preds = %3, %.lr.ph
ret void
}
; This test contains nothing but a simple byte load and store. Since
; movb encodes smaller, we do not want to use movzbl unless in a tight loop.
; So this test checks that movb is used.
; This test contains nothing but a simple byte load and store.
; movb encodes smaller, but we use movzbl for the load for better perf.
; CHECK-LABEL: foo3:
; CHECK: movb
; BWON: movzbl
; BWOFF: movb
; CHECK: movb
define void @foo3(ptr%dst, ptr%src) {
%t0 = load i8, ptr%src, align 1

12
llvm/test/CodeGen/X86/fold-and-shift-x86_64.ll
View File

@ -5,7 +5,7 @@ define i8 @t1(ptr %X, i64 %i) {
; CHECK-LABEL: t1:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: andq $-255, %rsi
; CHECK-NEXT: movb (%rdi,%rsi,4), %al
; CHECK-NEXT: movzbl (%rdi,%rsi,4), %eax
; CHECK-NEXT: retq
entry:
@ -20,7 +20,7 @@ define i8 @t2(ptr %X, i64 %i) {
; CHECK-LABEL: t2:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: andq $-14, %rsi
; CHECK-NEXT: movb (%rdi,%rsi,4), %al
; CHECK-NEXT: movzbl (%rdi,%rsi,4), %eax
; CHECK-NEXT: retq
entry:
@ -35,7 +35,7 @@ define i8 @t3(ptr %X, i64 %i) {
; CHECK-LABEL: t3:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movl %esi, %eax
; CHECK-NEXT: movb (%rdi,%rax,4), %al
; CHECK-NEXT: movzbl (%rdi,%rax,4), %eax
; CHECK-NEXT: retq
entry:
@ -50,7 +50,7 @@ define i8 @t4(ptr %X, i64 %i) {
; CHECK-LABEL: t4:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: andl $-2, %esi
; CHECK-NEXT: movb (%rdi,%rsi,4), %al
; CHECK-NEXT: movzbl (%rdi,%rsi,4), %eax
; CHECK-NEXT: retq
entry:
@ -65,7 +65,7 @@ define i8 @t5(ptr %X, i64 %i) {
; CHECK-LABEL: t5:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: andl $-250002, %esi # imm = 0xFFFC2F6E
; CHECK-NEXT: movb (%rdi,%rsi,4), %al
; CHECK-NEXT: movzbl (%rdi,%rsi,4), %eax
; CHECK-NEXT: retq
entry:
@ -81,7 +81,7 @@ define i8 @t6(ptr %X, i32 %i) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: # kill: def $esi killed $esi def $rsi
; CHECK-NEXT: andl $15, %esi
; CHECK-NEXT: movb (%rdi,%rsi,4), %al
; CHECK-NEXT: movzbl (%rdi,%rsi,4), %eax
; CHECK-NEXT: retq
entry:
%tmp2 = shl i32 %i, 2

4
llvm/test/CodeGen/X86/fold-and-shift.ll
View File

@ -94,7 +94,7 @@ define i8 @t5(ptr %X, i32 %i) {
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx
; CHECK-NEXT: andl $-14, %ecx
; CHECK-NEXT: movb (%eax,%ecx,4), %al
; CHECK-NEXT: movzbl (%eax,%ecx,4), %eax
; CHECK-NEXT: retl
entry:
@ -111,7 +111,7 @@ define i8 @t6(ptr %X, i32 %i) {
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
; CHECK-NEXT: movl $-255, %ecx
; CHECK-NEXT: andl {{[0-9]+}}(%esp), %ecx
; CHECK-NEXT: movb (%eax,%ecx,4), %al
; CHECK-NEXT: movzbl (%eax,%ecx,4), %eax
; CHECK-NEXT: retl
entry:

4
llvm/test/CodeGen/X86/fp-intrinsics.ll
View File

@ -935,7 +935,7 @@ define i8 @f20s8(double %x) #0 {
; X87-NEXT: fldcw {{[0-9]+}}(%esp)
; X87-NEXT: fistps {{[0-9]+}}(%esp)
; X87-NEXT: fldcw {{[0-9]+}}(%esp)
; X87-NEXT: movb {{[0-9]+}}(%esp), %al
; X87-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X87-NEXT: addl $8, %esp
; X87-NEXT: .cfi_def_cfa_offset 4
; X87-NEXT: retl
@ -1207,7 +1207,7 @@ define i8 @f20u8(double %x) #0 {
; X87-NEXT: fldcw {{[0-9]+}}(%esp)
; X87-NEXT: fistps {{[0-9]+}}(%esp)
; X87-NEXT: fldcw {{[0-9]+}}(%esp)
; X87-NEXT: movb {{[0-9]+}}(%esp), %al
; X87-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X87-NEXT: addl $8, %esp
; X87-NEXT: .cfi_def_cfa_offset 4
; X87-NEXT: retl

14
llvm/test/CodeGen/X86/fp-strict-scalar-fptoint.ll
View File

@ -67,7 +67,7 @@ define i1 @fptosi_f32toi1(float %x) #0 {
; X87-NEXT: fldcw {{[0-9]+}}(%esp)
; X87-NEXT: fistps {{[0-9]+}}(%esp)
; X87-NEXT: fldcw {{[0-9]+}}(%esp)
; X87-NEXT: movb {{[0-9]+}}(%esp), %al
; X87-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X87-NEXT: addl $8, %esp
; X87-NEXT: .cfi_def_cfa_offset 4
; X87-NEXT: retl
@ -114,7 +114,7 @@ define i8 @fptosi_f32toi8(float %x) #0 {
; X87-NEXT: fldcw {{[0-9]+}}(%esp)
; X87-NEXT: fistps {{[0-9]+}}(%esp)
; X87-NEXT: fldcw {{[0-9]+}}(%esp)
; X87-NEXT: movb {{[0-9]+}}(%esp), %al
; X87-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X87-NEXT: addl $8, %esp
; X87-NEXT: .cfi_def_cfa_offset 4
; X87-NEXT: retl
@ -339,7 +339,7 @@ define i1 @fptoui_f32toi1(float %x) #0 {
; X87-NEXT: fldcw {{[0-9]+}}(%esp)
; X87-NEXT: fistps {{[0-9]+}}(%esp)
; X87-NEXT: fldcw {{[0-9]+}}(%esp)
; X87-NEXT: movb {{[0-9]+}}(%esp), %al
; X87-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X87-NEXT: addl $8, %esp
; X87-NEXT: .cfi_def_cfa_offset 4
; X87-NEXT: retl
@ -386,7 +386,7 @@ define i8 @fptoui_f32toi8(float %x) #0 {
; X87-NEXT: fldcw {{[0-9]+}}(%esp)
; X87-NEXT: fistps {{[0-9]+}}(%esp)
; X87-NEXT: fldcw {{[0-9]+}}(%esp)
; X87-NEXT: movb {{[0-9]+}}(%esp), %al
; X87-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X87-NEXT: addl $8, %esp
; X87-NEXT: .cfi_def_cfa_offset 4
; X87-NEXT: retl
@ -754,7 +754,7 @@ define i8 @fptosi_f64toi8(double %x) #0 {
; X87-NEXT: fldcw {{[0-9]+}}(%esp)
; X87-NEXT: fistps {{[0-9]+}}(%esp)
; X87-NEXT: fldcw {{[0-9]+}}(%esp)
; X87-NEXT: movb {{[0-9]+}}(%esp), %al
; X87-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X87-NEXT: addl $8, %esp
; X87-NEXT: .cfi_def_cfa_offset 4
; X87-NEXT: retl
@ -979,7 +979,7 @@ define i1 @fptoui_f64toi1(double %x) #0 {
; X87-NEXT: fldcw {{[0-9]+}}(%esp)
; X87-NEXT: fistps {{[0-9]+}}(%esp)
; X87-NEXT: fldcw {{[0-9]+}}(%esp)
; X87-NEXT: movb {{[0-9]+}}(%esp), %al
; X87-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X87-NEXT: addl $8, %esp
; X87-NEXT: .cfi_def_cfa_offset 4
; X87-NEXT: retl
@ -1026,7 +1026,7 @@ define i8 @fptoui_f64toi8(double %x) #0 {
; X87-NEXT: fldcw {{[0-9]+}}(%esp)
; X87-NEXT: fistps {{[0-9]+}}(%esp)
; X87-NEXT: fldcw {{[0-9]+}}(%esp)
; X87-NEXT: movb {{[0-9]+}}(%esp), %al
; X87-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X87-NEXT: addl $8, %esp
; X87-NEXT: .cfi_def_cfa_offset 4
; X87-NEXT: retl

4
llvm/test/CodeGen/X86/fp-strict-scalar-inttofp-fp16.ll
View File

@ -43,7 +43,7 @@ define half @sitofp_i1tof16(i1 %x) #0 {
;
; X86-LABEL: sitofp_i1tof16:
; X86: # %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: andb $1, %al
; X86-NEXT: negb %al
; X86-NEXT: movsbl %al, %eax
@ -231,7 +231,7 @@ define half @uitofp_i1tof16(i1 %x) #0 {
;
; X86-LABEL: uitofp_i1tof16:
; X86: # %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: andb $1, %al
; X86-NEXT: movzbl %al, %eax
; X86-NEXT: vcvtsi2sh %eax, %xmm0, %xmm0

18
llvm/test/CodeGen/X86/fp-strict-scalar-inttofp.ll
View File

@ -34,7 +34,7 @@ define float @sitofp_i1tof32(i1 %x) #0 {
; SSE-X86: # %bb.0:
; SSE-X86-NEXT: pushl %eax
; SSE-X86-NEXT: .cfi_def_cfa_offset 8
; SSE-X86-NEXT: movb {{[0-9]+}}(%esp), %al
; SSE-X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; SSE-X86-NEXT: andb $1, %al
; SSE-X86-NEXT: negb %al
; SSE-X86-NEXT: movsbl %al, %eax
@ -58,7 +58,7 @@ define float @sitofp_i1tof32(i1 %x) #0 {
; AVX-X86: # %bb.0:
; AVX-X86-NEXT: pushl %eax
; AVX-X86-NEXT: .cfi_def_cfa_offset 8
; AVX-X86-NEXT: movb {{[0-9]+}}(%esp), %al
; AVX-X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; AVX-X86-NEXT: andb $1, %al
; AVX-X86-NEXT: negb %al
; AVX-X86-NEXT: movsbl %al, %eax
@ -82,7 +82,7 @@ define float @sitofp_i1tof32(i1 %x) #0 {
; X87: # %bb.0:
; X87-NEXT: pushl %eax
; X87-NEXT: .cfi_def_cfa_offset 8
; X87-NEXT: movb {{[0-9]+}}(%esp), %al
; X87-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X87-NEXT: andb $1, %al
; X87-NEXT: negb %al
; X87-NEXT: movsbl %al, %eax
@ -313,7 +313,7 @@ define float @uitofp_i1tof32(i1 %x) #0 {
; SSE-X86: # %bb.0:
; SSE-X86-NEXT: pushl %eax
; SSE-X86-NEXT: .cfi_def_cfa_offset 8
; SSE-X86-NEXT: movb {{[0-9]+}}(%esp), %al
; SSE-X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; SSE-X86-NEXT: andb $1, %al
; SSE-X86-NEXT: movzbl %al, %eax
; SSE-X86-NEXT: cvtsi2ss %eax, %xmm0
@ -334,7 +334,7 @@ define float @uitofp_i1tof32(i1 %x) #0 {
; AVX-X86: # %bb.0:
; AVX-X86-NEXT: pushl %eax
; AVX-X86-NEXT: .cfi_def_cfa_offset 8
; AVX-X86-NEXT: movb {{[0-9]+}}(%esp), %al
; AVX-X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; AVX-X86-NEXT: andb $1, %al
; AVX-X86-NEXT: movzbl %al, %eax
; AVX-X86-NEXT: vcvtsi2ss %eax, %xmm0, %xmm0
@ -355,7 +355,7 @@ define float @uitofp_i1tof32(i1 %x) #0 {
; X87: # %bb.0:
; X87-NEXT: pushl %eax
; X87-NEXT: .cfi_def_cfa_offset 8
; X87-NEXT: movb {{[0-9]+}}(%esp), %al
; X87-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X87-NEXT: andb $1, %al
; X87-NEXT: movzbl %al, %eax
; X87-NEXT: movw %ax, {{[0-9]+}}(%esp)
@ -965,7 +965,7 @@ define double @uitofp_i1tof64(i1 %x) #0 {
; SSE-X86-NEXT: .cfi_def_cfa_register %ebp
; SSE-X86-NEXT: andl $-8, %esp
; SSE-X86-NEXT: subl $8, %esp
; SSE-X86-NEXT: movb 8(%ebp), %al
; SSE-X86-NEXT: movzbl 8(%ebp), %eax
; SSE-X86-NEXT: andb $1, %al
; SSE-X86-NEXT: movzbl %al, %eax
; SSE-X86-NEXT: cvtsi2sd %eax, %xmm0
@ -992,7 +992,7 @@ define double @uitofp_i1tof64(i1 %x) #0 {
; AVX-X86-NEXT: .cfi_def_cfa_register %ebp
; AVX-X86-NEXT: andl $-8, %esp
; AVX-X86-NEXT: subl $8, %esp
; AVX-X86-NEXT: movb 8(%ebp), %al
; AVX-X86-NEXT: movzbl 8(%ebp), %eax
; AVX-X86-NEXT: andb $1, %al
; AVX-X86-NEXT: movzbl %al, %eax
; AVX-X86-NEXT: vcvtsi2sd %eax, %xmm0, %xmm0
@ -1014,7 +1014,7 @@ define double @uitofp_i1tof64(i1 %x) #0 {
; X87: # %bb.0:
; X87-NEXT: pushl %eax
; X87-NEXT: .cfi_def_cfa_offset 8
; X87-NEXT: movb {{[0-9]+}}(%esp), %al
; X87-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X87-NEXT: andb $1, %al
; X87-NEXT: movzbl %al, %eax
; X87-NEXT: movw %ax, {{[0-9]+}}(%esp)

20
llvm/test/CodeGen/X86/fp80-strict-scalar.ll
View File

@ -242,7 +242,7 @@ define i1 @fp80_to_sint1(x86_fp80 %x) #0 {
; X86-NEXT: fldcw {{[0-9]+}}(%esp)
; X86-NEXT: fistps {{[0-9]+}}(%esp)
; X86-NEXT: fldcw {{[0-9]+}}(%esp)
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: addl $8, %esp
; X86-NEXT: .cfi_def_cfa_offset 4
; X86-NEXT: retl
@ -258,7 +258,7 @@ define i1 @fp80_to_sint1(x86_fp80 %x) #0 {
; X64-NEXT: fldcw -{{[0-9]+}}(%rsp)
; X64-NEXT: fistps -{{[0-9]+}}(%rsp)
; X64-NEXT: fldcw -{{[0-9]+}}(%rsp)
; X64-NEXT: movb -{{[0-9]+}}(%rsp), %al
; X64-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
; X64-NEXT: retq
%result = call i1 @llvm.experimental.constrained.fptosi.i1.f80(x86_fp80 %x,
metadata !"fpexcept.strict") #0
@ -279,7 +279,7 @@ define i8 @fp80_to_sint8(x86_fp80 %x) #0 {
; X86-NEXT: fldcw {{[0-9]+}}(%esp)
; X86-NEXT: fistps {{[0-9]+}}(%esp)
; X86-NEXT: fldcw {{[0-9]+}}(%esp)
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: addl $8, %esp
; X86-NEXT: .cfi_def_cfa_offset 4
; X86-NEXT: retl
@ -295,7 +295,7 @@ define i8 @fp80_to_sint8(x86_fp80 %x) #0 {
; X64-NEXT: fldcw -{{[0-9]+}}(%rsp)
; X64-NEXT: fistps -{{[0-9]+}}(%rsp)
; X64-NEXT: fldcw -{{[0-9]+}}(%rsp)
; X64-NEXT: movb -{{[0-9]+}}(%rsp), %al
; X64-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
; X64-NEXT: retq
%result = call i8 @llvm.experimental.constrained.fptosi.i8.f80(x86_fp80 %x,
metadata !"fpexcept.strict") #0
@ -435,7 +435,7 @@ define i1 @fp80_to_uint1(x86_fp80 %x) #0 {
; X86-NEXT: fldcw {{[0-9]+}}(%esp)
; X86-NEXT: fistps {{[0-9]+}}(%esp)
; X86-NEXT: fldcw {{[0-9]+}}(%esp)
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: addl $8, %esp
; X86-NEXT: .cfi_def_cfa_offset 4
; X86-NEXT: retl
@ -451,7 +451,7 @@ define i1 @fp80_to_uint1(x86_fp80 %x) #0 {
; X64-NEXT: fldcw -{{[0-9]+}}(%rsp)
; X64-NEXT: fistps -{{[0-9]+}}(%rsp)
; X64-NEXT: fldcw -{{[0-9]+}}(%rsp)
; X64-NEXT: movb -{{[0-9]+}}(%rsp), %al
; X64-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
; X64-NEXT: retq
%result = call i1 @llvm.experimental.constrained.fptoui.i1.f80(x86_fp80 %x,
metadata !"fpexcept.strict") #0
@ -472,7 +472,7 @@ define i8 @fp80_to_uint8(x86_fp80 %x) #0 {
; X86-NEXT: fldcw {{[0-9]+}}(%esp)
; X86-NEXT: fistps {{[0-9]+}}(%esp)
; X86-NEXT: fldcw {{[0-9]+}}(%esp)
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: addl $8, %esp
; X86-NEXT: .cfi_def_cfa_offset 4
; X86-NEXT: retl
@ -488,7 +488,7 @@ define i8 @fp80_to_uint8(x86_fp80 %x) #0 {
; X64-NEXT: fldcw -{{[0-9]+}}(%rsp)
; X64-NEXT: fistps -{{[0-9]+}}(%rsp)
; X64-NEXT: fldcw -{{[0-9]+}}(%rsp)
; X64-NEXT: movb -{{[0-9]+}}(%rsp), %al
; X64-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
; X64-NEXT: retq
%result = call i8 @llvm.experimental.constrained.fptoui.i8.f80(x86_fp80 %x,
metadata !"fpexcept.strict") #0
@ -655,7 +655,7 @@ define x86_fp80 @sint1_to_fp80(i1 %x) #0 {
; X86: # %bb.0:
; X86-NEXT: pushl %eax
; X86-NEXT: .cfi_def_cfa_offset 8
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: andb $1, %al
; X86-NEXT: negb %al
; X86-NEXT: movsbl %al, %eax
@ -781,7 +781,7 @@ define x86_fp80 @uint1_to_fp80(i1 %x) #0 {
; X86: # %bb.0:
; X86-NEXT: pushl %eax
; X86-NEXT: .cfi_def_cfa_offset 8
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: andb $1, %al
; X86-NEXT: movzbl %al, %eax
; X86-NEXT: movw %ax, {{[0-9]+}}(%esp)

16
llvm/test/CodeGen/X86/fptosi-sat-scalar.ll
View File

@ -42,7 +42,7 @@ define i1 @test_signed_i1_f32(float %f) nounwind {
; X86-X87-NEXT: movb $-1, %dl
; X86-X87-NEXT: jb .LBB0_2
; X86-X87-NEXT: # %bb.1:
; X86-X87-NEXT: movb {{[0-9]+}}(%esp), %dl
; X86-X87-NEXT: movzbl {{[0-9]+}}(%esp), %edx
; X86-X87-NEXT: .LBB0_2:
; X86-X87-NEXT: fldz
; X86-X87-NEXT: fxch %st(1)
@ -115,7 +115,7 @@ define i8 @test_signed_i8_f32(float %f) nounwind {
; X86-X87-NEXT: movb $-128, %dl
; X86-X87-NEXT: jb .LBB1_2
; X86-X87-NEXT: # %bb.1:
; X86-X87-NEXT: movb {{[0-9]+}}(%esp), %dl
; X86-X87-NEXT: movzbl {{[0-9]+}}(%esp), %edx
; X86-X87-NEXT: .LBB1_2:
; X86-X87-NEXT: flds {{\.?LCPI[0-9]+_[0-9]+}}
; X86-X87-NEXT: fxch %st(1)
@ -1062,7 +1062,7 @@ define i1 @test_signed_i1_f64(double %f) nounwind {
; X86-X87-NEXT: movb $-1, %dl
; X86-X87-NEXT: jb .LBB10_2
; X86-X87-NEXT: # %bb.1:
; X86-X87-NEXT: movb {{[0-9]+}}(%esp), %dl
; X86-X87-NEXT: movzbl {{[0-9]+}}(%esp), %edx
; X86-X87-NEXT: .LBB10_2:
; X86-X87-NEXT: fldz
; X86-X87-NEXT: fxch %st(1)
@ -1135,7 +1135,7 @@ define i8 @test_signed_i8_f64(double %f) nounwind {
; X86-X87-NEXT: movb $-128, %dl
; X86-X87-NEXT: jb .LBB11_2
; X86-X87-NEXT: # %bb.1:
; X86-X87-NEXT: movb {{[0-9]+}}(%esp), %dl
; X86-X87-NEXT: movzbl {{[0-9]+}}(%esp), %edx
; X86-X87-NEXT: .LBB11_2:
; X86-X87-NEXT: flds {{\.?LCPI[0-9]+_[0-9]+}}
; X86-X87-NEXT: fxch %st(1)
@ -2079,7 +2079,7 @@ define i1 @test_signed_i1_f16(half %f) nounwind {
; X86-X87-NEXT: movb $-1, %dl
; X86-X87-NEXT: jb .LBB20_2
; X86-X87-NEXT: # %bb.1:
; X86-X87-NEXT: movb {{[0-9]+}}(%esp), %dl
; X86-X87-NEXT: movzbl {{[0-9]+}}(%esp), %edx
; X86-X87-NEXT: .LBB20_2:
; X86-X87-NEXT: fldz
; X86-X87-NEXT: fxch %st(1)
@ -2176,7 +2176,7 @@ define i8 @test_signed_i8_f16(half %f) nounwind {
; X86-X87-NEXT: movb $-128, %dl
; X86-X87-NEXT: jb .LBB21_2
; X86-X87-NEXT: # %bb.1:
; X86-X87-NEXT: movb {{[0-9]+}}(%esp), %dl
; X86-X87-NEXT: movzbl {{[0-9]+}}(%esp), %edx
; X86-X87-NEXT: .LBB21_2:
; X86-X87-NEXT: flds {{\.?LCPI[0-9]+_[0-9]+}}
; X86-X87-NEXT: fxch %st(1)
@ -3274,7 +3274,7 @@ define i1 @test_signed_i1_f80(x86_fp80 %f) nounwind {
; X86-X87-NEXT: movb $-1, %dl
; X86-X87-NEXT: jb .LBB30_2
; X86-X87-NEXT: # %bb.1:
; X86-X87-NEXT: movb {{[0-9]+}}(%esp), %dl
; X86-X87-NEXT: movzbl {{[0-9]+}}(%esp), %edx
; X86-X87-NEXT: .LBB30_2:
; X86-X87-NEXT: fldz
; X86-X87-NEXT: fxch %st(1)
@ -3387,7 +3387,7 @@ define i8 @test_signed_i8_f80(x86_fp80 %f) nounwind {
; X86-X87-NEXT: movb $-128, %dl
; X86-X87-NEXT: jb .LBB31_2
; X86-X87-NEXT: # %bb.1:
; X86-X87-NEXT: movb {{[0-9]+}}(%esp), %dl
; X86-X87-NEXT: movzbl {{[0-9]+}}(%esp), %edx
; X86-X87-NEXT: .LBB31_2:
; X86-X87-NEXT: flds {{\.?LCPI[0-9]+_[0-9]+}}
; X86-X87-NEXT: fxch %st(1)

16
llvm/test/CodeGen/X86/fptoui-sat-scalar.ll
View File

@ -39,7 +39,7 @@ define i1 @test_unsigned_i1_f32(float %f) nounwind {
; X86-X87-NEXT: sahf
; X86-X87-NEXT: jb .LBB0_1
; X86-X87-NEXT: # %bb.2:
; X86-X87-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-X87-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-X87-NEXT: jmp .LBB0_3
; X86-X87-NEXT: .LBB0_1:
; X86-X87-NEXT: xorl %ecx, %ecx
@ -102,7 +102,7 @@ define i8 @test_unsigned_i8_f32(float %f) nounwind {
; X86-X87-NEXT: sahf
; X86-X87-NEXT: jb .LBB1_1
; X86-X87-NEXT: # %bb.2:
; X86-X87-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-X87-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-X87-NEXT: jmp .LBB1_3
; X86-X87-NEXT: .LBB1_1:
; X86-X87-NEXT: xorl %ecx, %ecx
@ -974,7 +974,7 @@ define i1 @test_unsigned_i1_f64(double %f) nounwind {
; X86-X87-NEXT: sahf
; X86-X87-NEXT: jb .LBB10_1
; X86-X87-NEXT: # %bb.2:
; X86-X87-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-X87-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-X87-NEXT: jmp .LBB10_3
; X86-X87-NEXT: .LBB10_1:
; X86-X87-NEXT: xorl %ecx, %ecx
@ -1037,7 +1037,7 @@ define i8 @test_unsigned_i8_f64(double %f) nounwind {
; X86-X87-NEXT: sahf
; X86-X87-NEXT: jb .LBB11_1
; X86-X87-NEXT: # %bb.2:
; X86-X87-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-X87-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-X87-NEXT: jmp .LBB11_3
; X86-X87-NEXT: .LBB11_1:
; X86-X87-NEXT: xorl %ecx, %ecx
@ -1900,7 +1900,7 @@ define i1 @test_unsigned_i1_f16(half %f) nounwind {
; X86-X87-NEXT: sahf
; X86-X87-NEXT: jb .LBB20_1
; X86-X87-NEXT: # %bb.2:
; X86-X87-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-X87-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-X87-NEXT: jmp .LBB20_3
; X86-X87-NEXT: .LBB20_1:
; X86-X87-NEXT: xorl %ecx, %ecx
@ -1982,7 +1982,7 @@ define i8 @test_unsigned_i8_f16(half %f) nounwind {
; X86-X87-NEXT: sahf
; X86-X87-NEXT: jb .LBB21_1
; X86-X87-NEXT: # %bb.2:
; X86-X87-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-X87-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-X87-NEXT: jmp .LBB21_3
; X86-X87-NEXT: .LBB21_1:
; X86-X87-NEXT: xorl %ecx, %ecx
@ -2995,7 +2995,7 @@ define i1 @test_unsigned_i1_f80(x86_fp80 %f) nounwind {
; X86-X87-NEXT: sahf
; X86-X87-NEXT: jb .LBB30_1
; X86-X87-NEXT: # %bb.2:
; X86-X87-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-X87-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-X87-NEXT: jmp .LBB30_3
; X86-X87-NEXT: .LBB30_1:
; X86-X87-NEXT: xorl %ecx, %ecx
@ -3092,7 +3092,7 @@ define i8 @test_unsigned_i8_f80(x86_fp80 %f) nounwind {
; X86-X87-NEXT: sahf
; X86-X87-NEXT: jb .LBB31_1
; X86-X87-NEXT: # %bb.2:
; X86-X87-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-X87-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-X87-NEXT: jmp .LBB31_3
; X86-X87-NEXT: .LBB31_1:
; X86-X87-NEXT: xorl %ecx, %ecx

18
llvm/test/CodeGen/X86/fshl.ll
View File

@ -17,7 +17,7 @@ declare i128 @llvm.fshl.i128(i128, i128, i128) nounwind readnone
define i8 @var_shift_i8(i8 %x, i8 %y, i8 %z) nounwind {
; X86-LABEL: var_shift_i8:
; X86: # %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %edx
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: shll $8, %eax
@ -48,14 +48,14 @@ define i16 @var_shift_i16(i16 %x, i16 %y, i16 %z) nounwind {
; X86-FAST: # %bb.0:
; X86-FAST-NEXT: movzwl {{[0-9]+}}(%esp), %edx
; X86-FAST-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; X86-FAST-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-FAST-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-FAST-NEXT: andb $15, %cl
; X86-FAST-NEXT: shldw %cl, %dx, %ax
; X86-FAST-NEXT: retl
;
; X86-SLOW-LABEL: var_shift_i16:
; X86-SLOW: # %bb.0:
; X86-SLOW-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-SLOW-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-SLOW-NEXT: movzwl {{[0-9]+}}(%esp), %edx
; X86-SLOW-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-SLOW-NEXT: shll $16, %eax
@ -95,7 +95,7 @@ define i16 @var_shift_i16(i16 %x, i16 %y, i16 %z) nounwind {
define i32 @var_shift_i32(i32 %x, i32 %y, i32 %z) nounwind {
; X86-FAST-LABEL: var_shift_i32:
; X86-FAST: # %bb.0:
; X86-FAST-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-FAST-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-FAST-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-FAST-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-FAST-NEXT: shldl %cl, %edx, %eax
@ -104,7 +104,7 @@ define i32 @var_shift_i32(i32 %x, i32 %y, i32 %z) nounwind {
; X86-SLOW-LABEL: var_shift_i32:
; X86-SLOW: # %bb.0:
; X86-SLOW-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-SLOW-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-SLOW-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-SLOW-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-SLOW-NEXT: shll %cl, %edx
; X86-SLOW-NEXT: notb %cl
@ -446,8 +446,8 @@ define i128 @var_shift_i128(i128 %x, i128 %y, i128 %z) nounwind {
define i8 @const_shift_i8(i8 %x, i8 %y) nounwind {
; X86-LABEL: const_shift_i8:
; X86: # %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: shrb %cl
; X86-NEXT: shlb $7, %al
; X86-NEXT: orb %cl, %al
@ -588,12 +588,12 @@ define i8 @combine_fshl_load_i8(ptr %p) nounwind {
; X86-LABEL: combine_fshl_load_i8:
; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movb 1(%eax), %al
; X86-NEXT: movzbl 1(%eax), %eax
; X86-NEXT: retl
;
; X64-LABEL: combine_fshl_load_i8:
; X64: # %bb.0:
; X64-NEXT: movb 1(%rdi), %al
; X64-NEXT: movzbl 1(%rdi), %eax
; X64-NEXT: retq
%p1 = getelementptr i8, ptr %p, i32 1
%ld0 = load i8, ptr%p

18
llvm/test/CodeGen/X86/fshr.ll
View File

@ -17,7 +17,7 @@ declare i128 @llvm.fshr.i128(i128, i128, i128) nounwind readnone
define i8 @var_shift_i8(i8 %x, i8 %y, i8 %z) nounwind {
; X86-LABEL: var_shift_i8:
; X86: # %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %edx
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: shll $8, %eax
@ -47,14 +47,14 @@ define i16 @var_shift_i16(i16 %x, i16 %y, i16 %z) nounwind {
; X86-FAST: # %bb.0:
; X86-FAST-NEXT: movzwl {{[0-9]+}}(%esp), %edx
; X86-FAST-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; X86-FAST-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-FAST-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-FAST-NEXT: andb $15, %cl
; X86-FAST-NEXT: shrdw %cl, %dx, %ax
; X86-FAST-NEXT: retl
;
; X86-SLOW-LABEL: var_shift_i16:
; X86-SLOW: # %bb.0:
; X86-SLOW-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-SLOW-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-SLOW-NEXT: movzwl {{[0-9]+}}(%esp), %edx
; X86-SLOW-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-SLOW-NEXT: shll $16, %eax
@ -92,7 +92,7 @@ define i16 @var_shift_i16(i16 %x, i16 %y, i16 %z) nounwind {
define i32 @var_shift_i32(i32 %x, i32 %y, i32 %z) nounwind {
; X86-FAST-LABEL: var_shift_i32:
; X86-FAST: # %bb.0:
; X86-FAST-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-FAST-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-FAST-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-FAST-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-FAST-NEXT: shrdl %cl, %edx, %eax
@ -101,7 +101,7 @@ define i32 @var_shift_i32(i32 %x, i32 %y, i32 %z) nounwind {
; X86-SLOW-LABEL: var_shift_i32:
; X86-SLOW: # %bb.0:
; X86-SLOW-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-SLOW-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-SLOW-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-SLOW-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-SLOW-NEXT: shrl %cl, %edx
; X86-SLOW-NEXT: notb %cl
@ -436,8 +436,8 @@ define i128 @var_shift_i128(i128 %x, i128 %y, i128 %z) nounwind {
define i8 @const_shift_i8(i8 %x, i8 %y) nounwind {
; X86-LABEL: const_shift_i8:
; X86: # %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: shrb $7, %cl
; X86-NEXT: addb %al, %al
; X86-NEXT: orb %cl, %al
@ -577,12 +577,12 @@ define i8 @combine_fshr_load_i8(ptr %p) nounwind {
; X86-LABEL: combine_fshr_load_i8:
; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movb (%eax), %al
; X86-NEXT: movzbl (%eax), %eax
; X86-NEXT: retl
;
; X64-LABEL: combine_fshr_load_i8:
; X64: # %bb.0:
; X64-NEXT: movb (%rdi), %al
; X64-NEXT: movzbl (%rdi), %eax
; X64-NEXT: retq
%p1 = getelementptr i8, ptr %p, i32 1
%ld0 = load i8, ptr%p

18
llvm/test/CodeGen/X86/funnel-shift-rot.ll
View File

@ -19,7 +19,7 @@ declare <4 x i32> @llvm.fshr.v4i32(<4 x i32>, <4 x i32>, <4 x i32>)
define i8 @rotl_i8_const_shift(i8 %x) nounwind {
; X86-SSE2-LABEL: rotl_i8_const_shift:
; X86-SSE2: # %bb.0:
; X86-SSE2-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-SSE2-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-SSE2-NEXT: rolb $3, %al
; X86-SSE2-NEXT: retl
;
@ -36,7 +36,7 @@ define i8 @rotl_i8_const_shift(i8 %x) nounwind {
define i8 @rotl_i8_const_shift1(i8 %x) nounwind {
; X86-SSE2-LABEL: rotl_i8_const_shift1:
; X86-SSE2: # %bb.0:
; X86-SSE2-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-SSE2-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-SSE2-NEXT: rolb %al
; X86-SSE2-NEXT: retl
;
@ -53,7 +53,7 @@ define i8 @rotl_i8_const_shift1(i8 %x) nounwind {
define i8 @rotl_i8_const_shift7(i8 %x) nounwind {
; X86-SSE2-LABEL: rotl_i8_const_shift7:
; X86-SSE2: # %bb.0:
; X86-SSE2-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-SSE2-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-SSE2-NEXT: rorb %al
; X86-SSE2-NEXT: retl
;
@ -89,7 +89,7 @@ define i64 @rotl_i64_const_shift(i64 %x) nounwind {
define i16 @rotl_i16(i16 %x, i16 %z) nounwind {
; X86-SSE2-LABEL: rotl_i16:
; X86-SSE2: # %bb.0:
; X86-SSE2-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-SSE2-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-SSE2-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; X86-SSE2-NEXT: rolw %cl, %ax
; X86-SSE2-NEXT: retl
@ -109,7 +109,7 @@ define i16 @rotl_i16(i16 %x, i16 %z) nounwind {
define i32 @rotl_i32(i32 %x, i32 %z) nounwind {
; X86-SSE2-LABEL: rotl_i32:
; X86-SSE2: # %bb.0:
; X86-SSE2-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-SSE2-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-SSE2-NEXT: roll %cl, %eax
; X86-SSE2-NEXT: retl
@ -187,7 +187,7 @@ define <4 x i32> @rotl_v4i32_const_shift(<4 x i32> %x) nounwind {
define i8 @rotr_i8_const_shift(i8 %x) nounwind {
; X86-SSE2-LABEL: rotr_i8_const_shift:
; X86-SSE2: # %bb.0:
; X86-SSE2-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-SSE2-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-SSE2-NEXT: rorb $3, %al
; X86-SSE2-NEXT: retl
;
@ -204,7 +204,7 @@ define i8 @rotr_i8_const_shift(i8 %x) nounwind {
define i8 @rotr_i8_const_shift1(i8 %x) nounwind {
; X86-SSE2-LABEL: rotr_i8_const_shift1:
; X86-SSE2: # %bb.0:
; X86-SSE2-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-SSE2-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-SSE2-NEXT: rorb %al
; X86-SSE2-NEXT: retl
;
@ -221,7 +221,7 @@ define i8 @rotr_i8_const_shift1(i8 %x) nounwind {
define i8 @rotr_i8_const_shift7(i8 %x) nounwind {
; X86-SSE2-LABEL: rotr_i8_const_shift7:
; X86-SSE2: # %bb.0:
; X86-SSE2-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-SSE2-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-SSE2-NEXT: rolb %al
; X86-SSE2-NEXT: retl
;
@ -256,7 +256,7 @@ define i32 @rotr_i32_const_shift(i32 %x) nounwind {
define i16 @rotr_i16(i16 %x, i16 %z) nounwind {
; X86-SSE2-LABEL: rotr_i16:
; X86-SSE2: # %bb.0:
; X86-SSE2-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-SSE2-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-SSE2-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; X86-SSE2-NEXT: rorw %cl, %ax
; X86-SSE2-NEXT: retl

44
llvm/test/CodeGen/X86/funnel-shift.ll
View File

@ -20,7 +20,7 @@ declare <4 x i32> @llvm.fshr.v4i32(<4 x i32>, <4 x i32>, <4 x i32>)
define i32 @fshl_i32(i32 %x, i32 %y, i32 %z) nounwind {
; X86-SSE2-LABEL: fshl_i32:
; X86-SSE2: # %bb.0:
; X86-SSE2-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-SSE2-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-SSE2-NEXT: shldl %cl, %edx, %eax
@ -282,7 +282,7 @@ define i8 @fshl_i8_const_fold() nounwind {
define i32 @fshr_i32(i32 %x, i32 %y, i32 %z) nounwind {
; X86-SSE2-LABEL: fshr_i32:
; X86-SSE2: # %bb.0:
; X86-SSE2-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-SSE2-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-SSE2-NEXT: shrdl %cl, %edx, %eax
@ -419,7 +419,7 @@ define i32 @fshr_i32_demandedbits(i32 %a0, i32 %a1) nounwind {
define i32 @fshl_i32_undef0(i32 %a0, i32 %a1) nounwind {
; X86-SSE2-LABEL: fshl_i32_undef0:
; X86-SSE2: # %bb.0:
; X86-SSE2-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-SSE2-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-SSE2-NEXT: shldl %cl, %eax, %eax
; X86-SSE2-NEXT: retl
@ -475,7 +475,7 @@ define i32 @fshl_i32_undef0_cst(i32 %a0) nounwind {
define i32 @fshl_i32_undef1(i32 %a0, i32 %a1) nounwind {
; X86-SSE2-LABEL: fshl_i32_undef1:
; X86-SSE2: # %bb.0:
; X86-SSE2-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-SSE2-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-SSE2-NEXT: shldl %cl, %eax, %eax
; X86-SSE2-NEXT: retl
@ -495,7 +495,7 @@ define i32 @fshl_i32_undef1_msk(i32 %a0, i32 %a1) nounwind {
; X86-SSE2-LABEL: fshl_i32_undef1_msk:
; X86-SSE2: # %bb.0:
; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-SSE2-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-SSE2-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-SSE2-NEXT: andb $7, %cl
; X86-SSE2-NEXT: shll %cl, %eax
; X86-SSE2-NEXT: retl
@ -549,7 +549,7 @@ define i32 @fshl_i32_undef2(i32 %a0, i32 %a1) nounwind {
define i32 @fshr_i32_undef0(i32 %a0, i32 %a1) nounwind {
; X86-SSE2-LABEL: fshr_i32_undef0:
; X86-SSE2: # %bb.0:
; X86-SSE2-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-SSE2-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-SSE2-NEXT: shrdl %cl, %eax, %eax
; X86-SSE2-NEXT: retl
@ -569,7 +569,7 @@ define i32 @fshr_i32_undef0_msk(i32 %a0, i32 %a1) nounwind {
; X86-SSE2-LABEL: fshr_i32_undef0_msk:
; X86-SSE2: # %bb.0:
; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-SSE2-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-SSE2-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-SSE2-NEXT: andb $7, %cl
; X86-SSE2-NEXT: shrl %cl, %eax
; X86-SSE2-NEXT: retl
@ -606,7 +606,7 @@ define i32 @fshr_i32_undef0_cst(i32 %a0) nounwind {
define i32 @fshr_i32_undef1(i32 %a0, i32 %a1) nounwind {
; X86-SSE2-LABEL: fshr_i32_undef1:
; X86-SSE2: # %bb.0:
; X86-SSE2-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-SSE2-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-SSE2-NEXT: shrdl %cl, %eax, %eax
; X86-SSE2-NEXT: retl
@ -681,7 +681,7 @@ define i32 @fshr_i32_undef2(i32 %a0, i32 %a1) nounwind {
define i32 @fshl_i32_zero0(i32 %a0, i32 %a1) nounwind {
; X86-SSE2-LABEL: fshl_i32_zero0:
; X86-SSE2: # %bb.0:
; X86-SSE2-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-SSE2-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-SSE2-NEXT: xorl %eax, %eax
; X86-SSE2-NEXT: shldl %cl, %edx, %eax
@ -717,7 +717,7 @@ define i32 @fshl_i32_zero0_cst(i32 %a0) nounwind {
define i32 @fshl_i32_zero1(i32 %a0, i32 %a1) nounwind {
; X86-SSE2-LABEL: fshl_i32_zero1:
; X86-SSE2: # %bb.0:
; X86-SSE2-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-SSE2-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-SSE2-NEXT: xorl %edx, %edx
; X86-SSE2-NEXT: shldl %cl, %edx, %eax
@ -754,7 +754,7 @@ define i32 @fshl_i32_zero1_cst(i32 %a0) nounwind {
define i32 @fshr_i32_zero0(i32 %a0, i32 %a1) nounwind {
; X86-SSE2-LABEL: fshr_i32_zero0:
; X86-SSE2: # %bb.0:
; X86-SSE2-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-SSE2-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-SSE2-NEXT: xorl %edx, %edx
; X86-SSE2-NEXT: shrdl %cl, %edx, %eax
@ -791,7 +791,7 @@ define i32 @fshr_i32_zero0_cst(i32 %a0) nounwind {
define i32 @fshr_i32_zero1(i32 %a0, i32 %a1) nounwind {
; X86-SSE2-LABEL: fshr_i32_zero1:
; X86-SSE2: # %bb.0:
; X86-SSE2-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-SSE2-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-SSE2-NEXT: xorl %eax, %eax
; X86-SSE2-NEXT: shrdl %cl, %edx, %eax
@ -1047,7 +1047,7 @@ define i32 @or_shl_fshl(i32 %x, i32 %y, i32 %s) nounwind {
; X86-SSE2: # %bb.0:
; X86-SSE2-NEXT: pushl %esi
; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-SSE2-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-SSE2-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-SSE2-NEXT: movl %edx, %esi
; X86-SSE2-NEXT: shll %cl, %esi
@ -1075,7 +1075,7 @@ define i32 @or_shl_rotl(i32 %x, i32 %y, i32 %s) nounwind {
; X86-SSE2-LABEL: or_shl_rotl:
; X86-SSE2: # %bb.0:
; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-SSE2-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-SSE2-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-SSE2-NEXT: shll %cl, %edx
; X86-SSE2-NEXT: roll %cl, %eax
@ -1102,7 +1102,7 @@ define i32 @or_shl_fshl_commute(i32 %x, i32 %y, i32 %s) nounwind {
; X86-SSE2: # %bb.0:
; X86-SSE2-NEXT: pushl %esi
; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-SSE2-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-SSE2-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-SSE2-NEXT: movl %edx, %esi
; X86-SSE2-NEXT: shll %cl, %esi
@ -1130,7 +1130,7 @@ define i32 @or_shl_rotl_commute(i32 %x, i32 %y, i32 %s) nounwind {
; X86-SSE2-LABEL: or_shl_rotl_commute:
; X86-SSE2: # %bb.0:
; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-SSE2-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-SSE2-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-SSE2-NEXT: shll %cl, %edx
; X86-SSE2-NEXT: roll %cl, %eax
@ -1157,7 +1157,7 @@ define i32 @or_lshr_fshr(i32 %x, i32 %y, i32 %s) nounwind {
; X86-SSE2: # %bb.0:
; X86-SSE2-NEXT: pushl %esi
; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-SSE2-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-SSE2-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-SSE2-NEXT: movl %edx, %esi
; X86-SSE2-NEXT: shrl %cl, %esi
@ -1185,7 +1185,7 @@ define i32 @or_lshr_rotr(i32 %x, i32 %y, i32 %s) nounwind {
; X86-SSE2-LABEL: or_lshr_rotr:
; X86-SSE2: # %bb.0:
; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-SSE2-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-SSE2-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-SSE2-NEXT: shrl %cl, %edx
; X86-SSE2-NEXT: rorl %cl, %eax
@ -1212,7 +1212,7 @@ define i32 @or_lshr_fshr_commute(i32 %x, i32 %y, i32 %s) nounwind {
; X86-SSE2: # %bb.0:
; X86-SSE2-NEXT: pushl %esi
; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-SSE2-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-SSE2-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-SSE2-NEXT: movl %edx, %esi
; X86-SSE2-NEXT: shrl %cl, %esi
@ -1240,7 +1240,7 @@ define i32 @or_lshr_rotr_commute(i32 %x, i32 %y, i32 %s) nounwind {
; X86-SSE2-LABEL: or_lshr_rotr_commute:
; X86-SSE2: # %bb.0:
; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-SSE2-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-SSE2-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-SSE2-NEXT: shrl %cl, %edx
; X86-SSE2-NEXT: rorl %cl, %eax
@ -1265,7 +1265,7 @@ define i32 @or_lshr_rotr_commute(i32 %x, i32 %y, i32 %s) nounwind {
define i32 @or_shl_fshl_simplify(i32 %x, i32 %y, i32 %s) nounwind {
; X86-SSE2-LABEL: or_shl_fshl_simplify:
; X86-SSE2: # %bb.0:
; X86-SSE2-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-SSE2-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-SSE2-NEXT: shldl %cl, %edx, %eax
@ -1287,7 +1287,7 @@ define i32 @or_shl_fshl_simplify(i32 %x, i32 %y, i32 %s) nounwind {
define i32 @or_lshr_fshr_simplify(i32 %x, i32 %y, i32 %s) nounwind {
; X86-SSE2-LABEL: or_lshr_fshr_simplify:
; X86-SSE2: # %bb.0:
; X86-SSE2-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-SSE2-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-SSE2-NEXT: shrdl %cl, %edx, %eax

22
llvm/test/CodeGen/X86/gpr-to-mask.ll
View File

@ -105,11 +105,11 @@ define void @test_load_add(i1 %cond, ptr %fptr, ptr %iptr1, ptr %iptr2, float %f
; X86-64-NEXT: testb $1, %dil
; X86-64-NEXT: je .LBB2_2
; X86-64-NEXT: # %bb.1: # %if
; X86-64-NEXT: movb (%rdx), %al
; X86-64-NEXT: movzbl (%rdx), %eax
; X86-64-NEXT: addb (%rcx), %al
; X86-64-NEXT: jmp .LBB2_3
; X86-64-NEXT: .LBB2_2: # %else
; X86-64-NEXT: movb (%rcx), %al
; X86-64-NEXT: movzbl (%rcx), %eax
; X86-64-NEXT: .LBB2_3: # %exit
; X86-64-NEXT: kmovd %eax, %k1
; X86-64-NEXT: vmovss %xmm0, %xmm1, %xmm1 {%k1}
@ -126,11 +126,11 @@ define void @test_load_add(i1 %cond, ptr %fptr, ptr %iptr1, ptr %iptr2, float %f
; X86-32-NEXT: je .LBB2_2
; X86-32-NEXT: # %bb.1: # %if
; X86-32-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-32-NEXT: movb (%edx), %dl
; X86-32-NEXT: movzbl (%edx), %edx
; X86-32-NEXT: addb (%ecx), %dl
; X86-32-NEXT: jmp .LBB2_3
; X86-32-NEXT: .LBB2_2: # %else
; X86-32-NEXT: movb (%ecx), %dl
; X86-32-NEXT: movzbl (%ecx), %edx
; X86-32-NEXT: .LBB2_3: # %exit
; X86-32-NEXT: kmovd %edx, %k1
; X86-32-NEXT: vmovss %xmm1, %xmm0, %xmm0 {%k1}
@ -212,10 +212,10 @@ define void @test_loadi1_storei1(i1 %cond, ptr %iptr1, ptr %iptr2, ptr %iptr3)
; X86-64-NEXT: testb $1, %dil
; X86-64-NEXT: je .LBB4_2
; X86-64-NEXT: # %bb.1: # %if
; X86-64-NEXT: movb (%rsi), %al
; X86-64-NEXT: movzbl (%rsi), %eax
; X86-64-NEXT: jmp .LBB4_3
; X86-64-NEXT: .LBB4_2: # %else
; X86-64-NEXT: movb (%rdx), %al
; X86-64-NEXT: movzbl (%rdx), %eax
; X86-64-NEXT: .LBB4_3: # %exit
; X86-64-NEXT: andb $1, %al
; X86-64-NEXT: movb %al, (%rcx)
@ -232,7 +232,7 @@ define void @test_loadi1_storei1(i1 %cond, ptr %iptr1, ptr %iptr2, ptr %iptr3)
; X86-32-NEXT: .LBB4_2: # %else
; X86-32-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-32-NEXT: .LBB4_3: # %exit
; X86-32-NEXT: movb (%ecx), %cl
; X86-32-NEXT: movzbl (%ecx), %ecx
; X86-32-NEXT: andb $1, %cl
; X86-32-NEXT: movb %cl, (%eax)
; X86-32-NEXT: retl
@ -320,11 +320,11 @@ define void @test_shr1(i1 %cond, ptr %ptr1, ptr %ptr2, <8 x float> %fvec1, <8 x
; X86-64-NEXT: testb $1, %dil
; X86-64-NEXT: je .LBB6_2
; X86-64-NEXT: # %bb.1: # %if
; X86-64-NEXT: movb (%rsi), %al
; X86-64-NEXT: movzbl (%rsi), %eax
; X86-64-NEXT: shrb %al
; X86-64-NEXT: jmp .LBB6_3
; X86-64-NEXT: .LBB6_2: # %else
; X86-64-NEXT: movb (%rdx), %al
; X86-64-NEXT: movzbl (%rdx), %eax
; X86-64-NEXT: .LBB6_3: # %exit
; X86-64-NEXT: kmovd %eax, %k1
; X86-64-NEXT: vmovaps %zmm0, %zmm1 {%k1}
@ -341,12 +341,12 @@ define void @test_shr1(i1 %cond, ptr %ptr1, ptr %ptr2, <8 x float> %fvec1, <8 x
; X86-32-NEXT: je .LBB6_2
; X86-32-NEXT: # %bb.1: # %if
; X86-32-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-32-NEXT: movb (%ecx), %cl
; X86-32-NEXT: movzbl (%ecx), %ecx
; X86-32-NEXT: shrb %cl
; X86-32-NEXT: jmp .LBB6_3
; X86-32-NEXT: .LBB6_2: # %else
; X86-32-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-32-NEXT: movb (%ecx), %cl
; X86-32-NEXT: movzbl (%ecx), %ecx
; X86-32-NEXT: .LBB6_3: # %exit
; X86-32-NEXT: kmovd %ecx, %k1
; X86-32-NEXT: vmovaps %zmm0, %zmm1 {%k1}

8
llvm/test/CodeGen/X86/h-register-addressing-32.ll
View File

@ -46,7 +46,7 @@ define i8 @foo1(ptr nocapture inreg %p, i32 inreg %x) nounwind readonly {
; CHECK-LABEL: foo1:
; CHECK: # %bb.0:
; CHECK-NEXT: movzbl %dh, %ecx
; CHECK-NEXT: movb (%eax,%ecx), %al
; CHECK-NEXT: movzbl (%eax,%ecx), %eax
; CHECK-NEXT: retl
%t0 = lshr i32 %x, 8
%t1 = and i32 %t0, 255
@ -59,7 +59,7 @@ define i8 @bar8(ptr nocapture inreg %p, i32 inreg %x) nounwind readonly {
; CHECK-LABEL: bar8:
; CHECK: # %bb.0:
; CHECK-NEXT: movzbl %dh, %ecx
; CHECK-NEXT: movb (%eax,%ecx,8), %al
; CHECK-NEXT: movzbl (%eax,%ecx,8), %eax
; CHECK-NEXT: retl
%t0 = lshr i32 %x, 5
%t1 = and i32 %t0, 2040
@ -72,7 +72,7 @@ define i8 @bar4(ptr nocapture inreg %p, i32 inreg %x) nounwind readonly {
; CHECK-LABEL: bar4:
; CHECK: # %bb.0:
; CHECK-NEXT: movzbl %dh, %ecx
; CHECK-NEXT: movb (%eax,%ecx,4), %al
; CHECK-NEXT: movzbl (%eax,%ecx,4), %eax
; CHECK-NEXT: retl
%t0 = lshr i32 %x, 6
%t1 = and i32 %t0, 1020
@ -85,7 +85,7 @@ define i8 @bar2(ptr nocapture inreg %p, i32 inreg %x) nounwind readonly {
; CHECK-LABEL: bar2:
; CHECK: # %bb.0:
; CHECK-NEXT: movzbl %dh, %ecx
; CHECK-NEXT: movb (%eax,%ecx,2), %al
; CHECK-NEXT: movzbl (%eax,%ecx,2), %eax
; CHECK-NEXT: retl
%t0 = lshr i32 %x, 7
%t1 = and i32 %t0, 510

8
llvm/test/CodeGen/X86/h-register-addressing-64.ll
View File

@ -50,7 +50,7 @@ define i8 @foo1(ptr nocapture inreg %p, i64 inreg %x) nounwind readonly {
; CHECK: # %bb.0:
; CHECK-NEXT: movq %rsi, %rax
; CHECK-NEXT: movzbl %ah, %eax
; CHECK-NEXT: movb (%rdi,%rax), %al
; CHECK-NEXT: movzbl (%rdi,%rax), %eax
; CHECK-NEXT: retq
%t0 = lshr i64 %x, 8
%t1 = and i64 %t0, 255
@ -64,7 +64,7 @@ define i8 @bar8(ptr nocapture inreg %p, i64 inreg %x) nounwind readonly {
; CHECK: # %bb.0:
; CHECK-NEXT: movq %rsi, %rax
; CHECK-NEXT: movzbl %ah, %eax
; CHECK-NEXT: movb (%rdi,%rax,8), %al
; CHECK-NEXT: movzbl (%rdi,%rax,8), %eax
; CHECK-NEXT: retq
%t0 = lshr i64 %x, 5
%t1 = and i64 %t0, 2040
@ -78,7 +78,7 @@ define i8 @bar4(ptr nocapture inreg %p, i64 inreg %x) nounwind readonly {
; CHECK: # %bb.0:
; CHECK-NEXT: movq %rsi, %rax
; CHECK-NEXT: movzbl %ah, %eax
; CHECK-NEXT: movb (%rdi,%rax,4), %al
; CHECK-NEXT: movzbl (%rdi,%rax,4), %eax
; CHECK-NEXT: retq
%t0 = lshr i64 %x, 6
%t1 = and i64 %t0, 1020
@ -92,7 +92,7 @@ define i8 @bar2(ptr nocapture inreg %p, i64 inreg %x) nounwind readonly {
; CHECK: # %bb.0:
; CHECK-NEXT: movq %rsi, %rax
; CHECK-NEXT: movzbl %ah, %eax
; CHECK-NEXT: movb (%rdi,%rax,2), %al
; CHECK-NEXT: movzbl (%rdi,%rax,2), %eax
; CHECK-NEXT: retq
%t0 = lshr i64 %x, 7
%t1 = and i64 %t0, 510

58
llvm/test/CodeGen/X86/hoist-and-by-const-from-lshr-in-eqcmp-zero.ll
View File

@ -22,8 +22,8 @@
define i1 @scalar_i8_signbit_eq(i8 %x, i8 %y) nounwind {
; X86-LABEL: scalar_i8_signbit_eq:
; X86: # %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: shlb %cl, %al
; X86-NEXT: testb $-128, %al
; X86-NEXT: sete %al
@ -46,8 +46,8 @@ define i1 @scalar_i8_signbit_eq(i8 %x, i8 %y) nounwind {
define i1 @scalar_i8_lowestbit_eq(i8 %x, i8 %y) nounwind {
; X86-LABEL: scalar_i8_lowestbit_eq:
; X86: # %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: shlb %cl, %al
; X86-NEXT: testb $1, %al
; X86-NEXT: sete %al
@ -70,8 +70,8 @@ define i1 @scalar_i8_lowestbit_eq(i8 %x, i8 %y) nounwind {
define i1 @scalar_i8_bitsinmiddle_eq(i8 %x, i8 %y) nounwind {
; X86-LABEL: scalar_i8_bitsinmiddle_eq:
; X86: # %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: shlb %cl, %al
; X86-NEXT: testb $24, %al
; X86-NEXT: sete %al
@ -96,7 +96,7 @@ define i1 @scalar_i8_bitsinmiddle_eq(i8 %x, i8 %y) nounwind {
define i1 @scalar_i16_signbit_eq(i16 %x, i16 %y) nounwind {
; X86-BMI1-LABEL: scalar_i16_signbit_eq:
; X86-BMI1: # %bb.0:
; X86-BMI1-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-BMI1-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-BMI1-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-BMI1-NEXT: shll %cl, %eax
; X86-BMI1-NEXT: testl $32768, %eax # imm = 0x8000
@ -105,7 +105,7 @@ define i1 @scalar_i16_signbit_eq(i16 %x, i16 %y) nounwind {
;
; X86-BMI2-LABEL: scalar_i16_signbit_eq:
; X86-BMI2: # %bb.0:
; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-BMI2-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-BMI2-NEXT: shlxl %eax, {{[0-9]+}}(%esp), %eax
; X86-BMI2-NEXT: testl $32768, %eax # imm = 0x8000
; X86-BMI2-NEXT: sete %al
@ -135,7 +135,7 @@ define i1 @scalar_i16_signbit_eq(i16 %x, i16 %y) nounwind {
define i1 @scalar_i16_lowestbit_eq(i16 %x, i16 %y) nounwind {
; X86-BMI1-LABEL: scalar_i16_lowestbit_eq:
; X86-BMI1: # %bb.0:
; X86-BMI1-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-BMI1-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-BMI1-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-BMI1-NEXT: shll %cl, %eax
; X86-BMI1-NEXT: testb $1, %al
@ -144,7 +144,7 @@ define i1 @scalar_i16_lowestbit_eq(i16 %x, i16 %y) nounwind {
;
; X86-BMI2-LABEL: scalar_i16_lowestbit_eq:
; X86-BMI2: # %bb.0:
; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-BMI2-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-BMI2-NEXT: shlxl %eax, {{[0-9]+}}(%esp), %eax
; X86-BMI2-NEXT: testb $1, %al
; X86-BMI2-NEXT: sete %al
@ -174,7 +174,7 @@ define i1 @scalar_i16_lowestbit_eq(i16 %x, i16 %y) nounwind {
define i1 @scalar_i16_bitsinmiddle_eq(i16 %x, i16 %y) nounwind {
; X86-BMI1-LABEL: scalar_i16_bitsinmiddle_eq:
; X86-BMI1: # %bb.0:
; X86-BMI1-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-BMI1-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-BMI1-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-BMI1-NEXT: shll %cl, %eax
; X86-BMI1-NEXT: testl $4080, %eax # imm = 0xFF0
@ -183,7 +183,7 @@ define i1 @scalar_i16_bitsinmiddle_eq(i16 %x, i16 %y) nounwind {
;
; X86-BMI2-LABEL: scalar_i16_bitsinmiddle_eq:
; X86-BMI2: # %bb.0:
; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-BMI2-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-BMI2-NEXT: shlxl %eax, {{[0-9]+}}(%esp), %eax
; X86-BMI2-NEXT: testl $4080, %eax # imm = 0xFF0
; X86-BMI2-NEXT: sete %al
@ -215,7 +215,7 @@ define i1 @scalar_i16_bitsinmiddle_eq(i16 %x, i16 %y) nounwind {
define i1 @scalar_i32_signbit_eq(i32 %x, i32 %y) nounwind {
; X86-BMI1-LABEL: scalar_i32_signbit_eq:
; X86-BMI1: # %bb.0:
; X86-BMI1-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-BMI1-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-BMI1-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-BMI1-NEXT: shll %cl, %eax
; X86-BMI1-NEXT: testl $-2147483648, %eax # imm = 0x80000000
@ -224,7 +224,7 @@ define i1 @scalar_i32_signbit_eq(i32 %x, i32 %y) nounwind {
;
; X86-BMI2-LABEL: scalar_i32_signbit_eq:
; X86-BMI2: # %bb.0:
; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-BMI2-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-BMI2-NEXT: shlxl %eax, {{[0-9]+}}(%esp), %eax
; X86-BMI2-NEXT: testl $-2147483648, %eax # imm = 0x80000000
; X86-BMI2-NEXT: sete %al
@ -254,7 +254,7 @@ define i1 @scalar_i32_signbit_eq(i32 %x, i32 %y) nounwind {
define i1 @scalar_i32_lowestbit_eq(i32 %x, i32 %y) nounwind {
; X86-BMI1-LABEL: scalar_i32_lowestbit_eq:
; X86-BMI1: # %bb.0:
; X86-BMI1-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-BMI1-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-BMI1-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-BMI1-NEXT: shll %cl, %eax
; X86-BMI1-NEXT: testb $1, %al
@ -263,7 +263,7 @@ define i1 @scalar_i32_lowestbit_eq(i32 %x, i32 %y) nounwind {
;
; X86-BMI2-LABEL: scalar_i32_lowestbit_eq:
; X86-BMI2: # %bb.0:
; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-BMI2-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-BMI2-NEXT: shlxl %eax, {{[0-9]+}}(%esp), %eax
; X86-BMI2-NEXT: testb $1, %al
; X86-BMI2-NEXT: sete %al
@ -293,7 +293,7 @@ define i1 @scalar_i32_lowestbit_eq(i32 %x, i32 %y) nounwind {
define i1 @scalar_i32_bitsinmiddle_eq(i32 %x, i32 %y) nounwind {
; X86-BMI1-LABEL: scalar_i32_bitsinmiddle_eq:
; X86-BMI1: # %bb.0:
; X86-BMI1-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-BMI1-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-BMI1-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-BMI1-NEXT: shll %cl, %eax
; X86-BMI1-NEXT: testl $16776960, %eax # imm = 0xFFFF00
@ -302,7 +302,7 @@ define i1 @scalar_i32_bitsinmiddle_eq(i32 %x, i32 %y) nounwind {
;
; X86-BMI2-LABEL: scalar_i32_bitsinmiddle_eq:
; X86-BMI2: # %bb.0:
; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-BMI2-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-BMI2-NEXT: shlxl %eax, {{[0-9]+}}(%esp), %eax
; X86-BMI2-NEXT: testl $16776960, %eax # imm = 0xFFFF00
; X86-BMI2-NEXT: sete %al
@ -335,7 +335,7 @@ define i1 @scalar_i64_signbit_eq(i64 %x, i64 %y) nounwind {
; X86-BMI1-LABEL: scalar_i64_signbit_eq:
; X86-BMI1: # %bb.0:
; X86-BMI1-NEXT: pushl %esi
; X86-BMI1-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-BMI1-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-BMI1-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-BMI1-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-BMI1-NEXT: movl %eax, %esi
@ -350,7 +350,7 @@ define i1 @scalar_i64_signbit_eq(i64 %x, i64 %y) nounwind {
;
; X86-BMI2-LABEL: scalar_i64_signbit_eq:
; X86-BMI2: # %bb.0:
; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-BMI2-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-BMI2-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-BMI2-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-BMI2-NEXT: shldl %cl, %eax, %edx
@ -385,7 +385,7 @@ define i1 @scalar_i64_signbit_eq(i64 %x, i64 %y) nounwind {
define i1 @scalar_i64_lowestbit_eq(i64 %x, i64 %y) nounwind {
; X86-BMI1-LABEL: scalar_i64_lowestbit_eq:
; X86-BMI1: # %bb.0:
; X86-BMI1-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-BMI1-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-BMI1-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-BMI1-NEXT: shll %cl, %eax
; X86-BMI1-NEXT: xorl %edx, %edx
@ -397,7 +397,7 @@ define i1 @scalar_i64_lowestbit_eq(i64 %x, i64 %y) nounwind {
;
; X86-BMI2-LABEL: scalar_i64_lowestbit_eq:
; X86-BMI2: # %bb.0:
; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-BMI2-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-BMI2-NEXT: shlxl %eax, {{[0-9]+}}(%esp), %ecx
; X86-BMI2-NEXT: xorl %edx, %edx
; X86-BMI2-NEXT: testb $32, %al
@ -431,7 +431,7 @@ define i1 @scalar_i64_bitsinmiddle_eq(i64 %x, i64 %y) nounwind {
; X86-BMI1-LABEL: scalar_i64_bitsinmiddle_eq:
; X86-BMI1: # %bb.0:
; X86-BMI1-NEXT: pushl %esi
; X86-BMI1-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-BMI1-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-BMI1-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-BMI1-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-BMI1-NEXT: movl %eax, %esi
@ -451,7 +451,7 @@ define i1 @scalar_i64_bitsinmiddle_eq(i64 %x, i64 %y) nounwind {
; X86-BMI2-LABEL: scalar_i64_bitsinmiddle_eq:
; X86-BMI2: # %bb.0:
; X86-BMI2-NEXT: pushl %esi
; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-BMI2-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-BMI2-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-BMI2-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-BMI2-NEXT: shldl %cl, %eax, %edx
@ -772,8 +772,8 @@ define <4 x i1> @vec_4xi32_nonsplat_undef2_eq(<4 x i32> %x, <4 x i32> %y) nounwi
define i1 @scalar_i8_signbit_ne(i8 %x, i8 %y) nounwind {
; X86-LABEL: scalar_i8_signbit_ne:
; X86: # %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: shlb %cl, %al
; X86-NEXT: shrb $7, %al
; X86-NEXT: retl
@ -820,7 +820,7 @@ define i1 @scalar_i32_x_is_const_eq(i32 %y) nounwind {
define i1 @scalar_i32_x_is_const2_eq(i32 %y) nounwind {
; X86-BMI1-LABEL: scalar_i32_x_is_const2_eq:
; X86-BMI1: # %bb.0:
; X86-BMI1-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-BMI1-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-BMI1-NEXT: movl $1, %eax
; X86-BMI1-NEXT: shrl %cl, %eax
; X86-BMI1-NEXT: testl %eax, %eax
@ -829,7 +829,7 @@ define i1 @scalar_i32_x_is_const2_eq(i32 %y) nounwind {
;
; X86-BMI2-LABEL: scalar_i32_x_is_const2_eq:
; X86-BMI2: # %bb.0:
; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-BMI2-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-BMI2-NEXT: movl $1, %ecx
; X86-BMI2-NEXT: shrxl %eax, %ecx, %eax
; X86-BMI2-NEXT: testl %eax, %eax
@ -877,7 +877,7 @@ define i1 @negative_scalar_i8_bitsinmiddle_slt(i8 %x, i8 %y) nounwind {
define i1 @scalar_i8_signbit_eq_with_nonzero(i8 %x, i8 %y) nounwind {
; X86-LABEL: scalar_i8_signbit_eq_with_nonzero:
; X86: # %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movb $-128, %al
; X86-NEXT: shrb %cl, %al
; X86-NEXT: andb {{[0-9]+}}(%esp), %al

48
llvm/test/CodeGen/X86/hoist-and-by-const-from-shl-in-eqcmp-zero.ll
View File

@ -22,8 +22,8 @@
define i1 @scalar_i8_signbit_eq(i8 %x, i8 %y) nounwind {
; X86-LABEL: scalar_i8_signbit_eq:
; X86: # %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: shrb %cl, %al
; X86-NEXT: testb $-128, %al
; X86-NEXT: sete %al
@ -66,8 +66,8 @@ define i1 @scalar_i8_lowestbit_eq(i8 %x, i8 %y) nounwind {
define i1 @scalar_i8_bitsinmiddle_eq(i8 %x, i8 %y) nounwind {
; X86-LABEL: scalar_i8_bitsinmiddle_eq:
; X86: # %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: shrb %cl, %al
; X86-NEXT: testb $24, %al
; X86-NEXT: sete %al
@ -92,7 +92,7 @@ define i1 @scalar_i8_bitsinmiddle_eq(i8 %x, i8 %y) nounwind {
define i1 @scalar_i16_signbit_eq(i16 %x, i16 %y) nounwind {
; X86-BMI1-LABEL: scalar_i16_signbit_eq:
; X86-BMI1: # %bb.0:
; X86-BMI1-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-BMI1-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-BMI1-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; X86-BMI1-NEXT: shrl %cl, %eax
; X86-BMI1-NEXT: testl $32768, %eax # imm = 0x8000
@ -102,7 +102,7 @@ define i1 @scalar_i16_signbit_eq(i16 %x, i16 %y) nounwind {
; X86-BMI2-LABEL: scalar_i16_signbit_eq:
; X86-BMI2: # %bb.0:
; X86-BMI2-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-BMI2-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-BMI2-NEXT: shrxl %ecx, %eax, %eax
; X86-BMI2-NEXT: testl $32768, %eax # imm = 0x8000
; X86-BMI2-NEXT: sete %al
@ -154,7 +154,7 @@ define i1 @scalar_i16_lowestbit_eq(i16 %x, i16 %y) nounwind {
define i1 @scalar_i16_bitsinmiddle_eq(i16 %x, i16 %y) nounwind {
; X86-BMI1-LABEL: scalar_i16_bitsinmiddle_eq:
; X86-BMI1: # %bb.0:
; X86-BMI1-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-BMI1-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-BMI1-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; X86-BMI1-NEXT: shrl %cl, %eax
; X86-BMI1-NEXT: testl $4080, %eax # imm = 0xFF0
@ -164,7 +164,7 @@ define i1 @scalar_i16_bitsinmiddle_eq(i16 %x, i16 %y) nounwind {
; X86-BMI2-LABEL: scalar_i16_bitsinmiddle_eq:
; X86-BMI2: # %bb.0:
; X86-BMI2-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-BMI2-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-BMI2-NEXT: shrxl %ecx, %eax, %eax
; X86-BMI2-NEXT: testl $4080, %eax # imm = 0xFF0
; X86-BMI2-NEXT: sete %al
@ -198,7 +198,7 @@ define i1 @scalar_i16_bitsinmiddle_eq(i16 %x, i16 %y) nounwind {
define i1 @scalar_i32_signbit_eq(i32 %x, i32 %y) nounwind {
; X86-BMI1-LABEL: scalar_i32_signbit_eq:
; X86-BMI1: # %bb.0:
; X86-BMI1-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-BMI1-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-BMI1-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-BMI1-NEXT: shrl %cl, %eax
; X86-BMI1-NEXT: testl $-2147483648, %eax # imm = 0x80000000
@ -207,7 +207,7 @@ define i1 @scalar_i32_signbit_eq(i32 %x, i32 %y) nounwind {
;
; X86-BMI2-LABEL: scalar_i32_signbit_eq:
; X86-BMI2: # %bb.0:
; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-BMI2-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-BMI2-NEXT: shrxl %eax, {{[0-9]+}}(%esp), %eax
; X86-BMI2-NEXT: testl $-2147483648, %eax # imm = 0x80000000
; X86-BMI2-NEXT: sete %al
@ -257,7 +257,7 @@ define i1 @scalar_i32_lowestbit_eq(i32 %x, i32 %y) nounwind {
define i1 @scalar_i32_bitsinmiddle_eq(i32 %x, i32 %y) nounwind {
; X86-BMI1-LABEL: scalar_i32_bitsinmiddle_eq:
; X86-BMI1: # %bb.0:
; X86-BMI1-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-BMI1-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-BMI1-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-BMI1-NEXT: shrl %cl, %eax
; X86-BMI1-NEXT: testl $16776960, %eax # imm = 0xFFFF00
@ -266,7 +266,7 @@ define i1 @scalar_i32_bitsinmiddle_eq(i32 %x, i32 %y) nounwind {
;
; X86-BMI2-LABEL: scalar_i32_bitsinmiddle_eq:
; X86-BMI2: # %bb.0:
; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-BMI2-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-BMI2-NEXT: shrxl %eax, {{[0-9]+}}(%esp), %eax
; X86-BMI2-NEXT: testl $16776960, %eax # imm = 0xFFFF00
; X86-BMI2-NEXT: sete %al
@ -298,7 +298,7 @@ define i1 @scalar_i32_bitsinmiddle_eq(i32 %x, i32 %y) nounwind {
define i1 @scalar_i64_signbit_eq(i64 %x, i64 %y) nounwind {
; X86-BMI1-LABEL: scalar_i64_signbit_eq:
; X86-BMI1: # %bb.0:
; X86-BMI1-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-BMI1-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-BMI1-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-BMI1-NEXT: shrl %cl, %eax
; X86-BMI1-NEXT: xorl %edx, %edx
@ -310,7 +310,7 @@ define i1 @scalar_i64_signbit_eq(i64 %x, i64 %y) nounwind {
;
; X86-BMI2-LABEL: scalar_i64_signbit_eq:
; X86-BMI2: # %bb.0:
; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-BMI2-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-BMI2-NEXT: shrxl %eax, {{[0-9]+}}(%esp), %ecx
; X86-BMI2-NEXT: xorl %edx, %edx
; X86-BMI2-NEXT: testb $32, %al
@ -344,7 +344,7 @@ define i1 @scalar_i64_lowestbit_eq(i64 %x, i64 %y) nounwind {
; X86-BMI1-LABEL: scalar_i64_lowestbit_eq:
; X86-BMI1: # %bb.0:
; X86-BMI1-NEXT: pushl %esi
; X86-BMI1-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-BMI1-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-BMI1-NEXT: movl $1, %eax
; X86-BMI1-NEXT: xorl %esi, %esi
; X86-BMI1-NEXT: xorl %edx, %edx
@ -363,7 +363,7 @@ define i1 @scalar_i64_lowestbit_eq(i64 %x, i64 %y) nounwind {
; X86-BMI2-LABEL: scalar_i64_lowestbit_eq:
; X86-BMI2: # %bb.0:
; X86-BMI2-NEXT: pushl %esi
; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-BMI2-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-BMI2-NEXT: movl $1, %eax
; X86-BMI2-NEXT: xorl %edx, %edx
; X86-BMI2-NEXT: xorl %esi, %esi
@ -394,7 +394,7 @@ define i1 @scalar_i64_bitsinmiddle_eq(i64 %x, i64 %y) nounwind {
; X86-BMI1-LABEL: scalar_i64_bitsinmiddle_eq:
; X86-BMI1: # %bb.0:
; X86-BMI1-NEXT: pushl %esi
; X86-BMI1-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-BMI1-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-BMI1-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-BMI1-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-BMI1-NEXT: movl %edx, %esi
@ -414,7 +414,7 @@ define i1 @scalar_i64_bitsinmiddle_eq(i64 %x, i64 %y) nounwind {
; X86-BMI2-LABEL: scalar_i64_bitsinmiddle_eq:
; X86-BMI2: # %bb.0:
; X86-BMI2-NEXT: pushl %esi
; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-BMI2-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-BMI2-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-BMI2-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-BMI2-NEXT: shrdl %cl, %edx, %eax
@ -709,8 +709,8 @@ define <4 x i1> @vec_4xi32_nonsplat_undef2_eq(<4 x i32> %x, <4 x i32> %y) nounwi
define i1 @scalar_i8_signbit_ne(i8 %x, i8 %y) nounwind {
; X86-LABEL: scalar_i8_signbit_ne:
; X86: # %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: shrb %cl, %al
; X86-NEXT: shrb $7, %al
; X86-NEXT: retl
@ -737,7 +737,7 @@ define i1 @scalar_i8_signbit_ne(i8 %x, i8 %y) nounwind {
define i1 @scalar_i32_x_is_const_eq(i32 %y) nounwind {
; X86-BMI1-LABEL: scalar_i32_x_is_const_eq:
; X86-BMI1: # %bb.0:
; X86-BMI1-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-BMI1-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-BMI1-NEXT: movl $-1437226411, %eax # imm = 0xAA55AA55
; X86-BMI1-NEXT: shll %cl, %eax
; X86-BMI1-NEXT: testb $1, %al
@ -746,7 +746,7 @@ define i1 @scalar_i32_x_is_const_eq(i32 %y) nounwind {
;
; X86-BMI2-LABEL: scalar_i32_x_is_const_eq:
; X86-BMI2: # %bb.0:
; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-BMI2-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-BMI2-NEXT: movl $-1437226411, %ecx # imm = 0xAA55AA55
; X86-BMI2-NEXT: shlxl %eax, %ecx, %eax
; X86-BMI2-NEXT: testb $1, %al
@ -803,7 +803,7 @@ define i1 @scalar_i32_x_is_const2_eq(i32 %y) nounwind {
define i1 @negative_scalar_i8_bitsinmiddle_slt(i8 %x, i8 %y) nounwind {
; X86-LABEL: negative_scalar_i8_bitsinmiddle_slt:
; X86: # %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movb $24, %al
; X86-NEXT: shlb %cl, %al
; X86-NEXT: andb {{[0-9]+}}(%esp), %al
@ -828,7 +828,7 @@ define i1 @negative_scalar_i8_bitsinmiddle_slt(i8 %x, i8 %y) nounwind {
define i1 @scalar_i8_signbit_eq_with_nonzero(i8 %x, i8 %y) nounwind {
; X86-LABEL: scalar_i8_signbit_eq_with_nonzero:
; X86: # %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movb $-128, %al
; X86-NEXT: shlb %cl, %al
; X86-NEXT: andb {{[0-9]+}}(%esp), %al

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