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enhance CanEvaluateZExtd to handle shift left and sext, allowing 

more expressions to be promoted and casts eliminated.

llvm-svn: 93096
This commit is contained in:
Chris Lattner 2010-01-10 02:22:12 +00:00
parent 7723e2b10f
commit f0af17dab3
2 changed files with 45 additions and 3 deletions
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20
llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
View File

@ -643,17 +643,31 @@ static int CanEvaluateZExtd(Value *V, const Type *Ty,unsigned &NumCastsRemoved,
if (Tmp1 == -1) return -1;
Tmp2 = CanEvaluateZExtd(I->getOperand(1), Ty, NumCastsRemoved, TD);
if (Tmp2 == -1) return -1;
return 0; // TODO: Could be improved.
case Instruction::Shl:
Tmp1 = CanEvaluateZExtd(I->getOperand(0), Ty, NumCastsRemoved, TD);
if (Tmp1 == -1) return -1;
if (ConstantInt *CI = dyn_cast<ConstantInt>(I->getOperand(1)))
return Tmp1 - CI->getZExtValue();
// Variable shift, no known zext bits.
Tmp2 = CanEvaluateZExtd(I->getOperand(1), Ty, NumCastsRemoved, TD);
if (Tmp2 == -1) return -1;
return 0;
//case Instruction::Shl:
//case Instruction::LShr:
case Instruction::ZExt:
// zext(zext(x)) -> zext(x). Since we're replacing it, it isn't eliminated.
Tmp1 = Ty->getScalarSizeInBits()-OrigTy->getScalarSizeInBits();
return GetLeadingZeros(I, TD)+Tmp1;
//case Instruction::SExt: zext(sext(x)) -> sext(x) with no upper bits known.
//case Instruction::Trunc:
case Instruction::SExt:
// zext(sext(x)) -> sext(x) with no upper bits known.
return 0;
//case Instruction::Trunc: -> Could turn into AND.
case Instruction::Select:
Tmp1 = CanEvaluateZExtd(I->getOperand(1), Ty, NumCastsRemoved, TD);
if (Tmp1 == -1) return -1;

28
llvm/test/Transforms/InstCombine/cast.ll
View File

@ -403,3 +403,31 @@ define i64 @test44(i8 %T) {
; CHECK-NEXT: %B = or i64 %A, 1234
; CHECK-NEXT: ret i64 %B
}
define i64 @test45(i8 %A, i64 %Q) {
%D = trunc i64 %Q to i32 ;; should be removed
%B = sext i8 %A to i32
%C = or i32 %B, %D
%E = zext i32 %C to i64
ret i64 %E
; CHECK: @test45
; CHECK-NEXT: %B = sext i8 %A to i64
; CHECK-NEXT: %C = or i64 %B, %Q
; CHECK-NEXT: %E = and i64 %C, 4294967295
; CHECK-NEXT: ret i64 %E
}
define i64 @test46(i64 %A) {
%B = trunc i64 %A to i32
%C = and i32 %B, 42
%D = shl i32 %C, 8
%E = zext i32 %D to i64
ret i64 %E
; CHECK: @test46
; CHECK-NEXT: %C = shl i64 %A, 8
; CHECK-NEXT: %D = and i64 %C, 10752
; CHECK-NEXT: ret i64 %D
}